Vishay Siliconix DG221BDY-T1-E3
- Part No.:
- DG221BDY-T1-E3
- Manufacturer:
- Vishay Siliconix
- Package:
- 16-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
DG221BDY-T1-E3.pdf
- Description:
- IC SWITCH SPST-NCX4 90OHM 16SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:4,773
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Product details
Overview
DG221BDY-T1-E3 from Vishay Siliconix is a quad SPST CMOS analog switch with integrated latches, designed for precision signal routing in µP-based systems. It features 60 Ω typical on-resistance, ±15 V analog signal range, 150 ns minimum write pulse width, and operates across –40 °C to +85 °C. Used in data acquisition and automatic test equipment for memory-mapped analog switching.
For engineers reviewing the DG221BDY-T1-E3 datasheet, DG221BDY-T1-E3 pinout, DG221BDY-T1-E3 application, or DG221BDY-T1-E3 equivalent, key selection criteria include latch-controlled simultaneous switching, bidirectional analog conduction, low charge injection (20 pC), and SOIC-16 packaging compatible with automated assembly.
Technical Context
The DG221BDY-T1-E3 implements four independent SPST switches, each with transparent latching controlled by a shared WR (Write) input. Its on-chip 5 V regulator enables TTL-compatible digital control while operating from dual ±15 V analog supplies.
Each switch supports true bidirectional analog signal flow with ≤135 Ω maximum on-resistance over temperature, ≤±100 nA off-leakage, and 70 dB off-isolation at 100 kHz - enabling high-fidelity signal integrity in multiplexed instrumentation paths.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Analog Signal Range | ±15 V - supports full-rail bipolar signal switching without clipping |
| rDS(on) Typ. | 60 Ω - ensures minimal voltage drop and power loss at 10 mA load current |
| Off-Leakage Max. | ±100 nA - preserves accuracy in high-impedance sensor or medical front-end circuits |
| Charge Injection | 20 pC - limits voltage glitch on sampled-hold nodes in data acquisition systems |
| Turn-On/Off Time | 550 / 340 ns - enables fast channel switching synchronized to µP bus timing |
| Write Pulse Width Min. | 150 ns - compatible with standard 8-bit microprocessor data strobes |
| Supply Current Max. | 1.5 mA - supports low-power system-level energy budgeting |
Pinout & Package
Package: 16-pin narrow SOIC (JEDEC MS-012, body width 3.9 mm, lead pitch 1.27 mm), RoHS-compliant, Pb-free terminations.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| IN1–IN4 | Digital latch input | Controls ON/OFF state of corresponding switch; logic 0 = ON, logic 1 = OFF |
| WR | Global write enable | Low level latches INx inputs; high level holds previous switch states |
| S1–S4 | Analog source terminal | Bidirectional analog node; connects to signal source or load depending on configuration |
| D1–D4 | Analog drain terminal | Bidirectional analog node; completes switch path with corresponding Sx pin |
| V+, V− | Analog supply rails | Support ±15 V operation; define analog signal swing and on-resistance performance |
| GND | Digital ground reference | Reference for TTL-level INx and WR inputs; isolated from analog return paths |
Key Features
| Feature | Design Value |
|---|---|
| Integrated latches per channel | Enables memory-mapped I/O addressing - one byte controls all four switches simultaneously |
| On-chip 5 V regulator | Decouples digital logic supply from analog rails, maintaining TTL compatibility across wide V+/V− ranges |
| Epitaxial layer construction | Prevents latchup under overvoltage transients up to ±34 V (V+ to V−) |
| True bidirectional conduction | Permits signal routing in either direction without polarity constraints - critical for AC-coupled or differential paths |
| Low 20 pC charge injection | Minimizes sampling error in switched-capacitor circuits and precision ADC front-ends |
Applications
| Automatic Test Equipment (ATE) | Data Acquisition Systems |
|---|---|
Use Scenario: Multiplexing multiple sensor inputs into a single ADC channel under µP control. IC Role / Device Role / Timing Role: Quad SPST analog switch with latched control enables deterministic channel selection without bus contention. Use Value: Simultaneous 4-channel configuration via one data byte reduces µP overhead and eliminates race conditions during switching. | Use Scenario: Programmable gain attenuation network using resistor ladder and analog switches. IC Role / Device Role / Timing Role: Precision analog switch providing low-distortion, low-leakage signal path selection. Use Value: 60 Ω rDS(on) and ±100 nA leakage preserve gain accuracy and DC offset stability across temperature. |
| Medical Instrumentation | Factory Automation I/O Modules |
Use Scenario: Isolating and routing ECG/EEG electrode signals to amplification stages. IC Role / Device Role / Timing Role: High-isolation (70 dB), low-charge-injection analog switch for biopotential signal integrity. Use Value: 20 pC charge injection prevents baseline shift in high-gain, low-frequency bio-amplifiers. | Use Scenario: Configurable analog input conditioning for PLC analog modules. IC Role / Device Role / Timing Role: Robust analog switch handling ±10 V industrial signal ranges with latch retention during noise events. Use Value: WR pin hold functionality maintains channel state during µP reset or EMI-induced glitches. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar analog switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX4617ESE+ | Single-supply only (up to 36 V); no on-chip regulator; 35 Ω rDS(on); no latches | Requires external level-shifting for TTL control; unsuitable for memory-mapped multi-channel control | Select when single-rail supply and lowest on-resistance are prioritized over latch functionality |
| ADG426BRUZ | 16-channel, serial SPI interface; 30 Ω rDS(on); no WR pin; requires clocked command protocol | Not pin-compatible; replaces parallel bus control with serial configuration; higher integration density | Select when board space is constrained and µP GPIO pins are limited, accepting added firmware complexity |
Compared with MAX4617ESE+ and ADG426BRUZ, the DG221BDY-T1-E3 uniquely combines parallel latch control, dual-supply analog operation, and SOIC-16 packaging - making it optimal for µP-based systems requiring deterministic, low-overhead analog multiplexing without serial overhead or external regulation.
Availability
DG221BDY-T1-E3 is available at Aetrix Electronics and suitable for automatic test equipment, data acquisition systems, and medical instrumentation requiring stable component supply and long-term industrial availability.
Supply support for DG221BDY-T1-E3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay Siliconix is a global semiconductor manufacturer specializing in discrete components, analog switches, and power management devices with emphasis on reliability and precision.
The DG221B product line delivers latchable, low-leakage analog switches optimized for µP-controlled instrumentation, test, and industrial signal routing where deterministic state retention and rail-to-rail analog fidelity are essential.
FAQ
What is the maximum analog signal voltage range supported by the DG221BDY-T1-E3?
The DG221BDY-T1-E3 supports an analog signal range of ±15 V when operated with V+ = +15 V and V− = −15 V. This rail-to-rail capability allows direct interfacing with bipolar sensor outputs and industrial signal standards without external level-shifting circuitry. The device maintains specified on-resistance and leakage performance across this full range.
Does the DG221BDY-T1-E3 require external regulation for its digital control inputs?
No, the DG221BDY-T1-E3 includes an internal 5 V regulator that powers its digital logic section. This allows direct connection of TTL-compatible INx and WR inputs even when V+ and V− are set to ±10 V, ±12 V, or ±15 V - eliminating the need for external regulators or level translators in mixed-supply systems.
How does the WR (Write) pin function in the DG221BDY-T1-E3?
The WR pin acts as a global latch enable: when pulled low, it captures the current logic states of IN1–IN4 and immediately applies them to the four switches. When held high, the DG221BDY-T1-E3 retains its last latched state regardless of changes to INx - enabling glitch immunity and state persistence during µP bus arbitration or reset sequences.
Can the DG221BDY-T1-E3 be used in bidirectional analog signal paths?
Yes, the DG221BDY-T1-E3 provides true bidirectional analog conduction in the ON state. Either Sx or Dx pin may serve as input or output, supporting AC-coupled, differential, or floating-signal topologies. This behavior is guaranteed across the full ±15 V analog range and is unaffected by signal polarity or direction of current flow.
What is the thermal derating specification for the DG221BDY-T1-E3 in SOIC package?
For the DG221BDY-T1-E3 in narrow SOIC package, power dissipation must be derated by 7.7 mW/°C above +75 °C ambient. At 25 °C, maximum rated power dissipation is 600 mW; at 100 °C ambient, usable power drops to 407.5 mW. This derating ensures safe junction temperature operation under sustained load conditions.
DG221BDY-T1-E3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay Siliconix
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Last Time Buy
- Switch Circuit:
- SPST - NC
- Multiplexer/Demultiplexer Circuit:
- 1:1
- Number of Circuits:
- 4
- On-State Resistance (Max):
- 90Ohm
- Channel-to-Channel Matching (ΔRon):
- -
- Voltage - Supply, Single (V+):
- 13V ~ 18V
- Voltage - Supply, Dual (V±):
- ±7V ~ 18V
- Switch Time (Ton, Toff) (Max):
- 550ns, 340ns
- -3db Bandwidth:
- -
- Charge Injection:
- 20pC
- Channel Capacitance (CS(off), CD(off)):
- 8pF, 9pF
- Current - Leakage (IS(off)) (Max):
- 5nA
- Crosstalk:
- -90dB @ 100kHz
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
DG221BDY-T1-E3 FAQ
1.How can I place an order for DG221BDY-T1-E3 through Aetrix?
Please submit a Request for Quotation (RFQ) for DG221BDY-T1-E3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DG221BDY-T1-E3 reliable?
The price and inventory of DG221BDY-T1-E3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DG221BDY-T1-E3 is usually 5 days.
3.What payment methods are accepted for DG221BDY-T1-E3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DG221BDY-T1-E3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DG221BDY-T1-E3?
DG221BDY-T1-E3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DG221BDY-T1-E3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DG221BDY-T1-E3?
For technical support, including DG221BDY-T1-E3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DG221BDY-T1-E3 requirements.
6.How does Aetrix verify that DG221BDY-T1-E3 is sourced from the original manufacturer or authorized distributors?
All DG221BDY-T1-E3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DG221BDY-T1-E3 meets industry standards.
7.What is the process for return or replacement of DG221BDY-T1-E3?
All DG221BDY-T1-E3 units undergo pre-shipment inspection (PSI). If there is an issue with DG221BDY-T1-E3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DG221BDY-T1-E3 part is unused and in its original packaging.
Return procedure for DG221BDY-T1-E3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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