Analog Devices Inc./Maxim Integrated DG300ACWE+T
- Part No.:
- DG300ACWE+T
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Package:
- 16-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
DG300ACWE+T.pdf
- Description:
- IC SWITCH SPST-NOX2 50OHM 16SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:1,247
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Product details
Overview
DG300ACWE+T from Maxim Integrated is a dual single-pole single-throw (SPST) CMOS analog switch optimized for low-power, battery-operated systems. It features <50Ω on-resistance, ±15V analog signal range (V+ to V−), 150ns typical turn-on time, and TTL/CMOS-compatible control inputs - enabling precise signal routing in portable instrumentation and programmable gain amplifiers.
For engineers reviewing the DG300ACWE+T datasheet, DG300ACWE+T pinout, DG300ACWE+T application, or DG300ACWE+T equivalent, this page delivers verified electrical specs, package mapping to 16-lead wide SOIC, break-before-make timing behavior, leakage performance at temperature extremes, and validated alternative options for dual SPST analog switching.
Technical Context
The DG300ACWE+T implements monolithic CMOS switch architecture with latchup-proof construction and substrate-isolated P-well/N-well design. Its dual independent SPST channels support bidirectional analog signal switching across the full rail-to-rail range from V− to V+, with no polarity constraints on input signals.
Control logic uses positive-true TTL/CMOS thresholds (0.8V low, 4.0V high), enabling direct interface with microcontrollers and logic families. Break-before-make operation is inherent in channel switching, preventing momentary short-circuits during state transitions - critical for power-supply sequencing and sample/hold integrity.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Analog Signal Range | ±15V (V− to V+): supports full-rail analog signals without clipping in dual-supply systems |
| On-Resistance (RDS(ON)) | <50Ω typ at ±15V: ensures minimal voltage drop and signal distortion in precision signal paths |
| Turn-On Time (tON) | 150ns typ: enables fast multiplexing in data acquisition and real-time control loops |
| Charge Injection | 12pC typ: limits voltage glitch in sample-and-hold circuits and ADC front-ends |
| Off-Leakage Current | <±0.1nA typ at ±14V: preserves accuracy in high-impedance sensor interfaces |
| Supply Range | ±5V to ±18V: allows flexible biasing in industrial and portable designs |
| Operating Temp | 0°C to +70°C: qualified for commercial-grade embedded instrumentation |
Pinout & Package
Package: 16-lead wide SOIC (SOIC-W), 0.300" body width, JEDEC MS-013 compliant, RoHS-compliant lead finish.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2, 3, 4 | Switch Inputs (D1–D4) | Drain terminals of internal MOSFETs; accept analog signals bidirectionally |
| 5, 6, 7, 8 | Switch Outputs (S1–S4) | Source terminals; connect to load or downstream circuitry |
| 9, 10 | Control Inputs (IN1, IN2) | TTL/CMOS-compatible digital inputs; high = ON, low = OFF per channel |
| 11 | GND | Logic reference and substrate tie; must be connected to system ground |
| 12 | V− | Negative supply rail; sets lower bound of analog signal range |
| 13 | V+ | Positive supply rail; sets upper bound of analog signal range |
| 14–16 | No Connect (N.C.) | Internally unconnected; must remain floating or tied to GND per layout guidelines |
Key Features
| Feature | Design Value |
|---|---|
| Break-before-make switching | Guarantees 50ns minimum dead time between channel transitions to prevent signal shorting |
| Latchup-proof CMOS process | Immune to destructive latchup under overvoltage or ESD stress per JEDEC JESD78 |
| Single-supply capability | V− tied to GND enables +10V to +30V operation - simplifies power architecture in portable gear |
| Low charge injection (12pC) | Minimizes hold-step error in precision sample/hold and switched-capacitor circuits |
| On-resistance matching | ≤10% typical channel-to-channel variation - critical for gain-setting and calibration stability |
Applications
| Portable Instrumentation | Low-Power Sample/Hold Circuits |
|---|---|
|
Use Scenario: Battery-powered handheld multimeters and oscilloscopes requiring signal path reconfiguration without power penalty. IC Role / Device Role / Timing Role: Dual SPST analog switch routing sensor inputs to ADC front-end while maintaining rail-to-rail dynamic range. Use Value: <50Ω RDS(ON) and 150ns tON preserve measurement fidelity and update rate; ±15V signal range accommodates high-voltage probes. |
Use Scenario: Precision data acquisition systems where analog hold capacitors require low-glitch switching during sampling. IC Role / Device Role / Timing Role: Gate driver for hold capacitor charging/discharging with controlled break-before-make timing. Use Value: 12pC charge injection limits hold-step error to sub-mV levels; <0.1nA off-leakage prevents capacitor discharge drift over milliseconds. |
| Programmable Gain Amplifiers | Power-Supply Sequencing |
|
Use Scenario: Digitally adjustable gain stages using resistor networks switched into feedback paths of op-amps. IC Role / Device Role / Timing Role: Low-RON analog switch selecting discrete gain-setting resistors without introducing gain error or thermal EMF. Use Value: ≤10% RDS(ON) matching ensures consistent gain accuracy across channels; TTL-compatible inputs simplify MCU control. |
Use Scenario: Industrial PLCs and telecom line cards requiring controlled activation of auxiliary rails during startup. IC Role / Device Role / Timing Role: High-voltage SPST switch isolating secondary supplies until primary rails stabilize. Use Value: ±18V absolute max rating and 50ns break interval prevent cross-rail coupling; low IQ (<0.5mA) minimizes standby loss. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual SPST analog switching applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX4617ESE+ | Lower RDS(ON) (35Ω typ), but only ±5V supply range; 16-pin SOIC, same footprint | Better for low-voltage, high-speed multiplexing; unsuitable for ±15V signal routing | Select when operating below ±6V and prioritizing on-resistance over signal range |
| ADG1419BRUZ | Higher supply tolerance (±20V), 4.5Ω RDS(ON), but requires 3.3V logic control and costs ~2.3× more | Preferred for high-precision, high-voltage test equipment where cost is secondary to performance | Choose when ±20V analog range and sub-5Ω on-resistance justify premium pricing and level-shifting overhead |
Compared with DG300ACWE+T, MAX4617ESE+ trades signal range for lower on-resistance and faster switching, while ADG1419BRUZ extends voltage capability and reduces conduction loss at the expense of logic compatibility and BOM cost - making DG300ACWE+T optimal for balanced ±15V, TTL-driven, cost-sensitive instrumentation.
Availability
DG300ACWE+T is available at Aetrix Electronics and suitable for portable instrumentation, low-power sample/holds, and programmable gain amplifiers requiring stable component supply across commercial temperature grades.
Supply support for DG300ACWE+T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) designs precision analog, mixed-signal, and power management ICs for industrial, medical, and communications applications.
The DG300A family targets low-power, rail-to-rail analog signal routing in battery-constrained and high-reliability systems - emphasizing latchup immunity, low charge injection, and broad supply flexibility.
FAQ
What is the maximum analog signal voltage range supported by DG300ACWE+T?
The DG300ACWE+T supports analog signals from V− to V+, with absolute maximum ratings of ±44V for V+ (DG300A series). At ±15V supplies, it delivers a guaranteed ±15V signal range - enabling true rail-to-rail switching without clipping or distortion in dual-supply configurations.
Does DG300ACWE+T support single-supply operation?
Yes, DG300ACWE+T supports single-supply operation by connecting V− to GND. It functions across +10V to +30V single-rail supplies, maintaining TTL-compatible logic thresholds and <50Ω on-resistance - ideal for portable devices where negative rails are impractical.
What is the purpose of the N.C. pins on DG300ACWE+T?
DG300ACWE+T has three N.C. pins (14–16) that are internally unconnected. Per Maxim's layout guidance, they must remain floating or be tied to GND to avoid parasitic coupling; they do not serve thermal, shielding, or grounding functions beyond standard PCB best practices.
How does DG300ACWE+T achieve break-before-make timing?
DG300ACWE+T achieves intrinsic break-before-make behavior through internal gate drive timing - ensuring ≥50ns minimum dead time between turn-off of one channel and turn-on of another. This prevents momentary shorts in SPDT-like configurations and is verified in the DG301(A)/DG303(A) test circuits referenced in the datasheet.
Is DG300ACWE+T pin-compatible with legacy DG300-series switches?
Yes, DG300ACWE+T is pin-compatible with other DG300A variants in 16-lead wide SOIC (e.g., DG300ACWE, DG300ABWE) and maintains electrical compatibility with original DG300–DG303 devices - allowing drop-in replacement in existing designs without PCB modification.
DG300ACWE+T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Switch Circuit:
- SPST - NO
- Multiplexer/Demultiplexer Circuit:
- 1:1
- Number of Circuits:
- 2
- On-State Resistance (Max):
- 50Ohm
- Channel-to-Channel Matching (ΔRon):
- -
- Voltage - Supply, Single (V+):
- -
- Voltage - Supply, Dual (V±):
- ±5V ~ 18V
- Switch Time (Ton, Toff) (Max):
- 300ns, 250ns
- -3db Bandwidth:
- -
- Charge Injection:
- 12pC
- Channel Capacitance (CS(off), CD(off)):
- 14pF, 14pF
- Current - Leakage (IS(off)) (Max):
- 5nA
- Crosstalk:
- -74dB @ 500kHz
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
DG300ACWE+T FAQ
1.How can I place an order for DG300ACWE+T through Aetrix?
Please submit a Request for Quotation (RFQ) for DG300ACWE+T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DG300ACWE+T reliable?
The price and inventory of DG300ACWE+T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DG300ACWE+T is usually 5 days.
3.What payment methods are accepted for DG300ACWE+T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DG300ACWE+T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DG300ACWE+T?
DG300ACWE+T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DG300ACWE+T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DG300ACWE+T?
For technical support, including DG300ACWE+T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DG300ACWE+T requirements.
6.How does Aetrix verify that DG300ACWE+T is sourced from the original manufacturer or authorized distributors?
All DG300ACWE+T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DG300ACWE+T meets industry standards.
7.What is the process for return or replacement of DG300ACWE+T?
All DG300ACWE+T units undergo pre-shipment inspection (PSI). If there is an issue with DG300ACWE+T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DG300ACWE+T part is unused and in its original packaging.
Return procedure for DG300ACWE+T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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