Analog Devices Inc./Maxim Integrated DG303ACJ+
- Part No.:
- DG303ACJ+
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Package:
- 14-DIP (0.300", 7.62mm)
- Datasheet:
-
DG303ACJ+.pdf
- Description:
- IC SWITCH SPDT X 2 50OHM 14DIP
- Quantity:
- Payment:

- Shipping:

Inventory:1,271
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Product details
Overview
DG303ACJ+ from Maxim Integrated is a dual SPDT CMOS analog switch optimized for low-power, precision signal routing in ±5V to ±18V bipolar or +10V to +30V single-supply systems. It delivers <50Ω on-resistance (typ. 30Ω), 150ns turn-on time, break-before-make switching, and ±15V analog signal range - enabling accurate signal path control in portable instrumentation and programmable gain amplifiers.
For engineers reviewing the DG303ACJ+ datasheet, DG303ACJ+ pinout, DG303ACJ+ application, or DG303ACJ+ equivalent, key selection criteria include its TTL/CMOS-compatible logic inputs, low charge injection (12pC), sub-100nA off-leakage, and 14-pin plastic DIP package with verified dual SPDT topology.
Technical Context
The DG303ACJ+ implements monolithic CMOS switch architecture with latchup-proof construction and substrate-isolated V+ connection. Its dual SPDT configuration supports independent channel control via IN1/IN2, with S1/D1/S2/D2 terminals enabling bidirectional analog signal routing across full V+ to V− range.
Break-before-make timing (50ns minimum) prevents transient shorting during state transitions, while low 14pF off-capacitance (CS(OFF)/CD(OFF)) and 40pF on-capacitance ensure minimal signal distortion at frequencies up to 500kHz. Charge injection is tightly controlled at 12pC (±15V supplies), critical for sample-and-hold accuracy.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Analog Signal Range | ±15V - supports rail-to-rail analog signals without clipping in ±15V systems |
| On-Resistance (RDS(ON)) | <50Ω typ. 30Ω - ensures minimal voltage drop and signal attenuation in precision paths |
| Turn-On Time (tON) | 150ns max - enables fast multiplexing in data acquisition and telemetry systems |
| Charge Injection | 12pC - limits error voltage in sample-and-hold circuits with 10nF hold capacitors |
| Off-Leakage Current | <1nA at ±14V - preserves signal integrity in high-impedance sensor interfaces |
| Supply Range | ±5V to ±18V or +10V to +30V - flexible operation in battery-powered and industrial rails |
| Logic Compatibility | TTL/CMOS - interoperates directly with microcontrollers and FPGA I/O without level shifters |
Pinout & Package
Package: 14-lead plastic DIP (0.300" wide), JEDEC MS-001, RoHS-compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 14 | V+ | Positive supply rail; also connected to substrate/case for isolation |
| 2, 13 | D2 / D1 | Drain terminals - bidirectional analog outputs/inputs for SPDT channels |
| 3, 12 | N.C. | No-connect pins - electrically isolated, must remain unconnected |
| 4, 11 | S2 / S1 | Source terminals - common analog I/O nodes for SPDT switching |
| 5, 10 | IN2 / IN1 | Digital control inputs - active-high TTL/CMOS logic for channel enable |
| 6, 9 | N.C. | No-connect pins - electrically isolated, must remain unconnected |
| 7 | GND | Ground reference - required for single-supply operation and logic threshold stability |
| 8 | V− | Negative supply rail - tied to GND for single-supply mode (+10V to +30V) |
Key Features
| Feature | Design Value |
|---|---|
| Break-before-make switching | Guarantees 50ns minimum dead time between channel transitions to prevent signal shorting |
| Low on-resistance flatness | <10% matching between channels - maintains gain accuracy in differential or ratiometric circuits |
| Latchup-proof CMOS process | Immune to destructive latchup under overvoltage or ESD stress per JEDEC JESD78 |
| Single-supply capability | V− tied to GND enables operation from +10V to +30V - simplifies power design in portable systems |
| Low charge injection | 12pC maximum - reduces settling error in precision sample-and-hold and ADC front-ends |
Applications
| Portable Instrumentation | Programmable Gain Amplifiers |
|---|---|
Use Scenario: Battery-powered multimeters and handheld oscilloscopes requiring low-quiescent-current signal routing. IC Role / Device Role / Timing Role: Dual SPDT analog switch selecting input ranges and calibration paths with rail-to-rail signal handling. Use Value: 0.5mA total supply current and <50Ω RDS(ON) preserve battery life and measurement linearity. | Use Scenario: Digitally controlled gain stages in medical sensor front-ends and industrial transmitters. IC Role / Device Role / Timing Role: Switching feedback resistors or input attenuators under microcontroller command. Use Value: Break-before-make action prevents momentary open-loop instability during gain changes. |
| Low-Power Sample/Holds | Process Control Telemetry |
Use Scenario: Precision sampling of thermocouple or strain gauge outputs in energy-constrained edge nodes. IC Role / Device Role / Timing Role: Gate for hold capacitor charging with minimal charge injection error. Use Value: 12pC charge injection limits voltage error to ≤1.2mV on 10nF hold capacitors. | Use Scenario: Multiplexing multiple 4–20mA loop sensors into shared analog-to-digital conversion circuitry. IC Role / Device Role / Timing Role: High-voltage-tolerant analog switch isolating sensor channels before conditioning. Use Value: ±15V analog range and <1nA off-leakage maintain loop accuracy across temperature extremes. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual SPDT analog switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX4677CPE+ | Higher RDS(ON) (100Ω), wider temp range (−40°C to +85°C), SO-16 package | Better suited for industrial environments but requires PCB redesign due to different pinout | Select when extended temperature operation is required and layout revision is acceptable |
| ADG419BNZ | Lower RDS(ON) (35Ω), faster tON (100ns), same 14-pin DIP package, but ±15V only | Superior speed and on-resistance, yet lacks single-supply capability (no V−-to-GND mode) | Prefer for high-speed multiplexing where single-supply operation is not needed |
Compared with MAX4677CPE+ and ADG419BNZ, the DG303ACJ+ uniquely balances low on-resistance, break-before-make timing, single-supply flexibility, and legacy-compatible 14-pin DIP packaging - making it optimal for cost-sensitive, space-constrained, and battery-operated designs requiring proven reliability.
Availability
DG303ACJ+ is available at Aetrix Electronics and suitable for portable instrumentation, low-power sample/holds, and programmable gain amplifiers requiring stable component supply and long-term obsolescence management.
Supply support for DG303ACJ+ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) is a U.S.-based semiconductor company specializing in high-performance analog, mixed-signal, and power management ICs for industrial, communications, and consumer markets.
The DG303ACJ+ belongs to Maxim's legacy DG300 family of TTL-compatible CMOS analog switches, designed specifically for low-power, precision signal routing in portable and battery-operated equipment where rail-to-rail analog performance and robust logic interfacing are essential.
FAQ
What is the maximum supply voltage rating for DG303ACJ+?
The DG303ACJ+ supports bipolar supplies up to ±18V (36V total) and single-ended supplies up to +30V. Absolute maximum ratings specify V+ ≤ 36V for DG300–DG303 variants. Operation beyond these limits risks permanent damage, even if within recommended operating conditions. Always observe derating curves for plastic DIP packages above +25°C ambient.
Does DG303ACJ+ support single-supply operation?
Yes, DG303ACJ+ supports single-supply operation by connecting V− to GND. It functions correctly with V+ ranging from +10V to +30V, maintaining full ±V+ analog signal range. Logic thresholds remain compatible with standard TTL/CMOS levels, and all electrical specifications-including on-resistance and leakage-are validated across this range per Table 1 in the datasheet.
What is the pin configuration of DG303ACJ+?
DG303ACJ+ uses a 14-pin plastic DIP package with dual SPDT topology: Pins 1/V+ and 14/V+ (tied together), 2/D2, 4/S2, 5/IN2, 11/S1, 12/D1, 13/IN1, 7/GND, and 8/V−. Pins 3, 6, 9, and 10 are no-connect. This matches the DG303 pinout shown in Figure "DUAL SPDT DG303/DG303A" on page 1 of the datasheet.
Is DG303ACJ+ pin-compatible with older DG303 variants?
Yes, DG303ACJ+ is pin-compatible and electrically compatible with original DG303 and DG303A devices, including DG303CJ and DG303CK. All share identical pinout, logic behavior, and DC/AC characteristics. The 'A' suffix denotes improved process yield and tighter parameter distributions, but no functional or mechanical changes affect compatibility.
What is the typical on-resistance matching between channels in DG303ACJ+?
Typical on-resistance matching between the two SPDT channels of DG303ACJ+ is 10%, as stated in the Applications Information section. This means RDS(ON) variation across channels remains within ±10% under matched bias conditions-critical for ratiometric measurements and differential signal paths where gain consistency matters.
DG303ACJ+ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Packaging:
- Tube
- Product Status:
- Active
- Switch Circuit:
- SPDT
- Multiplexer/Demultiplexer Circuit:
- 2:1
- Number of Circuits:
- 2
- On-State Resistance (Max):
- 50Ohm
- Channel-to-Channel Matching (ΔRon):
- -
- Voltage - Supply, Single (V+):
- -
- Voltage - Supply, Dual (V±):
- ±5V ~ 18V
- Switch Time (Ton, Toff) (Max):
- 300ns, 250ns
- -3db Bandwidth:
- -
- Charge Injection:
- 12pC
- Channel Capacitance (CS(off), CD(off)):
- 14pF, 14pF
- Current - Leakage (IS(off)) (Max):
- 5nA
- Crosstalk:
- -74dB @ 500kHz
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 14-PDIP
DG303ACJ+ FAQ
1.How can I place an order for DG303ACJ+ through Aetrix?
Please submit a Request for Quotation (RFQ) for DG303ACJ+ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DG303ACJ+ reliable?
The price and inventory of DG303ACJ+ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DG303ACJ+ is usually 5 days.
3.What payment methods are accepted for DG303ACJ+?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DG303ACJ+ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DG303ACJ+?
DG303ACJ+ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DG303ACJ+ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DG303ACJ+?
For technical support, including DG303ACJ+ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DG303ACJ+ requirements.
6.How does Aetrix verify that DG303ACJ+ is sourced from the original manufacturer or authorized distributors?
All DG303ACJ+ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DG303ACJ+ meets industry standards.
7.What is the process for return or replacement of DG303ACJ+?
All DG303ACJ+ units undergo pre-shipment inspection (PSI). If there is an issue with DG303ACJ+, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DG303ACJ+ part is unused and in its original packaging.
Return procedure for DG303ACJ+:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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