Vishay Siliconix DG303BDY-E3
- Part No.:
- DG303BDY-E3
- Manufacturer:
- Vishay Siliconix
- Package:
- 14-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
DG303BDY-E3.pdf
- Description:
- IC SW DPST-NO/NCX2 50OHM 14SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:290
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
DG303BDY-E3 from Vishay Siliconix is a dual SPDT CMOS analog switch IC designed for precision signal routing in instrumentation and process control systems. It supports ±15 V analog signal range, exhibits 30 Ω typical on-resistance, 150 ns turn-on time, and operates with dual supplies (±15 V) or single supply (V− = 0 V). It is used in programmable gain amplifiers requiring break-before-make switching.
For engineers reviewing the DG303BDY-E3 datasheet, DG303BDY-E3 pinout, DG303BDY-E3 application, or DG303BDY-E3 equivalent, key selection criteria include guaranteed rail-to-rail analog swing, low charge injection (8 pC), off-isolation of 62 dB at 500 kHz, and SOIC-14 packaging compatible with automated PCB assembly.
Technical Context
The DG303BDY-E3 implements two independent SPDT switches with break-before-make timing (50 ns typical) to prevent signal shorting during state transitions. Each switch conducts bidirectionally with no offset voltage and maintains low leakage (<±0.1 nA at 85 °C) across its full ±15 V analog range.
It uses Vishay's PLUS-40 CMOS process with epitaxial isolation to ensure latch-up immunity and supports logic-level compatibility (VINH ≥ 4 V, VINL ≤ 0.8 V) with both CMOS and quasi-TTL drivers. Power dissipation is 3.5 mW typical under active operation.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Analog Signal Range | ±15 V - Enables full rail-to-rail signal handling without clipping in bipolar systems. |
| On-Resistance (RDS(on)) | 30 Ω typ. - Minimizes signal attenuation and gain error in precision amplifier paths. |
| Turn-On Time (tON) | 150 ns - Supports high-speed multiplexing up to ~3 MHz without significant settling delay. |
| Charge Injection | 8 pC - Limits output voltage glitch in sample-and-hold or switched-capacitor circuits. |
| Off Isolation (OIRR) | 62 dB at 500 kHz - Ensures >1,200:1 signal rejection between unselected channels. |
| Supply Current (I+, I−) | 0.23 mA / −0.001 µA - Enables low-power operation in battery-powered instrumentation. |
| Break-Before-Make Time | 50 ns - Guarantees no overlap conduction between S1/D1 and S2/D2 paths. |
Pinout & Package
Package: 14-pin SOIC (Small Outline Integrated Circuit), RoHS-compliant lead (Pb)-free termination per DG303BDY-E3 ordering code. Body dimensions: 8.75 mm × 4.00 mm × 1.75 mm (D × E × A).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (S4) | Switch Output 4 | Second SPDT common terminal - connects to D3 or D4 based on IN2 logic state. |
| 2 (D2) | Drain 2 | Second SPDT normally-open path drain - carries analog signal when SW2 is ON. |
| 3 (NC) | No Connect | Internally unconnected - must remain floating or grounded per layout guidelines. |
| 4 (S3) | Switch Output 3 | Second SPDT common terminal - connects to D3 or D4 based on IN2 logic state. |
| 5 (IN1) | Digital Control Input 1 | Controls first SPDT switch (SW1/SW2); logic high enables S1→D1 path. |
| 6 (D4) | Drain 4 | Second SPDT normally-closed path drain - carries analog signal when SW2 is OFF. |
| 7 (V−) | Negative Supply Rail | Bias reference for analog channel - set to −15 V (dual) or 0 V (single supply). |
| 8 (GND) | Ground Reference | Logic and substrate reference - must be low-impedance connection to minimize noise coupling. |
| 9 (V+) | Positive Supply Rail | Bias reference for analog channel - set to +15 V (dual) or +15 V (single supply). |
| 10 (IN2) | Digital Control Input 2 | Controls second SPDT switch (SW3/SW4); logic high enables S3→D3 path. |
| 11 (D1) | Drain 1 | First SPDT normally-open path drain - carries analog signal when SW1 is ON. |
| 12 (S1) | Switch Output 1 | First SPDT common terminal - connects to D1 or D2 based on IN1 logic state. |
| 13 (D3) | Drain 3 | Second SPDT normally-open path drain - carries analog signal when SW3 is ON. |
| 14 (S2) | Switch Output 2 | First SPDT common terminal - connects to D1 or D2 based on IN1 logic state. |
Key Features
| Feature | Design Value |
|---|---|
| Latch-up proof design | Epitaxial layer prevents destructive latch-up even under overvoltage transients up to ±44 V. |
| Rail-to-rail analog switching | Supports input signals from V− to V+ without distortion - critical for ±15 V op-amp interfaces. |
| Low off-leakage current | ±0.1 nA max at 85 °C - preserves accuracy in high-impedance sensor front-ends and integrators. |
| CMOS and quasi-TTL compatible | Accepts 0.8 V/4 V logic thresholds - eliminates need for level-shifting in mixed-supply systems. |
| Break-before-make timing | 50 ns guaranteed separation - prevents momentary shorting in gain-switching amplifier topologies. |
Applications
| Programmable Gain Amplifier | Instrumentation Multiplexer |
|---|---|
Use Scenario: Digitally selecting resistor networks to configure op-amp closed-loop gain (e.g., AV = 1, 10, 100) in data acquisition front-ends. IC Role / Device Role / Timing Role: Dual SPDT switch routing feedback resistors into amplifier loop while maintaining break-before-make timing. Use Value: Enables precise, glitch-free gain changes without signal interruption or transient spikes due to 8 pC charge injection and 50 ns tOPEN. | Use Scenario: Scanning multiple sensor inputs (thermocouples, strain gauges) into a single ADC channel in industrial PLC modules. IC Role / Device Role / Timing Role: Low-leakage analog multiplexer providing <±0.1 nA channel isolation at 85 °C for high-Z sources. Use Value: Maintains measurement integrity across 16+ channels with minimal crosstalk (74 dB) and 62 dB off-isolation at 500 kHz. |
| Battery-Powered Data Logger | Process Control Signal Router |
Use Scenario: Routing analog sensor outputs through low-power signal conditioning before digitization in portable environmental monitors. IC Role / Device Role / Timing Role: Low-quiescent-current analog switch (3.5 mW typ.) enabling extended battery life in always-on monitoring. Use Value: Delivers 150 ns switching speed without sacrificing power efficiency - ideal for duty-cycled sampling architectures. | Use Scenario: Isolating and routing 4–20 mA transmitter outputs or ±10 V control signals in distributed control system (DCS) I/O modules. IC Role / Device Role / Timing Role: Precision analog switch supporting full ±15 V signal range and immune to latch-up in noisy plant-floor environments. Use Value: Withstands ±44 V absolute max ratings and provides robust 30 Ω RDS(on) stability across temperature for repeatable calibration. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual SPDT analog switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX4677ESE+ | Higher RDS(on) (45 Ω typ.), lower off-isolation (55 dB), same SOIC-14 package. | Less suitable for precision gain-setting where <30 Ω matching is required. | Select DG303BDY-E3 when on-resistance matching and charge injection are critical. |
| ADG1434BRUZ | Quad SPDT, higher supply voltage (±22 V), 10 Ω RDS(on), but larger TSSOP-20 package. | Requires PCB redesign; better for multi-channel systems needing tighter on-resistance specs. | Choose DG303BDY-E3 for space-constrained dual-channel designs with proven SOIC-14 manufacturability. |
Compared with MAX4677ESE+ and ADG1434BRUZ, DG303BDY-E3 delivers optimal balance of low on-resistance (30 Ω), low charge injection (8 pC), and industry-standard SOIC-14 footprint - making it preferred for cost-sensitive, high-accuracy dual-path routing where layout reuse and thermal stability matter.
Availability
DG303BDY-E3 is available at Aetrix Electronics and suitable for programmable gain amplifiers, instrumentation multiplexers, battery-powered data loggers, process control signal routers, and low-leakage sensor interface circuits requiring stable component supply across industrial temperature ranges (−40 °C to +85 °C).
Supply support for DG303BDY-E3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay Siliconix is a global semiconductor manufacturer specializing in discrete components and analog ICs, with emphasis on reliability, precision, and ruggedness for industrial and automotive markets.
The DG300B family-including DG303BDY-E3-is engineered for high-fidelity analog signal routing in instrumentation, process control, and communications equipment where low leakage, rail-to-rail operation, and latch-up immunity are mandatory.
FAQ
What is the maximum analog signal voltage range supported by DG303BDY-E3?
DG303BDY-E3 supports a full ±15 V analog signal range when operated with dual supplies (V+ = +15 V, V− = −15 V). This allows undistorted switching of rail-to-rail signals in bipolar systems. The device also supports single-supply operation (V− = 0 V), limiting the analog range to 0 V to +15 V. Absolute maximum analog voltage is clamped to V+ + 2 V and V− − 2 V by internal protection diodes.
Does DG303BDY-E3 require external pull-up or pull-down resistors on its digital control inputs?
No, DG303BDY-E3 does not require external pull-up or pull-down resistors. Its digital inputs are CMOS-compatible with defined logic thresholds: VINH ≥ 4 V for "high" and VINL ≤ 0.8 V for "low". Input leakage is extremely low (±1 µA max), so the driving source must only meet these voltage levels - no additional biasing is needed for proper switching behavior.
Can DG303BDY-E3 be used in single-supply systems with V− tied to ground?
Yes, DG303BDY-E3 supports single-supply operation by connecting V− to 0 V (GND). In this configuration, the analog signal range becomes 0 V to V+ (e.g., 0 V to +15 V), and logic inputs retain the same 0.8 V / 4 V thresholds. Note that RDS(on) increases slightly and switching speed decreases modestly compared to dual-supply operation - refer to Figure 5 and Typical Characteristics on page 8 of the datasheet for exact trade-offs.
What is the thermal performance of DG303BDY-E3 in SOIC-14 package?
In SOIC-14 package, DG303BDY-E3 has a power dissipation rating of 600 mW at 25 °C, derating linearly at 7.6 mW/°C above 75 °C. At full load (two switches conducting 10 mA each at 30 Ω), power dissipation remains below 10 mW - well within safe operating limits. Junction-to-ambient thermal resistance (θJA) is approximately 208 °C/W, allowing reliable operation up to +85 °C ambient without heatsinking.
Is DG303BDY-E3 pin-compatible with other members of the DG300B family like DG301BDJ-E3?
No, DG303BDY-E3 is not pin-compatible with DG301BDJ-E3. DG303BDY-E3 is a dual SPDT switch in SOIC-14 package with dedicated IN1/IN2 controls and four drain pins (D1–D4), whereas DG301BDJ-E3 is a single SPDT in 14-pin DIP with different pin mapping (e.g., shared IN, S1/S2, D1/D2). Pinouts differ significantly across DG300B variants - always verify against the specific functional block diagram for DG303B on page 2 of document 71402.
DG303BDY-E3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay Siliconix
- Series:
- -
- Packaging:
- Tube
- Product Status:
- Active
- Switch Circuit:
- DPST - NO/NC
- Multiplexer/Demultiplexer Circuit:
- 2:1
- Number of Circuits:
- 2
- On-State Resistance (Max):
- 50Ohm
- Channel-to-Channel Matching (ΔRon):
- -
- Voltage - Supply, Single (V+):
- -
- Voltage - Supply, Dual (V±):
- ±15V
- Switch Time (Ton, Toff) (Max):
- 300ns, 250ns
- -3db Bandwidth:
- -
- Charge Injection:
- 8pC
- Channel Capacitance (CS(off), CD(off)):
- 14pF, 14pF
- Current - Leakage (IS(off)) (Max):
- 1nA
- Crosstalk:
- -74dB @ 500kHz
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-SOIC
DG303BDY-E3 FAQ
1.How can I place an order for DG303BDY-E3 through Aetrix?
Please submit a Request for Quotation (RFQ) for DG303BDY-E3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DG303BDY-E3 reliable?
The price and inventory of DG303BDY-E3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DG303BDY-E3 is usually 5 days.
3.What payment methods are accepted for DG303BDY-E3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DG303BDY-E3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DG303BDY-E3?
DG303BDY-E3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DG303BDY-E3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DG303BDY-E3?
For technical support, including DG303BDY-E3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DG303BDY-E3 requirements.
6.How does Aetrix verify that DG303BDY-E3 is sourced from the original manufacturer or authorized distributors?
All DG303BDY-E3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DG303BDY-E3 meets industry standards.
7.What is the process for return or replacement of DG303BDY-E3?
All DG303BDY-E3 units undergo pre-shipment inspection (PSI). If there is an issue with DG303BDY-E3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DG303BDY-E3 part is unused and in its original packaging.
Return procedure for DG303BDY-E3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
DG303BDY-E3 Tags

-
SN74LVC1G3157DBVR
Texas Instruments
-
SN74LVC1G66DBVR
Texas Instruments
-
SN74LVC1G66DCKR
Texas Instruments

-
SN74LVC1G3157DSFR
Texas Instruments

-
1P1G3157QDCKRQ1
Texas Instruments

-
SN74LVC2G66DCUR
Texas Instruments
-
SN74LV4052APWR
Texas Instruments

-
74HC4051D,653
Nexperia USA Inc.
-
SN74LV4051APWR
Texas Instruments
-
CD74HC4052PWR
Texas Instruments
-
CD74HC4051PWR
Texas Instruments
-
TS5A3166DBVR
Texas Instruments
Tech Hub
Schmitt triggers use separate rising and falling thresholds to stabilize slow or noisy signals. This guide covers hysteresis, 74HC14 and 74HCT14 selection, comparator calculations, RC oscillators and p…
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…

