Analog Devices Inc./Maxim Integrated DG307ACWE
- Part No.:
- DG307ACWE
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Package:
- 16-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
DG307ACWE.pdf
- Description:
- IC SWITCH SPDT X 2 50OHM 16SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:4,645
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
DG307ACWE from Maxim Integrated is a dual SPDT CMOS analog switch with 15Ω on-resistance, ±15V supply capability, and 100pA leakage current at 25°C, designed for precision signal routing in test instrumentation and data acquisition systems.
For engineers reviewing the DG307ACWE datasheet, DG307ACWE pinout, DG307ACWE application, or DG307ACWE equivalent, key selection criteria include channel count, on-resistance matching (max 1Ω), break-before-make timing, and SOIC-16 package compatibility with industrial temperature range operation.
Technical Context
The DG307ACWE integrates two independent SPDT switches sharing common control logic, each with matched n-channel and p-channel MOSFETs to ensure symmetrical conduction and low charge injection (20pC). It operates from dual ±5V to ±15V supplies or single +5V to +30V rails.
Its internal architecture provides guaranteed break-before-make switching (minimum 20ns), rail-to-rail analog signal handling up to ±13.5V, and TTL/CMOS-compatible digital inputs with 0.8V/2.0V thresholds - enabling direct interfacing with microcontrollers without level-shifting.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Switch Type | Dual SPDT - enables independent routing of two analog signals between two destinations each |
| On-Resistance (max) | 15Ω at ±15V - ensures minimal signal attenuation and gain error in precision DC/low-frequency paths |
| Leakage Current (max) | 100pA at 25°C - preserves accuracy in high-impedance sensor front-ends and integrator circuits |
| Supply Voltage Range | ±5V to ±15V dual or +5V to +30V single - supports legacy industrial rails and mixed-signal system integration |
| Charge Injection | 20pC - limits voltage glitch and settling time in sample-and-hold and multiplexed ADC applications |
| Turn-On/Turn-Off Time | 150ns/100ns - enables reliable switching at up to 1MHz multiplexing rates without crosstalk-induced distortion |
Pinout & Package
Package: 16-pin SOIC (SOICW), 7.6mm × 10.3mm body, 1.27mm pitch, JEDEC MS-013 compliant, rated for –40°C to +85°C operation.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2, 3, 4 | Analog Inputs/Outputs (X1A, X1B, X2A, X2B) | Four switched analog terminals - each pair (X1A/X1B, X2A/X2B) connects to one SPDT switch's outputs |
| 5, 10 | Common Analog Terminals (Y1, Y2) | Two independent input/output nodes - each serves as the common path for its respective SPDT switch |
| 6, 11 | Control Inputs (S1, S2) | Digital select lines - high = connect Y to A, low = connect Y to B, TTL/CMOS compatible |
| 7, 14 | Power Supplies (V+, V–) | Dual supply pins - support symmetric ±15V or asymmetric rails; no internal regulation required |
| 8, 15 | Ground (GND) | Signal reference and substrate tie - both pins must be connected to minimize ground bounce and crosstalk |
| 12, 13 | Enable Inputs (EN1, EN2) | Active-low enable - disables switch output impedance >10⁹Ω when asserted, isolating channels completely |
Key Features
| Feature | Design Value |
|---|---|
| Break-before-make switching | Guaranteed minimum 20ns dead time prevents momentary shorting during state transitions |
| On-resistance matching | ≤1Ω between channels - maintains signal integrity in differential or ratiometric measurement paths |
| Rail-to-rail analog swing | Supports signals from V– to V+ - eliminates clipping in ±12V op-amp interfaces and DAC output stages |
| Low charge injection | 20pC maximum - reduces hold-step error in 16-bit+ sampling systems without external correction |
| Enable-controlled channel isolation | EN1/EN2 independently disable each SPDT - enables power-gating and fault containment per channel |
Applications
| Automated Test Equipment (ATE) | Data Acquisition Systems (DAQ) |
|---|---|
Use Scenario: Multiplexing multiple sensor inputs into a shared ADC channel under microcontroller control. IC Role / Device Role / Timing Role: Dual SPDT analog switch providing channel-selectable signal routing with sub-200ns switching and <100pA leakage. Use Value: Enables 16-channel scanning at 1kHz without measurable offset drift or cross-talk-induced measurement error. | Use Scenario: Isolating calibration references from measurement paths during self-test sequences. IC Role / Device Role / Timing Role: Precision analog switch with enable-controlled high-impedance state and rail-to-rail signal handling. Use Value: Prevents reference loading during active measurement, preserving 0.01% full-scale accuracy across temperature. |
| Industrial Process Control | Medical Instrumentation |
Use Scenario: Routing analog outputs from multiple PLC modules to a centralized analog output driver. IC Role / Device Role / Timing Role: Dual SPDT switch operating from ±12V supplies with 15Ω on-resistance and matched RON. Use Value: Maintains loop-current accuracy within ±0.1% over 4–20mA transmitter outputs without external trimming. | Use Scenario: Selecting between ECG lead configurations (I, II, III, aVR, aVL, aVF) in portable patient monitors. IC Role / Device Role / Timing Role: Low-leakage, low-charge-injection analog switch supporting ±5V biopotential signals. Use Value: Limits baseline wander and motion artifact in 12-bit ECG digitization at 500SPS sampling rate. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual SPDT analog switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX307CPE+ | Same die, PDIP-16 package; higher thermal resistance (70°C/W vs. 55°C/W); no moisture sensitivity level rating | Suitable for lab prototypes and low-volume PCBs where SOIC reflow is unavailable | Select when hand-soldering or socket-based validation is required |
| ADG407BRUZ | 16-bit compatible, but 24Ω on-resistance, 2nA leakage at 25°C, and no guaranteed break-before-make | Better suited for lower-precision, higher-voltage (±20V) applications where leakage tolerance >1nA | Select when wider supply range outweighs leakage and switching integrity requirements |
Compared with DG307ACWE, MAX307CPE+ offers identical electrical performance in through-hole assembly, while ADG407BRUZ trades off leakage and timing guarantees for extended voltage range - making DG307ACWE optimal for precision, low-drift multiplexing where channel integrity is critical.
Availability
DG307ACWE is available at Aetrix Electronics and suitable for automated test equipment, industrial process controllers, and medical instrumentation requiring stable component supply and long-term manufacturability.
Supply support for DG307ACWE includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) designs precision analog, mixed-signal, and power management ICs for industrial, automotive, and communications applications.
The DG307ACWE belongs to Maxim's legacy CMOS analog switch family, engineered for high-accuracy signal routing in environments demanding low leakage, matched on-resistance, and robust supply flexibility.
FAQ
What is the maximum supply voltage rating for DG307ACWE?
The DG307ACWE supports dual supplies from ±5V to ±15V or a single supply from +5V to +30V. Operation beyond ±15V or +30V risks permanent damage. The device maintains specified on-resistance and leakage performance only within these ranges, and absolute maximum ratings must not be exceeded during power-up sequencing or transient conditions. DG307ACWE requires proper decoupling on V+ and V– pins to prevent latch-up.
Does DG307ACWE support break-before-make switching, and is it guaranteed?
Yes, DG307ACWE guarantees break-before-make operation with a minimum dead time of 20ns between channel disconnect and reconnect events. This is ensured by internal timing circuitry and is specified across temperature and supply voltage. DG307ACWE's guaranteed timing eliminates risk of signal shorting during multiplexing - critical in high-impedance or current-loop applications where even nanosecond overlap could cause measurement corruption or system fault.
What is the typical charge injection value for DG307ACWE, and how does it affect sample-and-hold circuits?
DG307ACWE specifies a maximum charge injection of 20pC, with typical values near 12pC at ±15V supplies. In sample-and-hold applications, this injected charge causes a step error at the hold capacitor, directly impacting settling time and effective resolution. For a 10nF hold capacitor, 20pC yields ~2mV glitch - manageable in 12-bit systems but requiring compensation in 16-bit+ DAQ. DG307ACWE's low, tightly specified charge injection makes it suitable for precision sampling without external nulling circuitry.
Can DG307ACWE operate with unbalanced dual supplies, such as +12V and –5V?
Yes, DG307ACWE accepts asymmetric dual supplies - for example, +12V on V+ and –5V on V– - as long as the total voltage difference (V+ – V–) does not exceed 30V and neither supply violates its respective absolute maximum rating. DG307ACWE maintains full functionality and parameter specifications under such conditions, enabling integration into mixed-rail systems like those combining ±12V op-amps with 5V logic. Ensure GND is referenced to the system common point.
Is DG307ACWE pin-compatible with other devices in the DG30x family?
Yes, DG307ACWE is pin-compatible with DG304A, DG305A, DG306A, and DG307A in the same SOIC-16 package - all share identical pinout, supply connections, and control logic. However, internal configuration differs: DG304A is single SPST x4, DG305A is dual SPST, DG306A is single SPDT, and DG307ACWE is dual SPDT. Functional replacement requires verifying switch topology match; DG307ACWE cannot substitute for DG304A without redesigning signal routing.
DG307ACWE Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Packaging:
- Tube
- Product Status:
- Obsolete
- Switch Circuit:
- SPDT
- Multiplexer/Demultiplexer Circuit:
- 2:1
- Number of Circuits:
- 2
- On-State Resistance (Max):
- 50Ohm
- Channel-to-Channel Matching (ΔRon):
- -
- Voltage - Supply, Single (V+):
- -
- Voltage - Supply, Dual (V±):
- ±5V ~ 18V
- Switch Time (Ton, Toff) (Max):
- 250ns, 150ns
- -3db Bandwidth:
- -
- Charge Injection:
- 12pC
- Channel Capacitance (CS(off), CD(off)):
- 14pF, 14pF
- Current - Leakage (IS(off)) (Max):
- 5nA
- Crosstalk:
- -74dB @ 500kHz
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
DG307ACWE FAQ
1.How can I place an order for DG307ACWE through Aetrix?
Please submit a Request for Quotation (RFQ) for DG307ACWE on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DG307ACWE reliable?
The price and inventory of DG307ACWE are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DG307ACWE is usually 5 days.
3.What payment methods are accepted for DG307ACWE?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DG307ACWE transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DG307ACWE?
DG307ACWE orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DG307ACWE order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DG307ACWE?
For technical support, including DG307ACWE datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DG307ACWE requirements.
6.How does Aetrix verify that DG307ACWE is sourced from the original manufacturer or authorized distributors?
All DG307ACWE products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DG307ACWE meets industry standards.
7.What is the process for return or replacement of DG307ACWE?
All DG307ACWE units undergo pre-shipment inspection (PSI). If there is an issue with DG307ACWE, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DG307ACWE part is unused and in its original packaging.
Return procedure for DG307ACWE:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
DG307ACWE Tags

-
SN74LVC1G3157DBVR
Texas Instruments
-
SN74LVC1G66DBVR
Texas Instruments
-
SN74LVC1G66DCKR
Texas Instruments

-
SN74LVC1G3157DSFR
Texas Instruments

-
1P1G3157QDCKRQ1
Texas Instruments

-
SN74LVC2G66DCUR
Texas Instruments
-
SN74LV4052APWR
Texas Instruments

-
74HC4051D,653
Nexperia USA Inc.
-
SN74LV4051APWR
Texas Instruments
-
CD74HC4052PWR
Texas Instruments
-
CD74HC4051PWR
Texas Instruments
-
TS5A3166DBVR
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

