Renesas DG401DY

Overview

DG401DY from Intersil is a dual single-pole single-throw (SPST) monolithic CMOS analog switch with TTL/CMOS-compatible digital inputs, 45 Ω max ON resistance, 150 ns max turn-on time, and ±15 V analog signal range - used in precision sample-and-hold circuits, audio routing, and data acquisition systems where low charge injection and rail-to-rail analog handling are critical.

For engineers reviewing the DG401DY datasheet, DG401DY pinout, DG401DY application, or DG401DY equivalent, this page delivers verified specifications, functional pin mapping, real-world use cases, and validated alternative parts for high-reliability analog switching designs requiring low leakage (<5 nA), fast settling, and dual-channel isolation.

Technical Context

The DG401DY implements two independent bilateral SPST switches using a high-voltage silicon-gate CMOS process, enabling operation across ±5 V to ±17 V split supplies or +5 V to +34 V single-ended supplies. Its epitaxial layer prevents latch-up, supporting robust operation in industrial and hi-rel environments.

Each switch exhibits matched ON resistance (Δr_DS(ON) ≤ 5 Ω), low charge injection (60 pC typ), and <0.01 μA logic supply current - ensuring minimal signal distortion and negligible power impact in battery-operated or low-noise systems.

Key Specifications

Pinout & Package

Package: 16-lead SOIC (M16.15), 7.5 mm × 10.3 mm body, 1.27 mm pitch, RoHS-compliant matte tin finish.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual SPST analog switching applications.

Compared with HI-5041 and ADG1419BRUZ, DG401DY uniquely balances rail-to-rail ±15 V analog handling, 45 Ω ON resistance, and 150 ns speed in a split-supply architecture - making it irreplaceable for precision bipolar data acquisition and legacy-compatible layouts.

Availability

DG401DY is available at Aetrix Electronics and suitable for audio switching, data acquisition, and sample-and-hold applications requiring stable component supply, long-term lifecycle assurance, and RoHS-compliant manufacturing.

Supply support for DG401DY includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Intersil Corporation (now part of Renesas Electronics) is a U.S.-based semiconductor company specializing in high-performance analog and mixed-signal ICs for industrial, aerospace, and communications markets.

The DG401DY belongs to Intersil's monolithic CMOS analog switch family, designed specifically for precision signal routing in high-reliability systems demanding low leakage, latch-up immunity, and wide analog voltage range operation.

FAQ

What is the maximum analog signal voltage the DG401DY can handle?

The DG401DY supports an analog signal range of ±15 V, enabling 30 V_P-P signal handling. This is guaranteed under its absolute maximum rating of V+ to V− ≤ 44 V and operating voltage range of ±5 V to ±17 V. The device maintains low ON-resistance and minimal distortion across this full range, making DG401DY suitable for bipolar instrumentation and audio applications where rail-to-rail swing is essential.

Is the DG401DY pin-compatible with the HI-5041?

Yes, the DG401DY is pin-compatible with the HI-5041, as confirmed in the datasheet's "Features" section stating "DG401 Dual SPST; Same Pinout as HI-5041". Both devices share identical 16-pin SOIC placement, terminal assignments (including NC pins), and functional mapping - allowing direct replacement on existing PCBs without layout modification, provided timing and resistance specs meet system requirements.

Does the DG401DY support single-supply operation?

Yes, the DG401DY supports single-supply operation from +5 V to +34 V. In this configuration, V− is connected to ground, V+ to the positive rail, and analog signals referenced accordingly. The datasheet specifies that the analog input range remains ±15 V relative to the midpoint of V+ and V− - so with V− = 0 V and V+ = 30 V, the usable analog range is 0 V to 30 V. DG401DY retains all key specs including 45 Ω r_DS(ON) and 150 ns t_ON under single-supply conditions.

What is the charge injection specification for the DG401DY, and why does it matter?

The DG401DY has a typical charge injection of 60 pC, measured with CL = 10 nF and VG = 0 V. This parameter quantifies the net charge transferred to the hold capacitor during switch transition - directly impacting hold-step error in sample-and-hold circuits. For example, with a 10 nF capacitor, 60 pC injection causes a 6 mV step, which is <1 LSB in a 12-bit 10 V full-scale system. Low charge injection makes DG401DY especially valuable in precision data acquisition where DG401DY minimizes post-acquisition settling time and calibration burden.

How does the DG401DY achieve latch-up immunity?

The DG401DY achieves latch-up immunity through an epitaxial layer integrated into its high-voltage silicon-gate CMOS process. This structural enhancement prevents parasitic SCR formation under transient overvoltage or high-current stress - a known failure mode in older CMOS analog switches. As stated in the datasheet, this improvement "prevents the latch-up associated with older CMOS technologies", allowing DG401DY to operate reliably in noisy industrial environments and high-reliability systems without external protection circuitry.