Renesas DG401DYZ-T

Overview

DG401DYZ-T from Intersil is a dual single-pole single-throw (SPST) monolithic CMOS analog switch with TTL/CMOS-compatible digital inputs, 45 Ω maximum ON resistance, 150 ns maximum turn-on time, and ±15 V analog signal range. It operates from split supplies (±5 V to ±17 V) or single +5 V to +34 V, and is used in precision sample-and-hold circuits where low charge injection (<60 pC) and low leakage (<5 nA) are critical.

For engineers reviewing the DG401DYZ-T datasheet, DG401DYZ-T pinout, DG401DYZ-T application, or DG401DYZ-T equivalent, key selection criteria include its bilateral analog conduction, latch-up immunity via epitaxial isolation, RoHS-compliant Pb-free SOIC-16 package, and compatibility with battery-operated and high-reliability data acquisition systems.

Technical Context

The DG401DYZ-T implements two independent SPST switches using a high-voltage silicon-gate CMOS process, enabling 44 V maximum V+–V− rating and operation across ±15 V analog input ranges without significant rDS(ON) variation. Its internal epitaxial layer prevents latch-up, distinguishing it from legacy CMOS analog switches.

Each switch exhibits matched ON resistance (ΔrDS(ON) ≤ 5 Ω over temperature), low OFF capacitance (12 pF per terminal), and sub-100 ns switching transitions under 300 Ω/35 pF load conditions - supporting high-fidelity audio routing and fast-sampling instrumentation interfaces.

Key Specifications

Pinout & Package

Package: 16-lead SOIC (Pb-free, RoHS-compliant, JEDEC MS-012-AC / M16.15), body size 10.0 mm × 4.0 mm × 1.75 mm, standard pitch 1.27 mm.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar analog switch applications.

Compared with HI-5041 and ADG1419BRUZ, DG401DYZ-T uniquely balances 45 Ω ON resistance, ±15 V analog range, and TTL/CMOS compatibility in a Pb-free SOIC-16 - making it optimal for cost-sensitive, mid-voltage industrial data loggers and battery-powered test gear where extended temperature or ultra-low RON is not required.

Availability

DG401DYZ-T is available at Aetrix Electronics and suitable for audio switching, data acquisition, and sample-and-hold circuits requiring stable component supply, long-term lifecycle support, and RoHS-compliant manufacturing.

Supply support for DG401DYZ-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Intersil Corporation (now part of Renesas Electronics) is a U.S.-based semiconductor company specializing in high-performance analog and mixed-signal ICs for industrial, aerospace, and communications markets.

The DG401DYZ-T belongs to Intersil's monolithic CMOS analog switch product line, designed specifically for precision signal routing in environments demanding low distortion, high OFF isolation, and robust supply flexibility.

FAQ

What is the maximum analog signal voltage range supported by DG401DYZ-T?

DG401DYZ-T supports an analog signal range of ±15 V when operated with split supplies (e.g., V+ = +15 V, V− = −15 V). This allows full-rail switching of bipolar signals without clipping or distortion, and is validated across the full −40°C to +85°C operating temperature range. The device's 44 V maximum V+–V− rating enables safe operation even with transient overvoltages.

Does DG401DYZ-T require separate logic and analog supply rails?

Yes - DG401DYZ-T uses three distinct supply connections: V+ and V− for analog switching, and VL for logic threshold setting. VL may be tied to V+ for CMOS-level compatibility or to +5 V for TTL compatibility. GND serves as the digital reference. This separation prevents digital noise from coupling into sensitive analog paths and ensures stable switching thresholds across supply variations.

Can DG401DYZ-T be used in single-supply configurations?

Yes - DG401DYZ-T supports single-supply operation from +5 V to +34 V. In this mode, V− is connected to ground, V+ is the positive rail, and analog signals swing from 0 V up to V+ − 1.5 V (limited by internal level-shifter headroom). The ±15 V analog range specification applies only to split-supply operation; single-supply usable range is 0 V to (V+ − 1.5 V).

What is the significance of "DG401DYZ-T" suffix "-T"?

The "-T" suffix in DG401DYZ-T indicates tape-and-reel packaging - standard for automated SMT placement. The base part DG401DYZ denotes the Pb-free SOIC-16 variant (M16.15 package, RoHS-compliant matte tin finish), while "-T" specifies 2.5 k-unit reel quantity, EIA-481-compliant carrier tape, and humidity-sensitive level 1 (non-dry-pack) handling per J-STD-020.

How does DG401DYZ-T achieve latch-up immunity?

DG401DYZ-T achieves latch-up immunity through an epitaxial layer integrated into its high-voltage silicon-gate CMOS process. This layer electrically isolates the NMOS and PMOS switch transistors from the substrate, preventing parasitic SCR formation under overvoltage, ESD, or rapid supply transients - a known failure mode in older bulk-CMOS analog switches.