Vishay Siliconix DG403BDY-T1
- Part No.:
- DG403BDY-T1
- Manufacturer:
- Vishay Siliconix
- Package:
- 16-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
DG403BDY-T1.pdf
- Description:
- IC SW SPST-NO/NCX4 45OHM 16SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:1,897
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
DG403BDY-T1 from Vishay Siliconix is a quad SPST analog switch with break-before-make switching action, ±15 V analog signal range, 23 Ω typical on-resistance, 100 ns turn-on time, and TTL/CMOS-compatible digital control-designed for stereo audio routing in telecom PBX systems.
For engineers reviewing the DG403BDY-T1 datasheet, DG403BDY-T1 pinout, DG403BDY-T1 application, or DG403BDY-T1 equivalent, this page delivers verified pin mapping, real-world timing behavior under ±15 V dual supply, leakage performance at temperature extremes, and validated alternatives for audio/video multiplexing and sample-and-hold circuits.
Technical Context
The DG403BDY-T1 implements four independent SPST switches in NO/NC configuration with guaranteed break-before-make timing (5–12 ns delay) to prevent signal shorting during state transitions. Its silicon-gate CMOS process enables rail-to-rail analog conduction and flat on-resistance (<3 Ω variation) across the full ±15 V input range.
It operates from dual supplies up to ±22 V (44 V total), supports single-supply mode, and features 40 pA channel-on leakage at room temperature-critical for precision sampling and low-distortion audio switching where charge injection (60 pC) and off-isolation (–81.7 dB at 1 MHz) directly impact signal fidelity.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Analog Signal Range | ±15 V - supports full-range bipolar audio and instrumentation signals without clipping |
| On-Resistance (RDS(on)) | 23 Ω typ - ensures minimal insertion loss and voltage drop in signal paths |
| Turn-On Time (tON) | 100 ns - enables reliable switching at audio sample rates up to 5 MHz |
| Break-Before-Make Delay (tD) | 5–12 ns - prevents momentary short-circuit between NC and NO paths during transition |
| Channel-On Leakage (ID(on)) | 40 pA max - preserves accuracy in high-impedance sample-and-hold and sensor interfaces |
| Supply Voltage Range | ±22 V max (44 V total) - accommodates industrial and telecom power rails |
| Charge Injection | 60 pC - limits voltage glitch on hold capacitors in precision ADC front-ends |
Pinout & Package
Package: 16-pin narrow SOIC (JEDEC MS-012), 3.9 × 9.9 mm body, 1.27 mm pitch, RoHS-compliant matte tin terminations.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 3, 5, 7 (D1–D4) | Switch Drain (NO) | Normally-open analog output terminals; conduct when corresponding INx = HIGH |
| 2, 4, 6, 8 (S1–S4) | Switch Source (Common) | Shared analog input node for each SPST pair; bidirectional conduction path |
| 9 (IN1) | Digital Control Input | Active-high logic input controlling S1/D1 and S2/D2 (SW1/SW2) |
| 10 (IN2) | Digital Control Input | Active-high logic input controlling S3/D3 and S4/D4 (SW3/SW4) |
| 11 (V−) | Negative Supply Rail | Bias reference for analog signal swing; must be ≤ –0.3 V below GND for valid operation |
| 12 (GND) | Ground Reference | Logic and analog common return; decoupling required within 10 mm of pins 11 and 14 |
| 13 (V+) | Positive Supply Rail | Bias reference for analog signal swing; must be ≥ +0.3 V above GND for valid operation |
| 14–16 (NC) | No Connect | Internally unconnected; must remain floating or tied to GND per layout guidelines |
Key Features
| Feature | Design Value |
|---|---|
| Break-before-make switching | Guaranteed 5–12 ns delay prevents cross-conduction in SPDT-equivalent routing |
| Rail-to-rail analog conduction | Operates with signals from V− to V+; no dead zone near supply rails |
| Low charge injection (60 pC) | Minimizes voltage step on hold capacitors in precision sampling circuits |
| Flat on-resistance vs. voltage | ΔRDS(on) ≤ 3 Ω over ±15 V range-ensures consistent gain and THD in audio paths |
| TTL/CMOS logic compatibility | Valid input thresholds (0.8 V LOW / 2.4 V HIGH) interface directly with 5 V microcontrollers |
Applications
| Audio Source Selector | Test Equipment Multiplexer |
|---|---|
Use Scenario: Routing left/right stereo signals from multiple sources (CD, tuner, Bluetooth) to a single amplifier in PBX or consumer AV receivers. IC Role / Device Role / Timing Role: DG403BDY-T1 acts as a 4-channel analog multiplexer with break-before-make sequencing to avoid pop/click artifacts during source switching. Use Value: 100 ns switching and <40 pA leakage preserve SNR >95 dB and prevent audible distortion during real-time audio handoff. | Use Scenario: Automated test system selecting between multiple DUTs (devices under test) for parametric measurement using shared instrumentation. IC Role / Device Role / Timing Role: DG403BDY-T1 serves as a low-leakage, high-isolation analog switch matrix enabling sequential connection of voltage/current sources to DUT inputs. Use Value: –81.7 dB off-isolation and 12 pF off-capacitance minimize crosstalk between channels during multi-DUT testing cycles. |
| Sample-and-Hold Circuit | Dual-Slope Integrator |
Use Scenario: Precision data acquisition system capturing analog sensor outputs (e.g., thermocouple, strain gauge) before ADC conversion. IC Role / Device Role / Timing Role: DG403BDY-T1 controls hold capacitor charging via fast, low-charge-injection switching synchronized to ADC sampling clock. Use Value: 60 pC charge injection limits hold-step error to <1 LSB in 16-bit systems using 10 nF hold capacitors. | Use Scenario: Digital multimeter implementing dual-slope integration for high-accuracy DC voltage measurement. IC Role / Device Role / Timing Role: DG403BDY-T1 selects between two integration capacitors (C1/C2) and toggles input polarity to enable auto-zero and slope reversal. Use Value: Guaranteed break-before-make action prevents capacitor shorting during slope switching, ensuring integration linearity and zero-drift stability. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar analog switching applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX4617ESE+ | Single-supply only (up to 36 V); no dual-supply support; 45 Ω RDS(on); no break-before-make guarantee | Suitable for battery-powered portable instruments but not for ±15 V audio or precision integrators | Select when cost-sensitive single-rail designs dominate and break-before-make is non-critical |
| ADG1419BRUZ | Higher voltage rating (±20 V); lower RDS(on) (1.3 Ω); 12-bit THD performance; requires external logic for break-before-make emulation | Preferred for high-fidelity audio and metrology-grade sampling where on-resistance flatness and THD matter more than pin count | Choose when upgrading signal integrity beyond DG403BDY-T1's 23 Ω and 94.8 dB crosstalk specs is required |
Compared with MAX4617ESE+ and ADG1419BRUZ, the DG403BDY-T1 uniquely combines guaranteed break-before-make timing, ±15 V dual-supply operation, and 23 Ω on-resistance in a 16-pin SOIC-making it the only option among the three that satisfies telecom PBX audio routing and dual-slope integrator requirements without external timing logic or supply translation.
Availability
DG403BDY-T1 is available at Aetrix Electronics and suitable for audio routing, test equipment multiplexing, sample-and-hold circuits, and dual-slope integrators requiring stable component supply across industrial and telecom production cycles.
Supply support for DG403BDY-T1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay Siliconix is a global semiconductor manufacturer specializing in discrete components and analog ICs, with leadership in high-voltage, high-reliability switching solutions.
The DG403BDY-T1 belongs to the DG40xB family of low-power, high-speed CMOS analog switches-engineered for precision signal routing in battery-powered and telecom infrastructure applications where rail-to-rail conduction and break-before-make safety are mandatory.
FAQ
What is the maximum supply voltage rating for DG403BDY-T1?
The DG403BDY-T1 has an absolute maximum V+ to V− rating of 44 V, supporting dual-supply operation up to ±22 V. This allows use in industrial and telecom systems with wide supply margins while maintaining guaranteed break-before-make timing and low on-resistance. Exceeding this rating risks permanent damage, per Vishay Document 73069 Section "Absolute Maximum Ratings." The DG403BDY-T1 must never be operated outside these limits.
Does DG403BDY-T1 support single-supply operation?
Yes, DG403BDY-T1 supports single-supply operation with V− grounded and V+ ranging from 5 V to 44 V. Logic thresholds remain compatible (0.8 V LOW / 2.4 V HIGH), and analog signal range adjusts to 0 V to V+ − 3 V. However, the full ±15 V range and break-before-make guarantee apply only under dual-supply conditions as specified in the DG403BDY-T1 datasheet truth table and functional diagrams.
What is the purpose of the break-before-make feature in DG403BDY-T1?
The break-before-make feature in DG403BDY-T1 ensures that one switch opens before the other closes during state transitions-preventing momentary short-circuit between normally open (NO) and normally closed (NC) paths. With a guaranteed 5–12 ns delay, this protects downstream circuitry in applications like dual-slope integrators and stereo selectors where signal integrity depends on clean path isolation. This behavior is intrinsic to the DG403BDY-T1's internal architecture and does not require external timing control.
How does DG403BDY-T1 handle analog signals exceeding the supply rails?
DG403BDY-T1 includes internal clamping diodes that limit analog signals on S or D pins to (V− − 0.3 V) and (V+ + 0.3 V). If signals exceed these bounds, forward current must be limited to ≤30 mA continuous or 100 mA pulsed (1 ms, 10% duty cycle) to avoid damage. This clamping protects the DG403BDY-T1 in transient-overvoltage scenarios but does not extend the usable analog range beyond ±15 V under normal operation.
Is DG403BDY-T1 pin-compatible with older DG403 variants?
Yes, DG403BDY-T1 is functionally and physically pin-compatible with DG403BDJ (DIP) and DG403BDY (SOIC), sharing identical pinout, electrical specifications, and package dimensions (MS-012). The "-T1" suffix denotes tape-and-reel packaging for automated assembly, with no change to device functionality or pin assignment. All DG403B variants use the same truth table and functional block diagram per Vishay Document 73069 Rev. B.
DG403BDY-T1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay Siliconix
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Switch Circuit:
- SPST - NO/NC
- Multiplexer/Demultiplexer Circuit:
- 1:1
- Number of Circuits:
- 4
- On-State Resistance (Max):
- 45Ohm
- Channel-to-Channel Matching (ΔRon):
- -
- Voltage - Supply, Single (V+):
- 13V ~ 36V
- Voltage - Supply, Dual (V±):
- ±7V ~ 22V
- Switch Time (Ton, Toff) (Max):
- 150ns, 100ns
- -3db Bandwidth:
- -
- Charge Injection:
- 60pC
- Channel Capacitance (CS(off), CD(off)):
- 12pF, 12pF
- Current - Leakage (IS(off)) (Max):
- 500pA
- Crosstalk:
- -94.8dB @ 1MHz
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
DG403BDY-T1 FAQ
1.How can I place an order for DG403BDY-T1 through Aetrix?
Please submit a Request for Quotation (RFQ) for DG403BDY-T1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DG403BDY-T1 reliable?
The price and inventory of DG403BDY-T1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DG403BDY-T1 is usually 5 days.
3.What payment methods are accepted for DG403BDY-T1?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DG403BDY-T1 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DG403BDY-T1?
DG403BDY-T1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DG403BDY-T1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DG403BDY-T1?
For technical support, including DG403BDY-T1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DG403BDY-T1 requirements.
6.How does Aetrix verify that DG403BDY-T1 is sourced from the original manufacturer or authorized distributors?
All DG403BDY-T1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DG403BDY-T1 meets industry standards.
7.What is the process for return or replacement of DG403BDY-T1?
All DG403BDY-T1 units undergo pre-shipment inspection (PSI). If there is an issue with DG403BDY-T1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DG403BDY-T1 part is unused and in its original packaging.
Return procedure for DG403BDY-T1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
DG403BDY-T1 Tags

-
SN74LVC1G3157DBVR
Texas Instruments
-
SN74LVC1G66DBVR
Texas Instruments
-
SN74LVC1G66DCKR
Texas Instruments

-
SN74LVC1G3157DSFR
Texas Instruments

-
1P1G3157QDCKRQ1
Texas Instruments

-
SN74LVC2G66DCUR
Texas Instruments
-
SN74LV4052APWR
Texas Instruments

-
74HC4051D,653
Nexperia USA Inc.
-
SN74LV4051APWR
Texas Instruments
-
CD74HC4052PWR
Texas Instruments
-
CD74HC4051PWR
Texas Instruments
-
TS5A3166DBVR
Texas Instruments
Tech Hub
Schmitt triggers use separate rising and falling thresholds to stabilize slow or noisy signals. This guide covers hysteresis, 74HC14 and 74HCT14 selection, comparator calculations, RC oscillators and p…
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…

