Analog Devices Inc./Maxim Integrated DG403C/D
- Part No.:
- DG403C/D
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Package:
- Die
- Datasheet:
-
DG403C/D.pdf
- Description:
- IC SWITCH SPDT X 2 45OHM DICE
- Quantity:
- Payment:

- Shipping:

Inventory:1,990
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Product details
Overview
DG403C/D from Maxim Integrated is a dual, single-pole/double-throw (SPDT) high-speed analog switch with two normally open and two normally closed channels. It features 20Ω typical on-resistance, 2Ω maximum on-resistance matching between channels, 3Ω maximum on-resistance flatness over ±15V signal range, and 15pC maximum charge injection. It operates from ±4.5V to ±20V bipolar or +10V to +30V single supply and is used in precision sample-and-hold circuits and audio signal routing.
For engineers reviewing the DG403C/D datasheet, DG403C/D pinout, DG403C/D application, or DG403C/D equivalent, this page delivers verified electrical specs, truth-table–aligned pin functions, thermal leakage behavior at +85°C, rail-to-rail analog switching capability, and direct alternatives for dual SPDT analog switch replacement in military radios and test equipment.
Technical Context
The DG403C/D implements a silicon-gate CMOS process with substrate tied to V+, enabling rail-to-rail analog signal handling from V− to V+. Its dual SPDT architecture supports independent control of two switches via IN1/IN2 logic inputs, each driving one NO/NC pair with break-before-make timing (10–20ns delay).
It guarantees low off-leakage (<5nA at +85°C), low power consumption (35µW max), and TTL/CMOS-compatible logic interface with dedicated VL pin. Switching performance is characterized at ±15V supplies: tON ≤ 150ns, tOFF ≤ 100ns, off-isolation ≥ 72dB at 1MHz, and crosstalk ≤ −90dB.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Switch Type | Dual SPDT - provides two independent analog paths, each with normally open and normally closed terminals for signal routing flexibility. |
| On-Resistance (rDS(ON)) | 20Ω typ / 45Ω max - ensures minimal signal attenuation and voltage drop across switched paths at ±15V supplies. |
| On-Resistance Match | ≤2Ω max - enables matched gain/attenuation in differential or dual-path signal conditioning without calibration. |
| Charge Injection | 10–15pC - limits voltage glitch on sampled capacitors in precision sample-and-hold and ADC front-end applications. |
| Off-Leakage Current | <5nA at +85°C - maintains signal integrity in high-impedance sensor interfaces and long-hold-time sample circuits. |
| Supply Range | ±4.5V to ±20V bipolar or +10V to +30V single - supports industrial, military, and battery-operated systems with wide voltage margins. |
| Switching Speed | tON ≤ 150ns, tOFF ≤ 100ns - enables high-throughput multiplexing in automated test equipment and real-time control loops. |
Pinout & Package
DG403C/D is supplied in a 16-pin narrow SOIC package (width = 3.9mm), rated for 0°C to +70°C operation. Pin functions are validated per Maxim's official pin description table and top-view schematic.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 8, 3, 6 | D1–D4 (Drain) | Analog output terminals - connect to downstream circuitry; support bidirectional signal flow with rail-to-rail swing. |
| 9, 16, 4, 5 | S1–S4 (Source) | Analog input terminals - accept signals from V− to V+; paired with D1–D4 to form four SPDT switch legs. |
| 10, 15 | IN1, IN2 | CMOS/TTL logic inputs - control S1/D1/D3 and S2/D2/D4 switching states; referenced to VL, not V+ or GND. |
| 11 | V+ | Positive supply - also connected to substrate; must be powered first during sequencing to avoid latch-up. |
| 12 | VL | Logic supply - set to +5V for TTL compatibility; ties internal level-shifters to ensure correct gate drive across supply ranges. |
| 13 | GND | Ground reference - common return for logic and substrate bias; not signal ground for analog paths. |
| 14 | V− | Negative supply - completes bipolar operation; clamps analog signals to V− with internal protection diodes. |
| 2, 7, 1, 3, 6, 9, 11, 16 | N.C. | Not internally connected - no bond wires or circuitry; must remain unconnected per datasheet guidance. |
Key Features
| Feature | Design Value |
|---|---|
| Rail-to-rail signal handling | Supports analog inputs from V− to V+ without clipping - essential for full-scale signal routing in ±15V systems. |
| Guaranteed rFLAT(ON) ≤ 3Ω | Ensures consistent on-resistance across entire ±10V signal range - critical for linearity in instrumentation amplifiers and DAC buffers. |
| Break-before-make timing | 10–20ns delay prevents momentary shorting between NO and NC paths - avoids signal transients in audio crosspoint and guidance systems. |
| Low charge injection (15pC max) | Minimizes hold-step error in sample-and-hold stages - enables 14-bit+ accuracy without post-acquisition correction. |
| TTL/CMOS logic compatibility | Operates with standard 0V/5V logic levels regardless of analog supply - simplifies interface to microcontrollers and FPGAs. |
Applications
| Sample-and-Hold Circuits | Test Equipment |
|---|---|
Use Scenario: Capturing fast-changing sensor outputs for ADC conversion in data acquisition systems. IC Role / Device Role / Timing Role: DG403C/D acts as the precision sampling switch, controlling capacitor charging with minimal charge injection and flat on-resistance. Use Value: 15pC max charge injection and ≤3Ω rFLAT(ON) preserve signal fidelity across full ±10V input range, enabling sub-LSB hold errors. |
Use Scenario: Signal path reconfiguration in automated test equipment for multi-channel stimulus/response measurement. IC Role / Device Role / Timing Role: DG403C/D serves as a dual-path analog multiplexer, routing calibrated references or DUT signals under digital control. Use Value: 150ns tON and 100ns tOFF allow >3MHz channel switching rates; 72dB off-isolation prevents crosstalk between test fixtures. |
| Military Radios | Audio Signal Routing |
Use Scenario: Antenna or filter bank selection in HF/VHF tactical radios operating across extended temperature ranges. IC Role / Device Role / Timing Role: DG403C/D functions as a ruggedized RF front-end switch, handling baseband and IF signals up to 1MHz. Use Value: <5nA off-leakage at +85°C ensures stable bias points in high-impedance receiver chains; ±20V rating supports legacy military power rails. |
Use Scenario: Channel muting, input selection, and effects loop switching in professional audio mixing consoles. IC Role / Device Role / Timing Role: DG403C/D operates as a silent, low-distortion analog switch in line-level signal paths. Use Value: 20Ω typical rDS(ON) and bidirectional conduction eliminate polarity-dependent distortion; 90dB crosstalk rejection isolates adjacent audio channels. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual SPDT analog switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADG403BRZ | 44V abs max rating; 35Ω max rDS(ON); 25pC max charge injection; requires VL = V+ for CMOS logic. | Higher on-resistance and charge injection limit use in precision sample-and-hold; better suited for general-purpose multiplexing. | Select ADG403BRZ when supply simplicity (no separate VL) outweighs need for lowest glitch energy. |
| TS5A3157DCKR | Single-supply only (+1.65V to +5.5V); 0.75Ω typical rDS(ON); 1.5pC charge injection; 300ns tON. | Optimized for low-voltage portable audio, not ±15V industrial/military systems; incompatible with bipolar operation. | Choose TS5A3157DCKR only for battery-powered, single-supply designs where ultra-low on-resistance is prioritized over voltage range. |
Compared with ADG403BRZ and TS5A3157DCKR, the DG403C/D uniquely supports true bipolar ±20V operation with guaranteed 2Ω channel matching and <5nA hot-temperature leakage - making it the only viable option for high-reliability, wide-swing analog routing in test and defense systems.
Availability
DG403C/D is available at Aetrix Electronics and suitable for sample-and-hold circuits, test equipment signal routing, military radio front-ends, audio mixing consoles, and guidance and control systems requiring stable component supply across commercial temperature grades.
Supply support for DG403C/D includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) designs precision analog, mixed-signal, and power management ICs for industrial, automotive, communications, and computing markets.
The DG403C/D belongs to Maxim's legacy high-speed analog switch family, engineered specifically for rail-to-rail, low-leakage, low-glitch signal routing in demanding instrumentation and defense applications.
FAQ
What is the operating temperature range for DG403C/D?
The DG403C/D is specified for 0°C to +70°C operation, as indicated by the "C" suffix in the part number and confirmed in the Ordering Information table. This commercial-grade rating applies to both the 16-pin narrow SOIC and dice variants labeled DG403C/D. It does not support extended or military temperature ranges - those require DG403DK (−40°C to +85°C) or DG403AZ (−55°C to +125°C).
Does DG403C/D support single-supply operation?
Yes, DG403C/D supports single-supply operation from +10V to +30V, as explicitly stated in the General Description and Electrical Characteristics sections. In this mode, the analog signal range extends from GND (0V) to V+, and the VL pin must be tied to +5V for TTL compatibility. The device maintains rail-to-rail switching and all key specs including 20Ω typical rDS(ON) and <5nA off-leakage at +85°C.
What is the function of the VL pin on DG403C/D?
The VL pin on DG403C/D supplies the logic interface voltage and must be set to +5V to ensure TTL-compatible input thresholds (VINH = +2.4V, VINL = +0.8V). It is independent of V+ and V−, allowing logic-level translation across wide analog supply ranges. Leaving VL unconnected or tying it to V+ results in CMOS-level logic thresholds, which may cause misoperation if driven by standard TTL sources.
How does DG403C/D handle overvoltage conditions on analog pins?
DG403C/D includes internal ESD diodes that clamp analog pin voltages to V+ and V−. If signals exceed these rails, forward current must be limited to ≤20mA continuous or 100mA pulsed (1ms, 10% duty cycle) to prevent damage. For robust overvoltage protection beyond absolute ratings, Maxim recommends adding external series diodes - reducing analog range by ~1V but preserving low rDS(ON) and leakage performance.
Is DG403C/D pin-compatible with older DG403 variants?
Yes, DG403C/D maintains identical pinout and functionality with legacy DG403 devices in 16-pin DIP and SOIC packages, as confirmed by the shared Pin Configurations diagram and Truth Table. The "C/D" suffix denotes the improved version with tighter rDS(ON) matching (2Ω max vs. previous 5Ω), lower charge injection (15pC vs. 25pC), and reduced hot-temperature leakage - all while retaining drop-in compatibility for board-level upgrades.
DG403C/D Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Packaging:
- Tray
- Product Status:
- Active
- Switch Circuit:
- SPDT
- Multiplexer/Demultiplexer Circuit:
- 2:1
- Number of Circuits:
- 2
- On-State Resistance (Max):
- 45Ohm
- Channel-to-Channel Matching (ΔRon):
- 500mOhm
- Voltage - Supply, Single (V+):
- 10V ~ 30V
- Voltage - Supply, Dual (V±):
- ±4.5V ~ 20V
- Switch Time (Ton, Toff) (Max):
- 150ns, 100ns
- -3db Bandwidth:
- -
- Charge Injection:
- 10pC
- Channel Capacitance (CS(off), CD(off)):
- 12pF, 12pF
- Current - Leakage (IS(off)) (Max):
- 500pA
- Crosstalk:
- -90dB @ 1MHz
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- Dice
DG403C/D FAQ
1.How can I place an order for DG403C/D through Aetrix?
Please submit a Request for Quotation (RFQ) for DG403C/D on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DG403C/D reliable?
The price and inventory of DG403C/D are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DG403C/D is usually 5 days.
3.What payment methods are accepted for DG403C/D?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DG403C/D transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DG403C/D?
DG403C/D orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DG403C/D order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DG403C/D?
For technical support, including DG403C/D datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DG403C/D requirements.
6.How does Aetrix verify that DG403C/D is sourced from the original manufacturer or authorized distributors?
All DG403C/D products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DG403C/D meets industry standards.
7.What is the process for return or replacement of DG403C/D?
All DG403C/D units undergo pre-shipment inspection (PSI). If there is an issue with DG403C/D, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DG403C/D part is unused and in its original packaging.
Return procedure for DG403C/D:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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