Analog Devices Inc./Maxim Integrated DG403CY+

Overview

DG403CY+ from Maxim Integrated is a dual, single-pole/double-throw (SPDT) high-speed analog switch with two normally open and two normally closed channels. It features 20Ω typical on-resistance, 2Ω maximum on-resistance matching between channels, 3Ω maximum on-resistance flatness over ±15V signal range, and 15pC maximum charge injection. It operates from ±4.5V to ±20V bipolar or +10V to +30V single supply and is used in precision sample-and-hold circuits and audio signal routing.

For engineers reviewing the DG403CY+ datasheet, DG403CY+ pinout, DG403CY+ application, or DG403CY+ equivalent, key selection criteria include guaranteed r_DS(ON) match, rail-to-rail analog signal handling (±15V), low leakage (<5nA at +85°C), fast switching (150ns t_ON), and TTL/CMOS logic compatibility with separate VL pin.

Technical Context

The DG403CY+ implements a silicon-gate 44V process enabling robust rail-to-rail analog conduction and improved thermal stability of on-resistance (0.5%/°C typical tempco). Its dual SPDT architecture supports break-before-make timing (10–20ns delay) and independent channel control via IN1/IN2 logic inputs.

It uses a dedicated VL pin for logic-level referencing, allowing TTL compatibility across full supply range (±4.5V to ±20V) while maintaining low 35µW max power consumption. Internal diode clamping protects S/D terminals against signals exceeding V+ or V−, with off-isolation of 72dB and crosstalk suppression of 90dB at 1MHz.

Key Specifications

Pinout & Package

Package: 16-pin plastic DIP (0°C to +70°C operating range). Pinout validated per Maxim datasheet Rev 2 (19-4727).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar analog switch applications.

Compared with DG403CY+, ADG403BRZ trades precision for broader availability and lower cost, while TS5A23157DCUR offers ultra-low on-resistance but lacks bipolar supply support and rail-to-rail capability - making DG403CY+ the only option meeting all requirements for high-fidelity ±15V analog switching with guaranteed matching and low charge injection.

Availability

DG403CY+ is available at Aetrix Electronics and suitable for sample-and-hold circuits, audio signal routing, and test equipment multiplexing requiring stable component supply, long-term lifecycle support, and traceable sourcing.

Supply support for DG403CY+ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Maxim Integrated (now part of Analog Devices) is a U.S.-based semiconductor company specializing in high-performance analog, mixed-signal, and power management ICs for industrial, communications, and military applications.

The DG403CY+ belongs to Maxim's legacy high-speed analog switch family, designed specifically for precision signal routing in environments demanding low distortion, guaranteed matching, and robust bipolar supply operation.

FAQ

What is the maximum analog signal voltage range supported by DG403CY+?

The DG403CY+ supports a full rail-to-rail analog signal range from V− to V+, which is ±15V when operated with ±15V supplies. This is guaranteed per datasheet Figure 2 and Electrical Characteristics table, enabling direct interfacing with standard ±15V op-amps and data converters without level-shifting.

Does DG403CY+ require a separate logic supply voltage, and what is its purpose?

Yes, DG403CY+ requires a dedicated VL pin, typically tied to +5V. This separates logic threshold referencing from analog supply rails, ensuring TTL/CMOS compatibility across the full ±4.5V to ±20V supply range. The VL pin directly controls input logic thresholds and must be decoupled with a 0.1µF capacitor to GND per Maxim's layout guidelines.

How does DG403CY+ handle power supply sequencing, and why is it critical?

DG403CY+ requires strict sequencing: V+ must be applied first, followed by VL, then V−, and finally logic inputs. This prevents latch-up and ensures proper substrate biasing (substrate is tied to V+). Failure to sequence correctly risks permanent damage, as stated in the Absolute Maximum Ratings section and Applications Information.

Is DG403CY+ pin-compatible with older DG403 variants like DG403DJ or DG403CJ?

Yes, DG403CY+ shares identical 16-pin DIP pinout and function mapping with all DG403 variants (e.g., DG403DJ, DG403CJ), including S1–S4, D1–D4, IN1/IN2, V+/V−, VL, and GND. Temperature range and packaging differ, but electrical interface and PCB footprint are fully interchangeable.

What is the guaranteed on-resistance flatness specification for DG403CY+, and why does it matter?

DG403CY+ guarantees on-resistance flatness of 3Ω maximum over the ±5V analog signal range. This means r_DS(ON) varies by no more than 3Ω as the signal sweeps from −5V to +5V - critical for minimizing harmonic distortion and gain nonlinearity in AC-coupled or precision DC signal paths.