Analog Devices Inc./Maxim Integrated DG405CJ

Overview

DG405CJ from Maxim Integrated is a dual, high-speed, normally open analog switch IC designed for precision signal routing in bipolar or single-supply systems. It features guaranteed 2Ω max on-resistance matching between channels, 3Ω max on-resistance flatness over ±15V signal range, and 15pC max charge injection - enabling low-distortion sample-and-hold and audio routing in military radios and test equipment.

For engineers reviewing the DG405CJ datasheet, DG405CJ pinout, DG405CJ application, or DG405CJ equivalent, key selection criteria include rail-to-rail analog signal handling (±15V), TTL/CMOS logic compatibility with separate VL supply, sub-150ns switching times, and -55°C to +125°C operation in hermetic 20-pin LCC packaging.

Technical Context

The DG405CJ implements two independent SPST analog switches with matched channel characteristics, fabricated using a 44V silicon-gate process. Its architecture supports true bidirectional conduction, rail-to-rail analog voltage swing (V− to V+), and logic-level control via dedicated VL pin decoupled from analog supplies.

Switching is controlled by two non-inverting digital inputs (IN1, IN2) referenced to VL = +5V, with guaranteed turn-on time ≤150ns and turn-off time ≤100ns at ±15V supplies. Off-leakage remains below 5nA at +85°C, and internal substrate connection to V+ ensures stable operation across temperature extremes.

Key Specifications

Pinout & Package

Package: 20-pin ceramic leadless chip carrier (LCC), hermetically sealed, -55°C to +125°C operating range, substrate tied to V+.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual SPST analog switch applications.

Compared with ADG405BRZ and MAX4645ESE+, the DG405CJ delivers superior channel matching (2Ω vs. ≥10Ω typical), wider temperature range (-55°C to +125°C vs. ≤+85°C), and hermetic LCC packaging - making it the preferred choice for aerospace, defense, and high-stability industrial systems where parameter consistency and long-term reliability are non-negotiable.

Availability

DG405CJ is available at Aetrix Electronics and suitable for military radios, avionics heads-up displays, precision test equipment, and high-reliability sample-and-hold circuits requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for DG405CJ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Maxim Integrated (now part of Analog Devices) is a U.S.-based semiconductor company specializing in high-performance analog, mixed-signal, and power management ICs for demanding industrial, automotive, and communications applications.

The DG405CJ belongs to Maxim's legacy high-speed analog switch family, engineered specifically for precision signal routing in harsh-environment systems where rail-to-rail operation, low charge injection, and guaranteed parameter matching are essential design requirements.

FAQ

What is the maximum analog signal voltage range supported by the DG405CJ?

The DG405CJ supports a full rail-to-rail analog signal range from V− to V+, which spans ±15V under standard operating conditions. This allows direct switching of signals up to ±15V without attenuation or clipping, and the device remains functional up to the absolute maximum ratings of V+ = 44V and V− = (GND − 2V). The DG405CJ maintains guaranteed on-resistance flatness (≤3Ω) across this entire range, ensuring consistent performance in precision applications like sample-and-hold circuits.

Does the DG405CJ require a separate logic supply voltage, and why?

Yes, the DG405CJ requires a dedicated VL pin supplied at +5V to ensure TTL/CMOS-compatible logic thresholds regardless of analog supply voltages. This separation prevents logic misstates caused by analog supply noise or drift, and enables reliable operation across the full ±4.5V to ±20V analog supply range. The DG405CJ will not function correctly if VL is omitted or tied directly to V+; proper +5V biasing of VL is mandatory for guaranteed switching behavior and timing specifications.

How does the DG405CJ achieve low charge injection, and what is its impact on system performance?

The DG405CJ achieves ≤15pC maximum charge injection through optimized MOSFET gate overlap design and matched transistor geometry in its 44V silicon-gate process. This low value minimizes voltage glitches on hold capacitors during switching transitions, directly reducing aperture error and settling time in sample-and-hold circuits. In systems using the DG405CJ for precision data acquisition, this specification enables accurate capture of 16-bit signals without additional correction circuitry or increased acquisition delay.

Is the DG405CJ pin-compatible with earlier DG405 variants such as DG405DJ or DG405CY?

No, the DG405CJ is not pin-compatible with plastic DIP (DG405CY) or narrow SO (DG405DY) versions due to its 20-pin LCC package versus their 16-pin configurations. While all DG405 variants share identical functional topology (dual SPST, same pin functions), the DG405CJ's 20-pin layout relocates N.C. pins and adds thermal/mechanical pads absent in 16-pin packages. PCB redesign is required to migrate to DG405CJ, though schematic connectivity and logic interface remain unchanged.

What is the significance of the substrate connection to V+ in the DG405CJ?

The DG405CJ ties its silicon substrate directly to the V+ supply pin, a design choice that enhances latch-up immunity and stabilizes threshold voltage across temperature. This connection prevents parasitic SCR activation during transient overvoltage events and ensures predictable on-resistance behavior from -55°C to +125°C. In practice, this means the DG405CJ maintains reliable operation in high-noise environments like military radio front-ends - a key differentiator versus alternatives with floating or GND-tied substrates.