Vishay Siliconix DG406BDN

Overview

DG406BDN from Vishay Siliconix is a 16-channel single-ended CMOS analog multiplexer with TTL-compatible control inputs, 45 Ω on-resistance, 115 ns transition time, and ±20 V dual-supply operation. It routes one of sixteen analog inputs to a common output under 4-bit binary address control and supports break-before-make switching for signal integrity in data acquisition systems.

For engineers reviewing the DG406BDN datasheet, DG406BDN pinout, DG406BDN application, or DG406BDN equivalent, this device is selected for high-accuracy, low-glitch analog signal routing in battery-powered instrumentation, medical equipment, and ATE where rail-to-rail analog range and low charge injection (11 pC) are critical.

Technical Context

The DG406BDN implements a silicon-gate CMOS architecture with epitaxial latchup protection and operates across ±5 V to ±20 V supplies or 5–40 V single supply. Its decoder/driver stage accepts TTL-level A0–A3 and EN inputs to select one of 16 Sx channels to the D output.

Break-before-make timing (min. 10 ns, typ. 39 ns) prevents momentary input shorting; on-resistance matching (ΔRDS(on) ≤ 5%) ensures channel-to-channel gain consistency; and off-isolation of –86 dB at 1 MHz enables low-crosstalk multi-channel signal conditioning.

Key Specifications

Pinout & Package

Package: 28-pin PLCC (Plastic Leaded Chip Carrier), body size 12.57 mm × 12.57 mm, 1.27 mm pitch, lead-free and RoHS-compliant per -E3 suffix.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar analog multiplexer applications.

Compared with ADG406BRZ and MAX4617CWI+, the DG406BDN delivers lower on-resistance (45 Ω vs. 60–70 Ω), superior off-isolation (–86 dB), and guaranteed ±20 V operation - making it optimal for high-fidelity, wide-supply instrumentation where channel matching and signal integrity are design-critical.

Availability

DG406BDN is available at Aetrix Electronics and suitable for data acquisition systems, medical instrumentation, audio routing hardware, and battery-powered test equipment requiring stable component supply across extended temperature ranges.

Supply support for DG406BDN includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Vishay Siliconix designs high-performance analog semiconductors using advanced CMOS and DMOS processes, with focus on reliability, precision, and ruggedness for industrial and medical markets.

The DG406BDN belongs to Vishay's high-performance analog multiplexer product line, engineered for low distortion, rail-to-rail signal handling, and robust operation in demanding instrumentation and test environments.

FAQ

What is the maximum analog signal voltage range supported by the DG406BDN?

The DG406BDN supports analog signals from V− to V+, with absolute maximum ratings of ±20 V dual supply or up to 40 V single supply. When operated at ±15 V, the guaranteed analog signal range is –15 V to +15 V, enabling full utilization of industrial sensor outputs without external level-shifting circuitry. This rail-to-rail capability is confirmed in the datasheet's "Analog signal range" specification under both dual- and single-supply test conditions for DG406BDN.

Does the DG406BDN require external pull-up resistors on its address or enable pins?

No, the DG406BDN does not require external pull-up resistors on A0–A3 or EN pins. Its digital inputs are TTL-compatible with guaranteed VIH ≥ 2.4 V and VIL ≤ 0.8 V across the full –40 °C to +85 °C operating range, and input leakage remains within ±1 μA. Internal input structure provides sufficient noise margin for direct connection to microcontroller GPIO or FPGA outputs driving standard CMOS/TTL logic levels.

Can the DG406BDN be used with a single 12 V supply, and what performance changes occur?

Yes, the DG406BDN supports single-supply operation from 5 V to 40 V. At 12 V, RDS(on) increases to 78 Ω typical (vs. 45 Ω at ±15 V), transition time rises to 130 ns, and analog range becomes 0–12 V. These shifts are documented in the "SPECIFICATIONS (single supply)" table. System designers must verify that increased on-resistance and reduced dynamic range meet accuracy requirements for their specific signal chain.

How is break-before-make timing verified for the DG406BDN, and what is its minimum guaranteed value?

The DG406BDN guarantees a minimum break-before-make interval (tOPEN) of 10 ns over temperature, with typical value of 39 ns at room temperature. This is measured per Figure 4 test circuit in the datasheet, using 5 ns rise/fall time logic edges and defined voltage thresholds. The internal decoder architecture enforces this timing inherently - no external timing components or sequencing logic are needed to ensure safe channel switching.

Is the DG406BDN pin-compatible with the DG406BDW variant, and what are the mechanical differences?

No, DG406BDN (28-pin PLCC) and DG406BDW (28-pin wide-body SOIC) are not pin-compatible. While both share identical signal pin functions and ordering logic, their physical layouts differ: PLCC places V+ at pin 3 and GND at pin 10, whereas SOIC places V+ at pin 1 and GND at pin 14. PCB layout, thermal pad design, and reflow profiles must be redesigned when substituting between these packages - no drop-in replacement is possible without board revision.