Renesas DG407DJ
- Part No.:
- DG407DJ
- Manufacturer:
- Renesas
- Package:
- 28-DIP (0.600", 15.24mm)
- Datasheet:
-
DG407DJ.pdf
- Description:
- IC MUX DUAL 8:1 100OHM 28DIP
- Quantity:
- Payment:

- Shipping:

Inventory:4,268
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Product details
Overview
DG407DJ from Intersil is a differential 8-channel CMOS analog multiplexer with bilateral switch architecture, ±15V dual-supply operation, 100Ω max ON-resistance, <300ns transition time, and TTL/CMOS-compatible logic inputs. It serves as a drop-in replacement for DG507A in precision data acquisition systems requiring low charge injection and matched bidirectional signal paths.
For engineers reviewing the DG407DJ datasheet, DG407DJ pinout, DG407DJ application, or DG407DJ equivalent, this device is selected for high-reliability analog switching where channel matching, low leakage (<5nA), and wide analog signal range (±10V) are critical in medical instrumentation and automatic test equipment.
Technical Context
The DG407DJ implements a dual-tier decoded 1-of-8 switch array with independent A/B channel pairs (S1A/S1B through S8A/S8B), driven by three address lines (A0–A2) and an active-high ENABLE input. Its silicon-gate process enables latch-up immunity and supports 44V max V+–V− differential voltage.
Each switch is fully bilateral with symmetrical rDS(ON) variation (<5% matching) over ±5V analog input range and exhibits low charge injection (40pC typ) to minimize sample-and-hold error. The internal voltage reference stabilizes logic thresholds across supply variations.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Channel Configuration | Differential 8-channel (16 terminals: 8 A-side + 8 B-side source pins + DA/DB drain pins) |
| Max ON-Resistance | 100Ω at ±10V drain-source voltage - ensures minimal signal attenuation and gain error in precision sensor interfaces |
| Transition Time | 300ns max - enables sub-microsecond channel switching for high-throughput data acquisition |
| Analog Signal Range | ±10V with ±15V supplies - supports full-scale industrial sensor outputs without level-shifting |
| Charge Injection | 40pC typical - reduces hold-mode settling error in sample-and-hold circuits |
| OFF-Leakage Current | ±20nA max (DG407) - maintains accuracy in high-impedance measurement nodes |
| Supply Voltage Range | ±5V to ±20V (V+–V− ≤ 44V) - allows flexible biasing in mixed-signal systems |
Pinout & Package
28-lead plastic DIP (PDIP) package per JEDEC MS-011-AB, 0.600" width, lead pitch 0.100", RoHS-compliant matte tin finish.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 27 | V+, V− | Positive and negative power rails - must be decoupled locally; supports split or single-supply operation |
| 2, 3, 13, 14 | NC | No internal connection - must remain unconnected; no routing or grounding allowed |
| 4–11, 19–26 | S1B–S8B, S1A–S8A | Bilateral source terminals for differential channel pairs - interchangeable as input/output |
| 12 | GND | Ground reference plane - connects to system common; not isolated from substrate |
| 15–17 | A0–A2 | Binary address inputs - select one of eight A/B channel pairs; TTL/CMOS compatible |
| 18 | EN | Active-high enable - disables all switches when low; required for multi-device bus arbitration |
| 28, 2 | DA, DB | Differential drain outputs - carry switched analog signals; matched impedance critical for balanced transmission |
Key Features
| Feature | Design Value |
|---|---|
| Bilateral Switch Architecture | Enables true AC-coupled and bidirectional signal routing without polarity constraints |
| Low ON-Resistance Matching | ΔrDS(ON) ≤ 5% between channels - preserves amplitude fidelity across multiplexed sensor inputs |
| Reduced Charge Injection | 40pC typical - minimizes voltage step on hold capacitors, easing anti-aliasing filter design |
| Latch-Up Immunity | Epitaxial layer prevents destructive latch-up under transient overvoltage conditions |
| Wide Supply Range | Supports ±5V to ±20V operation - accommodates legacy ±12V and modern ±15V industrial rails |
Applications
| Medical Instrumentation | Data Acquisition |
|---|---|
Use Scenario: Multiplexing ECG electrode signals into a single ADC channel while preserving phase coherence and low noise. IC Role / Device Role / Timing Role: Differential analog switch enabling simultaneous sampling of paired biopotential inputs with matched path delay. Use Value: 5% rDS(ON) matching and <40pC charge injection prevent baseline wander and reduce post-acquisition calibration burden. |
Use Scenario: Scanning multiple thermocouple or RTD inputs in programmable logic controller (PLC) analog input modules. IC Role / Device Role / Timing Role: High-voltage-tolerant multiplexer routing millivolt-level sensor outputs to a precision instrumentation amplifier. Use Value: ±10V analog range and ±20nA OFF-leakage maintain sub-0.1°C measurement accuracy across 16-channel scans. |
| Automatic Test Equipment | Hi-Rel Systems |
Use Scenario: Routing stimulus signals and responses between DUT and measurement instruments in semiconductor ATE platforms. IC Role / Device Role / Timing Role: Fast-switching (300ns) analog mux enabling high-speed functional test sequences with minimal channel crosstalk. Use Value: -69dB OFF-isolation at 100kHz and break-before-make timing ensure signal integrity during dynamic reconfiguration. |
Use Scenario: Signal conditioning in avionics flight control sensors operating across -40°C to +85°C ambient. IC Role / Device Role / Timing Role: Radiation-tolerant analog switch providing fault-isolated channel selection in redundant sensor networks. Use Value: 44V max V+–V− rating and guaranteed operation to +85°C support DO-160 environmental compliance. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar analog multiplexer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX4677EPP+ | Single 8-channel (not differential); 120Ω rDS(ON); 400ns tTRANS; requires external logic for A/B pairing | Lower cost for non-differential, lower-precision applications; lacks inherent channel-pair matching | Select when differential signaling is unnecessary and board space is constrained |
| ADG507AKRZ | Pin-compatible DG407 drop-in; 125Ω rDS(ON) max; same 28-pin SOIC/PDIP footprint; -40°C to +85°C rating | Direct replacement with identical truth table and timing; slightly higher ON-resistance impacts low-level signal accuracy | Choose for second-source assurance without layout change; verify rDS(ON) impact on worst-case gain error |
Compared with DG407DJ, MAX4677EPP+ offers lower integration but no differential capability, while ADG507AKRZ provides identical pinout and function at marginally higher resistance - making it the preferred alternative for drop-in qualification.
Availability
DG407DJ is available at Aetrix Electronics and suitable for medical instrumentation, automatic test equipment, and hi-rel systems requiring stable component supply with long-term lifecycle visibility and RoHS-compliant sourcing.
Supply support for DG407DJ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Intersil Corporation designs high-performance analog, mixed-signal, and power management semiconductors for industrial, infrastructure, and high-end consumer markets.
The DG407DJ belongs to Intersil's precision analog multiplexer product line, engineered for applications demanding low distortion, high channel-to-channel matching, and robust operation in harsh electrical environments.
FAQ
What is the maximum allowable supply voltage for DG407DJ?
The DG407DJ supports a maximum V+ to V− differential voltage of 44V. When operated with ±15V supplies, it safely handles 30V peak-to-peak analog signals. Exceeding 44V risks permanent damage, and single-supply operation requires V− tied to ground with V+ up to 44V - always observe absolute maximum ratings in FN3116 Rev 11.00.
Does DG407DJ support single-supply operation?
Yes, DG407DJ supports single-supply operation with V− connected to ground and V+ ranging from +5V to +44V. In this mode, the analog input range is 0V to V+ − 3V (e.g., 0V to 9V at V+ = 12V), as specified in the single-supply electrical characteristics table on page 6 of the DG407DJ datasheet.
How does the DG407DJ differ from the DG406DJ in pinout and functionality?
DG407DJ uses a differential 8-channel architecture with separate SxA/SxB source banks and DA/DB drains, whereas DG406DJ is a single-ended 16-channel mux with one drain (D) and 16 sources (S1–S16). Pin 28 is DB on DG407DJ but unused (NC) on DG406DJ; pin 2 is DA on DG407DJ but NC on DG406DJ - they are not pin-compatible.
What is the purpose of the NC pins on DG407DJ?
DG407DJ has NC pins at positions 2, 3, 13, and 14 - these have no internal connection and must remain unconnected. Routing traces to or placing vias on NC pins may cause parasitic coupling or mechanical stress; per FN3116 page 2, they serve only as structural or thermal relief elements in the PDIP package.
Is DG407DJ suitable for use in battery-powered systems?
Yes, DG407DJ draws only 30µA max supply current in standby and 200µA max when enabled, making it suitable for battery-operated systems. Its low power consumption, combined with rail-to-rail analog capability down to ±5V supplies, supports extended runtime in portable medical and field instrumentation using DG407DJ.
DG407DJ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Packaging:
- Tube
- Product Status:
- Obsolete
- Switch Circuit:
- -
- Multiplexer/Demultiplexer Circuit:
- 8:1
- Number of Circuits:
- 2
- On-State Resistance (Max):
- 100Ohm
- Channel-to-Channel Matching (ΔRon):
- 5Ohm
- Voltage - Supply, Single (V+):
- 5V ~ 34V
- Voltage - Supply, Dual (V±):
- ±5V ~ 20V
- Switch Time (Ton, Toff) (Max):
- 200ns, 150ns
- -3db Bandwidth:
- -
- Charge Injection:
- 40pC
- Channel Capacitance (CS(off), CD(off)):
- 8pF, 80pF
- Current - Leakage (IS(off)) (Max):
- 500pA
- Crosstalk:
- -
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 28-PDIP
DG407DJ FAQ
1.How can I place an order for DG407DJ through Aetrix?
Please submit a Request for Quotation (RFQ) for DG407DJ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DG407DJ reliable?
The price and inventory of DG407DJ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DG407DJ is usually 5 days.
3.What payment methods are accepted for DG407DJ?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DG407DJ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DG407DJ?
DG407DJ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DG407DJ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DG407DJ?
For technical support, including DG407DJ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DG407DJ requirements.
6.How does Aetrix verify that DG407DJ is sourced from the original manufacturer or authorized distributors?
All DG407DJ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DG407DJ meets industry standards.
7.What is the process for return or replacement of DG407DJ?
All DG407DJ units undergo pre-shipment inspection (PSI). If there is an issue with DG407DJ, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DG407DJ part is unused and in its original packaging.
Return procedure for DG407DJ:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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