Renesas DG408DVZ
- Part No.:
- DG408DVZ
- Manufacturer:
- Renesas
- Package:
- 16-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
DG408DVZ.pdf
- Description:
- IC MUX 8:1 100OHM 16TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:4,446
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Product details
Overview
DG408DVZ from Renesas Electronics is a single 8-channel CMOS analog multiplexer with TTL/CMOS-compatible digital decode logic, 100Ω max ON resistance at 25°C, <250ns transition time, and ±15V analog signal range. It operates from single +5V to +34V or split ±5V to ±20V supplies and serves as a drop-in replacement for DG508A in data acquisition and audio switching systems.
For engineers reviewing the DG408DVZ datasheet, DG408DVZ pinout, DG408DVZ application, or DG408DVZ equivalent, key selection criteria include its TSSOP-16 Pb-free package, low charge injection (20pC typ), EN-controlled channel enable/disable, and guaranteed rDS(ON) matching (<15Ω) across all eight channels under bipolar supply conditions.
Technical Context
The DG408DVZ implements an integrated silicon-gate CMOS process with epitaxial layer latch-up protection, enabling robust operation across -40°C to +85°C. Its digital decoder accepts three address bits (A0–A2) and an active-low EN input to select one of eight bidirectional analog channels.
Each switch features matched source-drain conduction, low OFF capacitance (26pF typ at drain), and rail-to-rail analog signal handling up to ±15V with minimal rDS(ON) variation over the full input range - critical for precision sample-and-hold and multiplexed sensor interfaces.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| ON Resistance (max) | 100Ω at 25°C - ensures minimal signal attenuation and gain error in precision DC-coupled paths |
| Transition Time (tTRANS) | <250ns - supports multiplexing rates up to ~2MHz without significant settling delay |
| Charge Injection | 20pC typical - reduces hold capacitor voltage step error in sample-and-hold circuits |
| Analog Signal Range | ±15V with ±15V supplies - enables direct interfacing with industrial ±10V sensor outputs |
| Supply Range | Single +5V to +34V or split ±5V to ±20V - accommodates legacy and high-voltage industrial rails |
| Logic Compatibility | TTL/CMOS - allows direct connection to microcontrollers, FPGAs, and legacy logic without level shifters |
| OFF Isolation | -75dB at 100kHz - suppresses crosstalk between inactive channels in dense multiplexed systems |
Pinout & Package
Package: 16-lead TSSOP (M16.173), Pb-free, RoHS-compliant, 4.9mm × 4.5mm body, 0.65mm pitch.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 A0 | Address bit 0 (LSB) | Selects channel index bit 0; driven by MCU GPIO or address bus line |
| 2 EN | Enable input (active-high) | Disables all switches when low; required for multi-mux synchronization |
| 3 V− | Negative supply terminal | Bias reference for analog switches; must be connected even in single-supply mode |
| 4–7, 9–12 S1–S8 | Source inputs (channels 1–8) | Bidirectional analog inputs; pin order matches binary address decoding (S1 = 000, S8 = 111) |
| 8 D | Drain (common output) | Single-ended analog output node; connects to ADC input or amplifier stage |
| 13 V+ | Positive supply terminal | Substrate bias and switch driver rail; sets upper analog voltage limit |
| 14 GND | Logic ground | Digital reference for EN/A0–A2; separate from analog return in mixed-signal layouts |
| 15 A2 | Address bit 2 (MSB) | Completes 3-bit channel selection; MSB determines S5–S8 vs S1–S4 group |
| 16 A1 | Address bit 1 | Mid-order address bit; used with A0/A2 to fully decode 8 channels |
Key Features
| Feature | Design Value |
|---|---|
| Bilateral analog switching | Enables AC-coupled and bidirectional signal routing (e.g., sensor excitation and return) |
| Low rDS(ON) matching | <15Ω max difference between any two channels - preserves gain consistency across multiplexed channels |
| Split/single supply flexibility | Operates identically across ±15V, +12V, or +24V rails - simplifies BOM consolidation across product variants |
| Pb-free TSSOP package | M16.173 footprint compatible with standard reflow profiles - supports lead-free manufacturing compliance |
| Latch-up immunity | Epitaxial silicon-gate process eliminates destructive latch-up - critical for high-reliability industrial environments |
Applications
| Data Acquisition Systems | Audio Switching Systems |
|---|---|
Use Scenario: Multiplexing 8 thermocouple or RTD sensor outputs into a single 24-bit sigma-delta ADC. IC Role / Device Role / Timing Role: Analog front-end channel selector with low offset drift and minimal channel-to-channel gain mismatch. Use Value: Maintains <15Ω rDS(ON) matching and <20pC charge injection to preserve measurement accuracy across all 8 channels. | Use Scenario: Routing line-level stereo signals between multiple sources (DAC, Bluetooth module, aux input) and headphone/line-out amplifiers. IC Role / Device Role / Timing Role: Low-distortion analog signal path selector with rail-to-rail ±15V capability. Use Value: Delivers -75dB OFF isolation at 10kHz and <100Ω ON resistance to prevent audible crosstalk or level loss. |
| Automatic Test Equipment | Sample and Hold Circuits |
Use Scenario: Configuring programmable test fixtures that route stimulus signals to DUT pins and capture responses via shared instrumentation. IC Role / Device Role / Timing Role: High-speed, low-leakage signal path manager with sub-250ns switching for rapid test sequencing. Use Value: Enables <150ns EN turn-on and <250ns tTRANS to support >1MHz test pattern rates without timing skew. | Use Scenario: Sampling 8 independent analog sensor outputs into a shared hold capacitor before digitization. IC Role / Device Role / Timing Role: Precision sampling switch with minimized charge injection-induced voltage step. Use Value: 20pC typical charge injection limits hold-step error to <2mV on a 10nF capacitor - sufficient for 12-bit resolution. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar analog multiplexer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADG408BRUZ | Higher typical rDS(ON) (120Ω), slower tTRANS (300ns), same TSSOP-16 package | Slightly reduced bandwidth and higher on-resistance drift with temperature | Preferred where ADI ecosystem integration or SPICE model availability is prioritized over speed/resistance |
| MAX4617ESE+ | Lower supply voltage ceiling (+20V max), no split-supply support, SOIC-16 only | Not suitable for ±15V industrial sensors; limited to single-supply ≤+20V systems | Chosen when cost sensitivity outweighs bipolar supply requirement and layout space permits SOIC |
Compared with ADG408BRUZ and MAX4617ESE+, DG408DVZ offers superior analog performance (lower rDS(ON), faster switching, better charge injection) and full ±20V split-supply operation - making it optimal for high-precision, wide-voltage industrial multiplexing where signal integrity is critical.
Availability
DG408DVZ is available at Aetrix Electronics and suitable for data acquisition systems, audio switching systems, and automatic test equipment requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for DG408DVZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader delivering microcontrollers, analog power, and connectivity solutions for automotive, industrial, and IoT applications.
The DG408DVZ belongs to Renesas' precision analog multiplexer product line, designed specifically for high-fidelity signal routing in industrial data acquisition, test instrumentation, and sensor interface applications where low distortion, low leakage, and rail-to-rail operation are mandatory.
FAQ
What is the maximum analog signal voltage range supported by DG408DVZ?
The DG408DVZ supports an analog signal range of ±15V when operated with ±15V supplies, and 0V to +12V with a +12V single supply. Absolute maximum ratings allow V+ to V− up to 44V, but the usable linear analog range is bounded by the supply rails. This makes DG408DVZ suitable for interfacing with industrial ±10V sensors and legacy instrumentation without external level shifting.
Does DG408DVZ require external pull-up resistors on its address or enable pins?
No, DG408DVZ does not require external pull-up resistors. Its digital inputs (A0, A1, A2, EN) have TTL/CMOS-compatible thresholds (VAL ≤ 0.8V, VAH ≥ 2.4V) and internal clamping diodes. Input leakage remains within ±10μA across temperature, allowing direct connection to microcontroller GPIOs or FPGA I/O banks without external biasing components.
Can DG408DVZ be used in a single-supply configuration with 0V ground reference?
Yes, DG408DVZ supports true single-supply operation down to +5V with V− tied to ground. In this mode, the analog input range is 0V to V+ − 1V (e.g., 0V to +11V at +12V supply), and logic inputs remain compatible with 0V/3.3V or 0V/5V systems. The device maintains <100Ω rDS(ON) and <250ns tTRANS under these conditions, as verified in the datasheet's single-supply test tables.
How does the charge injection specification of DG408DVZ impact sample-and-hold circuit design?
DG408DVZ specifies 20pC typical charge injection, measured with CL = 10nF and VS = 0V. In a sample-and-hold application, this results in a hold-step error of ΔV = Q/CL = 2mV - well within 12-bit (≈1.2mV) and acceptable for 14-bit (≈0.3mV) systems with minor trimming. Layout best practices (short traces, guard rings) further minimize parasitic coupling that could exacerbate this effect.
Is DG408DVZ pin-compatible with the legacy DG508A series?
Yes, DG408DVZ is a documented drop-in replacement for DG508A, sharing identical pinout, function mapping, and electrical interface across all 16 pins. It improves upon DG508A with lower ON resistance (<100Ω vs. 120Ω), faster switching (<250ns vs. 350ns), reduced charge injection, and latch-up immunity - all while maintaining full backward compatibility in existing PDIP, SOIC, and TSSOP layouts.
DG408DVZ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Packaging:
- Tube
- Product Status:
- Active
- Switch Circuit:
- -
- Multiplexer/Demultiplexer Circuit:
- 8:1
- Number of Circuits:
- 1
- On-State Resistance (Max):
- 100Ohm
- Channel-to-Channel Matching (ΔRon):
- 15Ohm (Max)
- Voltage - Supply, Single (V+):
- 5V ~ 34V
- Voltage - Supply, Dual (V±):
- ±5V ~ 20V
- Switch Time (Ton, Toff) (Max):
- 150ns, 150ns
- -3db Bandwidth:
- -
- Charge Injection:
- 20pC
- Channel Capacitance (CS(off), CD(off)):
- 3pF, 26pF
- Current - Leakage (IS(off)) (Max):
- 500pA
- Crosstalk:
- -
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-TSSOP
DG408DVZ FAQ
1.How can I place an order for DG408DVZ through Aetrix?
Please submit a Request for Quotation (RFQ) for DG408DVZ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DG408DVZ reliable?
The price and inventory of DG408DVZ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DG408DVZ is usually 5 days.
3.What payment methods are accepted for DG408DVZ?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DG408DVZ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DG408DVZ?
DG408DVZ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DG408DVZ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DG408DVZ?
For technical support, including DG408DVZ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DG408DVZ requirements.
6.How does Aetrix verify that DG408DVZ is sourced from the original manufacturer or authorized distributors?
All DG408DVZ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DG408DVZ meets industry standards.
7.What is the process for return or replacement of DG408DVZ?
All DG408DVZ units undergo pre-shipment inspection (PSI). If there is an issue with DG408DVZ, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DG408DVZ part is unused and in its original packaging.
Return procedure for DG408DVZ:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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