Send an Inquiry

To receive a quote for your project, please fill in the following information, and we’ll get back to you promptly.

Submit Inventory List

Please fill in the following information, and we’ll get back to you promptly.

Home > Products > Integrated Circuits (ICs) > Interface > Analog Switches, Multiplexers, Demultiplexers

Vishay Siliconix DG408LDY

Name: DG408LDY
Brand: Vishay Siliconix
SKU: DG408LDY
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

Compare

Part No.:: DG408LDY

Manufacturer:: Vishay Siliconix

Category:: Analog Switches, Multiplexers, Demultiplexers

Package:: 16-SOIC (0.154", 3.90mm Width)

Datasheet:: DG408LDY.pdf

Description:: IC MUX 8:1 29OHM 16SOIC

Quantity:: RFQ Add To RFQ list

Payment:

Shipping:

Inventory:4,931

Please send an inquiry. Send us your inquiry, and we will respond immediately.

Product details

Overview

DG408LDY from Vishay Siliconix is an 8-channel single-ended analog multiplexer IC designed for precision signal routing in low-voltage data acquisition systems. It operates on single supplies from 3 V to 12 V or dual supplies of ±3 V to ±6 V, features 17 Ω typical on-resistance, 38 ns enable turn-on time, and break-before-make switching - enabling reliable channel isolation in battery-powered test equipment.

For engineers reviewing the DG408LDY datasheet, DG408LDY pinout, DG408LDY application, or DG408LDY equivalent, key selection criteria include its guaranteed break-before-make timing, sub-1 nA off-leakage at 85 °C, 1 pC charge injection, and SOIC-16 package compatibility with legacy DG408 footprints.

Technical Context

The DG408LDY implements a BiCMOS decoder/driver architecture with level-shifted control logic, enabling TTL/CMOS/LV logic compatibility down to 3 V supply. Its analog switch array uses matched FETs with integrated clamping diodes referenced to V+ and V−, supporting rail-to-rail analog signal ranges up to 0–12 V (single supply) or ±5 V (dual supply).

Switching behavior is governed by a 3-bit binary address (A0–A2) and active-low enable (EN), with truth-table-defined channel selection and guaranteed break-before-make timing (t_OPEN ≥ 1 ns). All digital inputs meet standard logic thresholds: V_INH ≥ 2.4 V and V_INL ≤ 0.8 V at V+ = 12 V.

Key Specifications

Parameter	Value and Actual Design Meaning
Analog channels	8 single-ended inputs to 1 common output - enables compact multi-sensor signal consolidation without external buffering.
On-resistance (R_DS(on))	17 Ω typ. at V+ = 12 V - ensures minimal gain error and voltage drop in precision 12-bit ADC front-ends.
Enable turn-on time (t_ON(EN))	38 ns typ. at V+ = 12 V - supports high-throughput sampling in >10 MSPS data loggers.
Off-leakage current (I_S(OFF))	0.2 nA max. at T_A = 85 °C - preserves accuracy in high-impedance sensor interfaces (e.g., thermocouples, pH electrodes).
Charge injection	1 pC typ. - limits settling error in sample-and-hold circuits using ≤1 nF hold capacitors.
Off-isolation	82 dB at 1 MHz - suppresses crosstalk between adjacent channels in multi-tone audio routing.
ESD rating	2000 V HBM - provides robustness during board handling and in-field connector insertion.

Pinout & Package

Package: 16-pin narrow-body SOIC (JEDEC MS-012), 10.0 mm × 4.0 mm × 1.75 mm profile, RoHS-compliant matte tin lead finish.

Pin	Circuit Role	Design Meaning
1, 2, 3, 4, 5, 6, 7, 8	Analog inputs S1–S8	Source terminals of eight independent NMOS switches - each connects to D when selected; all share common drain path.
9	GND	Ground reference for internal bias circuitry and digital logic - must be low-impedance connection to minimize noise coupling.
10	V−	Negative supply rail - required for dual-supply operation; tied to GND in single-supply mode.
11	V+	Positive supply rail - powers analog switch core and level-shifting logic; supports 3–12 V range.
12	EN	Active-low enable - disables all channels when high; asserts decoding logic only when low (logic "0" ≤ 0.8 V).
13, 14, 15	A0, A1, A2	3-bit binary address inputs - select one of eight channels (000 = S1, 111 = S8); CMOS-compatible input thresholds.
16	D	Common analog output (drain) - delivers selected Sx signal; requires external load impedance ≥ 1 kΩ for specified R_DS(on).

Key Features

Feature	Design Value
Break-before-make switching	Guaranteed t_OPEN ≥ 1 ns - prevents momentary shorting between adjacent analog inputs during channel transitions.
Rail-to-rail analog range	0 to V+ (single supply) or ±5 V (dual supply) - enables full utilization of ADC dynamic range without signal attenuation.
Low power consumption	0.2 μA max. supply current - extends battery life in portable instrumentation with intermittent sampling duty cycles.
Logic interface flexibility	TTL/CMOS/LV compatible with 3 V logic - eliminates need for level translators when interfacing with modern microcontrollers.
Channel matching	ΔR_DS(on) ≤ 3 Ω max. - ensures consistent gain across channels in multi-channel calibration systems.

Applications

Data Acquisition Systems	Battery-Powered Test Equipment
Use Scenario: Multiplexing outputs from 8 temperature sensors into a single 12-bit SAR ADC. IC Role / Device Role: Precision analog switch providing low-offset, low-leakage signal path selection. Use Value: 0.2 nA max. off-leakage prevents thermal EMF errors; 17 Ω R_DS(on) limits gain error to <0.02% at 10 kΩ source impedance.	Use Scenario: Routing audio line-level signals in handheld oscilloscope with dual-channel input. IC Role / Device Role: Low-crosstalk analog multiplexer enabling simultaneous display of two probe inputs. Use Value: 82 dB off-isolation at 1 MHz suppresses inter-channel interference; 38 ns switching supports real-time waveform updates.
Portable Sample-and-Hold Circuits	SDSL/DSLAM Line Card Monitoring
Use Scenario: Sampling analog sensor data at 100 kSPS before digitization in wearable health monitor. IC Role / Device Role: Charge-injection-optimized switch feeding hold capacitor in track-and-hold stage. Use Value: 1 pC typ. charge injection reduces settling error to <1 LSB for 1 nF hold capacitor and 12-bit resolution.	Use Scenario: Monitoring differential line voltages across multiple DSL pairs in central office equipment. IC Role / Device Role: High-isolation analog switch selecting line test points for diagnostic ADC measurement. Use Value: ±5 V dual-supply support matches telecom line signaling; 2000 V HBM ESD withstands field maintenance events.

Data Acquisition Systems

Battery-Powered Test Equipment

Use Scenario: Multiplexing outputs from 8 temperature sensors into a single 12-bit SAR ADC.

IC Role / Device Role: Precision analog switch providing low-offset, low-leakage signal path selection.

Use Value: 0.2 nA max. off-leakage prevents thermal EMF errors; 17 Ω R_DS(on) limits gain error to <0.02% at 10 kΩ source impedance.

Use Scenario: Routing audio line-level signals in handheld oscilloscope with dual-channel input.

IC Role / Device Role: Low-crosstalk analog multiplexer enabling simultaneous display of two probe inputs.

Use Value: 82 dB off-isolation at 1 MHz suppresses inter-channel interference; 38 ns switching supports real-time waveform updates.

Portable Sample-and-Hold Circuits

SDSL/DSLAM Line Card Monitoring

Use Scenario: Sampling analog sensor data at 100 kSPS before digitization in wearable health monitor.

IC Role / Device Role: Charge-injection-optimized switch feeding hold capacitor in track-and-hold stage.

Use Value: 1 pC typ. charge injection reduces settling error to <1 LSB for 1 nF hold capacitor and 12-bit resolution.

Use Scenario: Monitoring differential line voltages across multiple DSL pairs in central office equipment.

IC Role / Device Role: High-isolation analog switch selecting line test points for diagnostic ADC measurement.

Use Value: ±5 V dual-supply support matches telecom line signaling; 2000 V HBM ESD withstands field maintenance events.

Equivalent & Alternatives

The following parts are listed as comparable options for similar analog multiplexer applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
MAX4617ESE+	Higher R_DS(on) (45 Ω typ. at +5 V), no break-before-make guarantee, 16-pin SOIC package.	Limited to lower-precision industrial controls where leakage & timing margins are relaxed.	Select when cost sensitivity outweighs need for guaranteed channel isolation and sub-1 nA leakage.
ADG408BRZ	Wider supply range (±15 V), higher R_DS(on) (40 Ω typ.), 16-pin SOIC, but no 3 V logic compatibility.	Suitable for high-voltage industrial PLC I/O modules requiring extended analog range.	Choose for ±15 V operation or legacy ADI ecosystem integration; avoid if 3 V microcontroller interface is required.

Compared with MAX4617ESE+ and ADG408BRZ, DG408LDY uniquely balances ultra-low leakage, guaranteed break-before-make timing, and native 3 V logic compatibility - making it optimal for portable, precision, low-power analog signal routing where channel integrity and battery life are critical.

Availability

DG408LDY is available at Aetrix Electronics and suitable for data acquisition systems, battery-operated test equipment, and portable sample-and-hold circuits requiring stable component supply and long-term manufacturing continuity.

Supply support for DG408LDY includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Vishay Siliconix is a global semiconductor manufacturer specializing in discrete semiconductors and analog ICs, with leadership in power MOSFETs, diodes, optoelectronics, and precision analog switches.

The DG408LDY belongs to Vishay's precision analog multiplexer product line, engineered for low-leakage, low-distortion signal routing in portable and high-accuracy measurement systems.

FAQ

What is the maximum operating temperature range for DG408LDY?

The DG408LDY is rated for operation from –40 °C to +85 °C, as confirmed by its ordering suffix "D" and the Absolute Maximum Ratings table in Vishay document 71342. This industrial temperature range ensures reliability in portable test gear and embedded data loggers exposed to ambient thermal variations.

Does DG408LDY support single-supply operation at 3 V?

Yes, DG408LDY supports single-supply operation from 3 V to 12 V. At V+ = 3 V, it maintains functional logic thresholds (V_INL ≤ 0.4 V, V_INH ≥ 2.0 V), 105 Ω max. R_DS(on), and 150 ns max. t_TRANS, enabling use in ultra-low-power IoT sensor nodes powered by coin cells or energy harvesters.

Is DG408LDY pin-compatible with the legacy DG408?

Yes, DG408LDY is explicitly specified as pin-for-pin compatible with the industry-standard DG408, per the Vishay datasheet S16-0276-Rev. J. This allows direct replacement in existing designs without PCB layout changes, while delivering improved on-resistance, faster switching, and lower leakage.

What is the analog signal range supported by DG408LDY in dual-supply mode?

In dual-supply mode (e.g., V+ = +5 V, V− = –5 V), DG408LDY supports an analog signal range of –5 V to +5 V, as verified in the "Analog Signal Range" specification table under dual-supply test conditions. This rail-to-rail capability enables accurate conditioning of bipolar sensor outputs like accelerometers or strain gauges.

How does DG408LDY handle overvoltage on analog inputs?

DG408LDY includes internal clamping diodes on all analog inputs (S1–S8, D) and digital pins (A0–A2, EN) referenced to V+ and V−. Signals exceeding V+ or falling below V− are clamped, provided forward diode current is limited to the absolute maximum rating of 30 mA - a design consideration for fault-tolerant front-end protection.

DG408LDY Specifications

Product attributes: Attribute value

Manufacturer:: Vishay Siliconix

Series:: -

Packaging:: Tube

Product Status:: Obsolete

Switch Circuit:: -

Multiplexer/Demultiplexer Circuit:: 8:1

Number of Circuits:: 1

On-State Resistance (Max):: 29Ohm

Channel-to-Channel Matching (ΔRon):: 1Ohm

Voltage - Supply, Single (V+):: 2.7V ~ 12V

Voltage - Supply, Dual (V±):: ±3V ~ 6V

Switch Time (Ton, Toff) (Max):: 55ns, 25ns

-3db Bandwidth:: -

Charge Injection:: 1pC

Channel Capacitance (CS(off), CD(off)):: 7pF, 20pF

Current - Leakage (IS(off)) (Max):: 1nA

Crosstalk:: -82dB @ 100kHz

Operating Temperature:: -40°C ~ 85°C (TA)

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: 16-SOIC

DG408LDY FAQ

1.How can I place an order for DG408LDY through Aetrix?

Please submit a Request for Quotation (RFQ) for DG408LDY on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for DG408LDY reliable?

The price and inventory of DG408LDY are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DG408LDY is usually 5 days.

3.What payment methods are accepted for DG408LDY?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DG408LDY transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for DG408LDY?

DG408LDY orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your DG408LDY order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for DG408LDY?

For technical support, including DG408LDY datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DG408LDY requirements.

6.How does Aetrix verify that DG408LDY is sourced from the original manufacturer or authorized distributors?

All DG408LDY products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DG408LDY meets industry standards.

7.What is the process for return or replacement of DG408LDY?

All DG408LDY units undergo pre-shipment inspection (PSI). If there is an issue with DG408LDY, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The DG408LDY part is unused and in its original packaging.

Return procedure for DG408LDY:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

Tech Hub

2026-09-10 Schmitt Trigger Explained: Hysteresis, Circuits, Inverters and Applications

Schmitt triggers use separate rising and falling thresholds to stabilize slow or noisy signals. This guide covers hysteresis, 74HC14 and 74HCT14 selection, comparator calculations, RC oscillators and p…

2026-09-09 Counterfeit Electronic Components: How to Detect, Authenticate, and Test Suspect Parts

Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …

2026-09-08 Obsolete Electronic Components: How to Source and Evaluate Replacements

A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.

2026-09-07 TTL vs CMOS Logic Levels: 74HC and 74HCT Compatibility Explained

TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.

2026-09-04 Logic Level Shifter: How to Connect 3.3V and 5V Logic Safely

A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.

2026-09-03 74HC595 vs TPIC6B595: Output Drive, Pinout, Current, and Load Selection

The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…

2026-09-02 74HC595 Pinout, Timing, Output Current, and Applications

The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…

2026-09-01 Latch vs Flip-Flop: Timing, Differences and Design Choices

A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…

2026-08-30 D Latch Circuit: Truth Table, Timing, ICs and Applications

A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …

2026-08-28 SR Latch Explained: NOR and NAND Circuits, Truth Tables, and Applications

An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…