Vishay Siliconix DG409LDQ-T1-E3
- Part No.:
- DG409LDQ-T1-E3
- Manufacturer:
- Vishay Siliconix
- Package:
- 16-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
DG409LDQ-T1-E3.pdf
- Description:
- IC SWITCH SP4T X 2 29OHM 16TSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
DG409LDQ-T1-E3 from Vishay Siliconix is a dual 4-channel differential analog multiplexer IC designed for precision signal routing in low-voltage systems. It features break-before-make switching, 17 Ω typical on-resistance at 12 V single supply, 38 ns enable turn-on time, and operates from 2.7 V to 12 V single or ±3 V to ±6 V dual supplies. It is used in portable test equipment and battery-powered data acquisition where channel crosstalk avoidance and low charge injection are critical.
For engineers reviewing the DG409LDQ-T1-E3 datasheet, DG409LDQ-T1-E3 pinout, DG409LDQ-T1-E3 application, or DG409LDQ-T1-E3 equivalent, key selection criteria include guaranteed break-before-make timing, sub-1 nA off-leakage at 85 °C, 82 dB off-isolation at 1 MHz, compatibility with 3 V TTL/CMOS logic, and TSSOP-16 package suitability for space-constrained PCB layouts.
Technical Context
The DG409LDQ-T1-E3 implements a dual 4:1 differential switch architecture with independent 2-bit binary address decoding (A0, A1) per channel pair. Its BiCMOS process enables rail-to-rail analog signal handling across its full supply range while maintaining low RDS(on) flatness (≤7 Ω) and tight channel-to-channel matching (ΔRDS(on) ≤3 Ω).
It guarantees break-before-make operation with tOPEN ≥1 ns (room temperature), supports logic thresholds as low as 0.4 V (for 3 V operation), and integrates 2000 V HBM ESD protection. All digital inputs are compatible with 3 V logic families without level shifting.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Analog Function | Dual 4-channel differential analog multiplexer - routes one of four differential input pairs to common differential outputs |
| Supply Range | 2.7 V to 12 V single supply or ±3 V to ±6 V dual supply - supports battery-powered and mixed-rail systems |
| RDS(on) | 17 Ω typ. at V+ = 12 V - ensures minimal signal attenuation and voltage drop in precision measurement paths |
| tON(EN) / tOFF(EN) | 38 ns / 18 ns typ. at V+ = 12 V - enables high-speed multiplexing in sample-and-hold or real-time data acquisition |
| Off-Leakage (IS(OFF)) | ±1 nA max. at 25 °C, ±10 nA max. at 85 °C - preserves accuracy in high-impedance sensor interfaces |
| Charge Injection | 1 pC typ. - minimizes settling error in capacitor-coupled circuits like ADC front-ends |
| Off-Isolation | 82 dB at 1 MHz - suppresses crosstalk between inactive channels in multi-signal routing |
Pinout & Package
Package: 16-pin TSSOP (JEDEC MS-012, 5.0 mm × 4.4 mm × 1.05 mm body height), RoHS-compliant, lead-free (E3 suffix), tape-and-reel (T1 suffix).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (A0) | Address Input LSB | Selects differential channel pair (0–3); TTL/CMOS-compatible with VIL ≤ 0.6 V, VIH ≥ 2.4 V |
| 2 (A1) | Address Input MSB | Completes 2-bit binary address for channel selection; referenced to GND |
| 3 (EN) | Enable Input | Active-high digital control; disables all switches when low (high-impedance state) |
| 4 (GND) | Ground Reference | Analog and digital ground return; must be low-impedance connection for leakage and noise control |
| 5 (V−) | Negative Supply Rail | Required for dual-supply operation; accepts −3 V to −6 V; clamped internally if exceeded |
| 6 (S1a) | Differential Source 1, Positive | Input terminal of first differential channel pair; supports rail-to-rail analog signals |
| 7 (S1b) | Differential Source 1, Negative | Complementary input to S1a; maintains matched path impedance and timing |
| 8 (S2a) | Differential Source 2, Positive | Second differential input pair; identical electrical characteristics to S1a/S1b |
| 9 (S2b) | Differential Source 2, Negative | Complementary input to S2a; enables true differential signal integrity |
| 10 (S3a) | Differential Source 3, Positive | Third differential input pair; shares same RDS(on) matching and flatness specs |
| 11 (S3b) | Differential Source 3, Negative | Complementary input to S3a; critical for common-mode rejection in instrumentation |
| 12 (S4a) | Differential Source 4, Positive | Fourth differential input; worst-case off-isolation occurs here due to proximity to drain pin |
| 13 (S4b) | Differential Source 4, Negative | Complementary input to S4a; completes full 4-channel differential set |
| 14 (Da) | Differential Drain Output, Positive | Common output node for positive side of selected differential channel |
| 15 (Db) | Differential Drain Output, Negative | Common output node for negative side; maintains phase coherence with Da |
| 16 (V+) | Positive Supply Rail | Accepts 2.7 V to 12 V single or +3 V to +6 V dual; internal clamping protects against overvoltage |
Key Features
| Feature | Design Value |
|---|---|
| Break-before-make switching | Guaranteed tOPEN ≥1 ns prevents momentary shorting between adjacent differential channels during address changes |
| Low on-resistance flatness | RFLAT(on) ≤7 Ω ensures consistent gain and linearity across full analog input range (0–12 V) |
| Ultra-low charge injection | 1 pC typical minimizes voltage glitch on sampling capacitors, reducing ADC aperture error |
| High off-isolation | 82 dB at 1 MHz suppresses interference from unselected channels in dense multi-signal routing |
| 3 V logic compatibility | Supports VINL ≤ 0.6 V and VINH ≥ 2.4 V - eliminates need for external level shifters with modern microcontrollers |
| 2000 V HBM ESD rating | Enables robust handling in manufacturing and field environments without additional protection circuitry |
Applications
| Battery-Powered Data Acquisition | Portable Instrumentation Front-End |
|---|---|
|
Use Scenario: Multiplexing multiple sensor outputs (e.g., thermocouples, strain gauges) into a single precision ADC in handheld meters. IC Role / Device Role / Timing Role: Dual differential mux provides matched gain paths and rejects common-mode noise while enabling sequential channel scanning. Use Value: Sub-1 nA leakage and 17 Ω RDS(on) preserve microvolt-level resolution; break-before-make prevents cross-channel coupling during scan transitions. |
Use Scenario: Routing calibrated reference voltages and sensor signals in portable oscilloscopes or spectrum analyzers. IC Role / Device Role / Timing Role: Differential switching maintains signal integrity and CMRR across wide bandwidths up to 1 MHz. Use Value: 82 dB off-isolation and 38 ns tON support accurate multi-channel time-domain measurements without ghosting or delay skew. |
| Audio Signal Routing | DSL/SDSL Line Interface |
|
Use Scenario: Selecting between balanced microphone inputs or line-level sources in professional audio mixers with low-power constraints. IC Role / Device Role / Timing Role: Dual 4:1 differential architecture handles true balanced audio paths without ground loops or phase inversion. Use Value: 1 pC charge injection prevents audible pop/click artifacts during source switching; rail-to-rail analog range supports ±2.5 V audio peaks. |
Use Scenario: Channel selection and test loopback in DSLAM line cards and customer premises equipment. IC Role / Device Role / Timing Role: High off-isolation and fast enable timing isolate active lines from maintenance/test circuits during live operation. Use Value: 82 dB OIRR at 100 kHz meets ITU-T G.992.x crosstalk requirements; ±3 V to ±6 V dual supply matches line driver bias rails. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual differential analog multiplexer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX4675ESE+ | Higher RDS(on) (45 Ω typ.), slower tON (75 ns), no guaranteed break-before-make | Lower performance in precision, high-speed, or low-leakage applications | Consider only if cost sensitivity outweighs leakage and timing requirements |
| ADG1419BRUZ | Lower RDS(on) (2.7 Ω typ.), higher supply range (up to ±15 V), but larger 16-lead TSSOP footprint (6.4 mm × 4.4 mm) | Better for high-voltage industrial systems; less suitable for ultra-compact portable designs | Prefer when <5 Ω on-resistance is mandatory and board area allows larger package |
Compared with MAX4675ESE+ and ADG1419BRUZ, the DG409LDQ-T1-E3 delivers optimal balance of low leakage (<1 nA), guaranteed break-before-make, and compact 5.0 mm × 4.4 mm TSSOP-making it ideal for battery-powered precision instruments where size, power, and signal fidelity are jointly constrained.
Availability
DG409LDQ-T1-E3 is available at Aetrix Electronics and suitable for battery-operated equipment, portable test equipment, and sample-and-hold circuits requiring stable component supply across industrial temperature ranges (−40 °C to +85 °C).
Supply support for DG409LDQ-T1-E3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay Siliconix is a global leader in discrete semiconductors and passive components, specializing in high-reliability analog switching, power management, and sensing solutions.
The DG409LDQ-T1-E3 belongs to Vishay's precision analog multiplexer product line, engineered for low-voltage, low-leakage, and high-isolation signal routing in portable and instrumentation-grade systems.
FAQ
What is the maximum operating temperature range for the DG409LDQ-T1-E3?
The DG409LDQ-T1-E3 is rated for operation from −40 °C to +85 °C (D temperature suffix). Its leakage current remains within specification (±10 nA max.) across this full range, and thermal derating begins above 75 °C at 10 mW/°C. This makes DG409LDQ-T1-E3 suitable for industrial and automotive cabin environments where ambient temperatures vary widely.
Does the DG409LDQ-T1-E3 support single-supply operation below 3 V?
No - the DG409LDQ-T1-E3 minimum single-supply voltage is 2.7 V, with verified operation down to 3 V in production testing. At V+ = 3 V, RDS(on) rises to 60 Ω typ., tON increases to 70 ns, and logic thresholds tighten to VINL ≤ 0.4 V / VINH ≥ 2.0 V. Operation below 2.7 V is not characterized or guaranteed for DG409LDQ-T1-E3.
Is the DG409LDQ-T1-E3 pin-compatible with the legacy DG409?
Yes - the DG409LDQ-T1-E3 is explicitly designed as a pin-for-pin compatible upgrade to the DG409, offering improved RDS(on), faster switching, lower leakage, and enhanced ESD protection (2000 V HBM vs. unspecified for DG409). No PCB layout changes are required when replacing DG409 with DG409LDQ-T1-E3 in existing TSSOP-16 footprints.
What is the analog signal range supported by the DG409LDQ-T1-E3 in dual-supply mode?
In dual-supply mode (e.g., V+ = +5 V, V− = −5 V), the DG409LDQ-T1-E3 supports a full analog signal range of −5 V to +5 V. This rail-to-rail capability enables direct interfacing with bipolar sensors and op-amp stages without level-shifting circuitry, and is confirmed in the "Analog Signal Range" parameter table for dual-supply conditions in the official Vishay datasheet (Doc. #71342).
How does the break-before-make timing work on the DG409LDQ-T1-E3?
The DG409LDQ-T1-E3 guarantees break-before-make operation with tOPEN ≥1 ns (measured at room temperature), meaning the previously selected channel disconnects before the newly addressed channel connects. This is implemented via internal timing control in the decoder/driver stage and prevents momentary shorts between differential input pairs - a critical feature for avoiding transient crosstalk in high-precision multiplexed systems using DG409LDQ-T1-E3.
DG409LDQ-T1-E3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay Siliconix
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Switch Circuit:
- SP4T
- Multiplexer/Demultiplexer Circuit:
- 4:1
- Number of Circuits:
- 2
- On-State Resistance (Max):
- 29Ohm
- Channel-to-Channel Matching (ΔRon):
- 1Ohm
- Voltage - Supply, Single (V+):
- 2V ~ 12V
- Voltage - Supply, Dual (V±):
- ±3V ~ 6V
- Switch Time (Ton, Toff) (Max):
- 55ns, 25ns
- -3db Bandwidth:
- -
- Charge Injection:
- 1pC
- Channel Capacitance (CS(off), CD(off)):
- 7pF, 20pF
- Current - Leakage (IS(off)) (Max):
- 1nA
- Crosstalk:
- -82dB @ 100kHz
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-TSSOP
DG409LDQ-T1-E3 FAQ
1.How can I place an order for DG409LDQ-T1-E3 through Aetrix?
Please submit a Request for Quotation (RFQ) for DG409LDQ-T1-E3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DG409LDQ-T1-E3 reliable?
The price and inventory of DG409LDQ-T1-E3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DG409LDQ-T1-E3 is usually 5 days.
3.What payment methods are accepted for DG409LDQ-T1-E3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DG409LDQ-T1-E3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DG409LDQ-T1-E3?
DG409LDQ-T1-E3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DG409LDQ-T1-E3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DG409LDQ-T1-E3?
For technical support, including DG409LDQ-T1-E3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DG409LDQ-T1-E3 requirements.
6.How does Aetrix verify that DG409LDQ-T1-E3 is sourced from the original manufacturer or authorized distributors?
All DG409LDQ-T1-E3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DG409LDQ-T1-E3 meets industry standards.
7.What is the process for return or replacement of DG409LDQ-T1-E3?
All DG409LDQ-T1-E3 units undergo pre-shipment inspection (PSI). If there is an issue with DG409LDQ-T1-E3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DG409LDQ-T1-E3 part is unused and in its original packaging.
Return procedure for DG409LDQ-T1-E3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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