Vishay Siliconix DG419BDY-E3
- Part No.:
- DG419BDY-E3
- Manufacturer:
- Vishay Siliconix
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
DG419BDY-E3.pdf
- Description:
- IC SWITCH SPDT X 1 25OHM 8SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:480
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Product details
Overview
DG419BDY-E3 from Vishay Siliconix is a precision monolithic SPDT CMOS analog switch optimized for high-voltage, low-distortion signal routing in ±15 V dual-supply systems. It features 15 Ω on-resistance, 110 ns turn-on time, guaranteed break-before-make switching, and operates across –40 °C to +85 °C in an SOIC-8 package - ideal for sample-and-hold circuits and military-grade instrumentation.
For engineers reviewing the DG419BDY-E3 datasheet, DG419BDY-E3 pinout, DG419BDY-E3 application, or DG419BDY-E3 equivalent, key selection criteria include verified break-before-make timing (tD = 16 ns), channel leakage < ±0.75 nA at full temperature range, ±15 V analog signal handling, and SOIC-8 footprint compatibility with board space–constrained precision analog designs.
Technical Context
The DG419BDY-E3 implements a single-pole double-throw (SPDT) topology with two complementary switches (SW1 and SW2) controlled by one digital input. Its HVSG process enables ±20 V absolute maximum supply ratings and latchup immunity via epitaxial isolation.
Break-before-make operation is electrically guaranteed-not just typical-ensuring no signal shorting during transition. Switch conduction is bidirectional, with on-resistance flatness maintained over ±12.5 V signal swing and stable across –40 °C to +85 °C.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Analog Signal Range | ±15 V - supports full-rail bipolar signal switching without clipping in dual-supply precision systems |
| RDS(on) | 15 Ω max - ensures minimal gain error and THD degradation in 50 Ω–600 Ω signal paths |
| tON/tOFF | 110 ns / 88 ns - enables sub-microsecond multiplexing in data acquisition and test equipment |
| Break-Before-Make Delay (tD) | 16 ns min - guarantees no overlap between SW1 and SW2 conduction, critical for signal integrity |
| IS(off), ID(off) | ±0.75 nA max at full temp - preserves DC accuracy in high-impedance sensor interfaces and integrators |
| Charge Injection | 38 pC - limits voltage glitch in sample-and-hold nodes with ≤10 nF hold capacitors |
| OIRR | –82 dB at 1 MHz - provides strong isolation between active and inactive signal paths |
Pinout & Package
Package: SOIC-8 (Narrow, JEDEC MS-012), 4.90 mm × 3.90 mm × 1.45 mm body height, RoHS-compliant matte tin lead finish.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (IN) | Digital control input | Active-high logic: 0 V ≤ 0.8 V = ON for SW1; ≥2.4 V = ON for SW2 |
| 2 (S1) | SPDT common source 1 | First switch source terminal; bidirectional conduction path when SW1 is active |
| 3 (D) | SPDT drain (common output) | Shared output node; connects to S1 or S2 depending on IN state |
| 4 (S2) | SPDT common source 2 | Second switch source terminal; conducts only when IN = high |
| 5 (V−) | Negative supply rail | Bias reference for analog channel; must be ≤ –0.3 V below GND for proper operation |
| 6 (GND) | Analog/digital ground | Common return for V−, VL, and substrate; requires low-impedance PCB connection |
| 7 (V+) | Positive supply rail | Bias reference for analog channel; must be ≥ 0.3 V above VL for correct switching |
| 8 (VL) | Logic supply voltage | Separate 5 V rail for TTL/CMOS-compatible input stage; decoupling mandatory |
Key Features
| Feature | Design Value |
|---|---|
| Guaranteed break-before-make | 16 ns minimum delay prevents momentary shorting between S1 and S2 - eliminates signal corruption in critical routing |
| Bidirectional analog conduction | Identical RDS(on) and leakage in both directions - enables flexible signal path design without polarity constraints |
| Low charge injection (38 pC) | Minimizes hold-step error in precision sample-and-hold amplifiers using 10 nF capacitors |
| HVSG process technology | Enables ±20 V absolute max ratings and latchup immunity - suitable for rugged industrial/military environments |
| SOIC-8 and MSOP-8 options | Same pinout across packages - allows direct footprint upgrade from SOIC to space-constrained MSOP without redesign |
Applications
| Precision Sample-and-Hold Circuits | Military Radio Front-End Switching |
|---|---|
Use Scenario: Multiplexing analog sensor outputs into a high-resolution ADC with sub-LSB settling requirements. IC Role / Device Role / Timing Role: SPDT switch selects between calibration reference and active sensor channel while maintaining DC accuracy and minimizing transient injection. Use Value: 38 pC charge injection and ±0.75 nA off-leakage preserve 16-bit+ effective resolution over temperature and time. |
Use Scenario: RF front-end signal routing between antenna diversity paths and low-noise amplifier inputs in tactical radios. IC Role / Device Role / Timing Role: High-isolation analog switch isolates receive paths during transmit bursts to prevent LNA damage and desensitization. Use Value: –82 dB off-isolation at 1 MHz and ±15 V signal range support wideband IF switching without distortion or crosstalk. |
| Hard Disk Drive Head Positioning | Guidance & Control System Signal Conditioning |
Use Scenario: Selecting between servo position feedback signals and actuator drive monitoring in closed-loop HDD voice coil motor control. IC Role / Device Role / Timing Role: Low-RDS(on) SPDT switch routes differential position error signals with minimal gain drift and offset shift. Use Value: 15 Ω on-resistance and <1 ppm/°C thermal drift ensure consistent loop gain across –40 °C to +85 °C operating envelope. |
Use Scenario: Routing inertial measurement unit (IMU) analog outputs to redundant signal processing channels in flight control units. IC Role / Device Role / Timing Role: Fault-tolerant analog switch enables hot-swappable channel selection with guaranteed break-before-make behavior. Use Value: Electrically guaranteed tD ≥16 ns prevents momentary shorting during reconfiguration - critical for safety-critical redundancy management. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar SPDT analog switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX4619ESE+ | Higher RDS(on) (25 Ω typ), no guaranteed break-before-make, 12 V max supply | Limited to single-supply ≤12 V systems; unsuitable for ±15 V precision instrumentation | Select only if operating voltage ≤12 V and BbM timing not required |
| ADG1419BRMZ | Lower leakage (±0.1 nA), higher cost, same SOIC-8 pinout, 33 Ω RDS(on) | Better DC accuracy but higher on-resistance degrades AC performance in wideband paths | Prefer for ultra-low-leakage integrator applications where speed is secondary |
Compared with DG419BDY-E3, MAX4619ESE+ trades guaranteed break-before-make and ±15 V capability for lower cost in 12 V systems, while ADG1419BRMZ improves leakage by 7× but increases RDS(on) by >2× - making DG419BDY-E3 optimal for balanced high-voltage, high-speed, and reliability-critical routing.
Availability
DG419BDY-E3 is available at Aetrix Electronics and suitable for precision test equipment, battery-powered instrumentation, and military radio systems requiring stable component supply with long-term manufacturability and RoHS compliance.
Supply support for DG419BDY-E3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay Siliconix is a global leader in discrete semiconductors and passive components, specializing in high-reliability analog interface devices for demanding industrial, military, and aerospace applications.
The DG419B series belongs to Vishay's precision analog switch product line, engineered specifically for high-voltage, low-leakage, and guaranteed timing performance in mission-critical signal routing applications.
FAQ
What is the guaranteed break-before-make timing specification for DG419BDY-E3?
The DG419BDY-E3 guarantees a minimum break-before-make delay (tD) of 16 ns under standard test conditions (RL = 300 Ω, CL = 35 pF, VS1 = VS2 = ±10 V). This parameter is production-tested and specified across the full –40 °C to +85 °C temperature range, ensuring reliable channel isolation during switching transitions in the DG419BDY-E3.
Can DG419BDY-E3 operate with a single 12 V supply?
Yes, DG419BDY-E3 supports single-supply operation at V+ = 12 V and V− = 0 V, delivering an analog signal range of 0 V to 12 V and RDS(on) ≤35 Ω. However, its full ±15 V capability and lowest leakage performance require dual ±15 V supplies - the DG419BDY-E3 maintains guaranteed break-before-make and 38 pC charge injection in both configurations.
What is the maximum allowable logic supply voltage (VL) for DG419BDY-E3?
The DG419BDY-E3 specifies VL = (GND – 0.3 V) to (V+) + 0.3 V. For standard operation with V+ = 15 V and GND = 0 V, VL may range from –0.3 V to +15.3 V. However, the device is characterized and optimized for VL = 5 V TTL/CMOS compatibility; exceeding 5.5 V may increase input current and reduce noise margin without functional benefit in the DG419BDY-E3.
Does DG419BDY-E3 require external protection diodes on analog pins?
No. The DG419BDY-E3 integrates internal clamp diodes on all analog pins (S1, S2, D), limiting forward current to 30 mA. Signals exceeding V+ or V− will be clamped - but external series resistance must limit diode current to ≤30 mA continuous or 100 mA pulsed (1 ms, 10% duty cycle) per the DG419BDY-E3 absolute maximum ratings.
Is the SOIC-8 footprint of DG419BDY-E3 compatible with MSOP-8 variants in the same family?
Yes - DG419BDY-E3 (SOIC-8) and DG419BDQ-T1-E3 (MSOP-8) share identical pin numbering and function mapping. Though physical dimensions differ (SOIC: 4.9 × 3.9 mm; MSOP: 3.0 × 3.0 mm), layout migration requires only pad geometry adjustment; no netlist or schematic change is needed when upgrading to the smaller MSOP package in the DG419BDY-E3 family.
DG419BDY-E3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay Siliconix
- Series:
- -
- Packaging:
- Tube
- Product Status:
- Active
- Switch Circuit:
- SPDT
- Multiplexer/Demultiplexer Circuit:
- 2:1
- Number of Circuits:
- 1
- On-State Resistance (Max):
- 25Ohm
- Channel-to-Channel Matching (ΔRon):
- -
- Voltage - Supply, Single (V+):
- 13V ~ 36V
- Voltage - Supply, Dual (V±):
- ±7V ~ 22V
- Switch Time (Ton, Toff) (Max):
- 89ns, 80ns
- -3db Bandwidth:
- -
- Charge Injection:
- 38pC
- Channel Capacitance (CS(off), CD(off)):
- 12pF, 12pF
- Current - Leakage (IS(off)) (Max):
- 250pA
- Crosstalk:
- -88dB @ 1MHz
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
DG419BDY-E3 FAQ
1.How can I place an order for DG419BDY-E3 through Aetrix?
Please submit a Request for Quotation (RFQ) for DG419BDY-E3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DG419BDY-E3 reliable?
The price and inventory of DG419BDY-E3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DG419BDY-E3 is usually 5 days.
3.What payment methods are accepted for DG419BDY-E3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DG419BDY-E3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DG419BDY-E3?
DG419BDY-E3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DG419BDY-E3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DG419BDY-E3?
For technical support, including DG419BDY-E3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DG419BDY-E3 requirements.
6.How does Aetrix verify that DG419BDY-E3 is sourced from the original manufacturer or authorized distributors?
All DG419BDY-E3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DG419BDY-E3 meets industry standards.
7.What is the process for return or replacement of DG419BDY-E3?
All DG419BDY-E3 units undergo pre-shipment inspection (PSI). If there is an issue with DG419BDY-E3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DG419BDY-E3 part is unused and in its original packaging.
Return procedure for DG419BDY-E3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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