Analog Devices Inc./Maxim Integrated DG423DY+
- Part No.:
- DG423DY+
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Package:
- 16-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
DG423DY+.pdf
- Description:
- IC SWITCH SPST-NOX2 35OHM 16SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:2,837
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Product details
Overview
DG423DY+ from Maxim Integrated is a dual single-pole/double-throw (SPDT) CMOS analog switch with latchable TTL/CMOS-compatible logic inputs, rail-to-rail signal handling (±15V), 35Ω max on-resistance, 175ns turn-on time, and 145ns turn-off time - used in precision audio routing and battery-powered test equipment where low charge injection (15pC max) and low off-leakage (<5nA at +85°C) are critical.
For engineers reviewing the DG423DY+ datasheet, DG423DY+ pinout, DG423DY+ application, or DG423DY+ equivalent, key selection considerations include bipolar/supply voltage flexibility (±4.5V to ±20V), guaranteed on-resistance matching (3Ω max), latch timing (tWW = 200ns), break-before-make interval (10ns min), and SO-16 package compatibility with automated assembly.
Technical Context
The DG423DY+ integrates two independent SPDT switches with separate write (WR) and reset (RS) control latches, enabling microprocessor interfacing without external glue logic. Each switch features matched n- and p-channel MOSFETs for symmetrical conduction and rail-to-rail analog signal switching across V− to V+.
Its latch architecture supports transparent mode (WR = 1, RS = X) and stored-control mode (WR = 0, RS = 1), with guaranteed break-before-make timing (10ns min) preventing momentary shorting during state transitions - essential for high-fidelity signal path integrity in communication systems.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| On-resistance (rDS(ON)) | 35Ω max - ensures minimal signal attenuation and gain error in precision instrumentation paths |
| On-resistance match | 3Ω max - enables accurate channel-to-channel signal balancing in differential or multiplexed systems |
| Charge injection | 15pC max - reduces sampling glitches in sample-and-hold and data acquisition circuits |
| Off-leakage current | <5nA at +85°C - preserves DC accuracy in high-impedance sensor interfaces |
| Switching time (tON/tOFF) | 175ns / 145ns - supports >2MHz multiplexing rates in real-time test equipment |
| Analog signal range | V− to V+ - allows full-rail operation with ±15V supplies or +12V single supply |
| Logic supply (VL) | +5V required - maintains TTL compatibility while isolating logic from analog supply domains |
Pinout & Package
Package: 16-pin SOIC (Small Outline Integrated Circuit), 3.9mm width, RoHS-compliant, surface-mount compatible.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 8 | D1, D2 | Drain terminals - bidirectional analog outputs connected to load side of SPDT switches |
| 2 | WR | Write select input - latches IN1/IN2 states when low; transparent when high |
| 3, 4, 5, 6 | N.C. | No internal connection - unused pins; must be left floating or grounded per layout best practice |
| 7 | RS | Reset select input - forces all switches to OFF state (IN = 0) when low |
| 9, 16 | S1, S2 | Source terminals - bidirectional analog inputs connected to signal source side of SPDT switches |
| 10, 15 | IN1, IN2 | Latched control inputs - define NO/NC state of respective SPDT switch pair |
| 11 | V+ | Positive analog supply - sets upper rail of analog signal range; up to +20V |
| 12 | VL | Logic supply - must be +5V for TTL compatibility; decoupling required near pin |
| 13 | GND | Ground reference - common return for logic and analog sections; star grounding recommended |
| 14 | V− | Negative analog supply - sets lower rail of analog signal range; down to −20V |
Key Features
| Feature | Design Value |
|---|---|
| Latchable digital interface | Eliminates need for external address latches when interfacing with 8-bit microcontrollers |
| Rail-to-rail signal handling | Supports full-swing analog signals from V− to V+ without clipping or distortion |
| Guaranteed break-before-make | 10ns minimum interval prevents short-circuit transients during SPDT state changes |
| Low power consumption | 35µW max total supply current enables use in portable medical and handheld test gear |
| ESD tolerance | 2000V min per Method 3015.7 - enhances robustness in manufacturing and field environments |
Applications
| Audio Signal Routing | Test Equipment Multiplexing |
|---|---|
Use Scenario: Selecting between multiple microphone preamp outputs in a digital mixer with analog summing bus. IC Role / Device Role / Timing Role: Dual SPDT switch routing analog audio paths under microcontroller latch control with glitch-free transitions. Use Value: 15pC charge injection and 35Ω rDS(ON) preserve signal fidelity and channel balance across 20Hz–20kHz bandwidth. | Use Scenario: Scanning 16 sensor channels into a single ADC in automated calibration hardware. IC Role / Device Role / Timing Role: Precision analog multiplexer with break-before-make timing ensuring no cross-channel shorts during scan. Use Value: 3Ω max rDS(ON) matching and <5nA off-leakage maintain measurement accuracy across temperature. |
| Modem Line Interface | Battery-Operated Data Logger |
Use Scenario: Switching between line driver/receiver paths and diagnostic loopback in PSTN modem design. IC Role / Device Role / Timing Role: Bidirectional SPDT switch managing analog telephony signals with ±12V compliance. Use Value: Rail-to-rail operation and 175ns tON support full-duplex signaling without latency-induced echo artifacts. | Use Scenario: Isolating sensor front-end circuitry during sleep mode in a solar-powered environmental monitor. IC Role / Device Role / Timing Role: Low-power analog gate enabling zero-current standby via WR/RS-controlled latching. Use Value: 35µW max supply power extends battery life while maintaining fast wake-up response (145ns tOFF). |
Equivalent & Alternatives
The following parts are listed as comparable options for similar analog switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADG423BRZ | Higher on-resistance (45Ω typ), no latch function, requires external control logic | Best suited for non-microprocessor systems or where latch timing is not required | Select when simpler control interface suffices and 10ns break-before-make is not mandatory |
| TS5A23157DCUR | Lower voltage rating (5.5V max), no bipolar supply support, 0.9Ω rDS(ON) but limited to single-supply use | Ideal for low-voltage portable electronics, not suitable for ±15V industrial signal chains | Choose only for 3.3V/5V systems requiring ultra-low on-resistance; incompatible with DG423DY+ supply architecture |
Compared with ADG423BRZ and TS5A23157DCUR, the DG423DY+ uniquely combines latch control, ±20V bipolar operation, and guaranteed break-before-make - making it irreplaceable in microprocessor-driven, wide-supply-range analog routing where timing integrity and supply flexibility are non-negotiable.
Availability
DG423DY+ is available at Aetrix Electronics and suitable for audio signal routing, test equipment multiplexing, modem line interface, and battery-operated data loggers requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.
Supply support for DG423DY+ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) designs precision analog, mixed-signal, and power management ICs for industrial, communications, and computing applications.
The DG423DY+ belongs to the DG42x family of latch-equipped CMOS analog switches engineered for microprocessor-compatible signal routing in harsh supply environments - emphasizing rail-to-rail performance, low leakage, and latch-based noise immunity.
FAQ
What supply voltages does the DG423DY+ support?
The DG423DY+ operates from bipolar supplies of ±4.5V to ±20V or a single +10V to +30V supply. Its analog signal range extends fully from V− to V+, enabling rail-to-rail switching. The logic supply VL must be +5V for TTL compatibility. Exceeding ±20V or +30V violates absolute maximum ratings and risks permanent damage.
Does the DG423DY+ require external pull-up resistors on WR, RS, or IN pins?
No, the DG423DY+ has internal input structure that accepts standard TTL/CMOS logic levels without external pull-ups. WR, RS, and IN pins are CMOS-compatible with VIH ≥ 2.4V and VIL ≤ 0.8V. However, floating inputs are undefined; unused control lines should be tied to VL or GND to prevent erratic switching.
How is break-before-make timing enforced in the DG423DY+?
The DG423DY+ guarantees a minimum 10ns break-before-make interval (tD) between opening one switch path and closing the alternate path within each SPDT section. This is achieved through internal timing control of the latch and driver stages - no external components are needed. The specification is tested and guaranteed over temperature (−40°C to +85°C) and supply voltage.
Can the DG423DY+ be used with a single +12V supply and ground reference?
Yes - configure V+ = +12V, V− = GND, and VL = +5V. The analog signal range becomes 0V to +12V. Note that rDS(ON) increases slightly versus bipolar operation, and on-resistance matching (3Ω max) is specified only for bipolar conditions per datasheet Note 4. For single-supply use, verify rDS(ON) flatness meets system requirements.
What is the thermal resistance (θJA) of the DG423DY+ in its SO-16 package?
The DG423DY+ in 16-pin SOIC has a junction-to-ambient thermal resistance (θJA) of 110°C/W, derived from its 842mW maximum power dissipation at TA = +70°C and 10.53mW/°C derating above that temperature. Layout with adequate copper pour on V+ and V− pads significantly improves thermal performance in continuous operation.
DG423DY+ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Packaging:
- Tube
- Product Status:
- Obsolete
- Switch Circuit:
- SPST - NO
- Multiplexer/Demultiplexer Circuit:
- 1:1
- Number of Circuits:
- 2
- On-State Resistance (Max):
- 35Ohm
- Channel-to-Channel Matching (ΔRon):
- 3Ohm (Max)
- Voltage - Supply, Single (V+):
- 10V ~ 30V
- Voltage - Supply, Dual (V±):
- ±4.5V ~ 20V
- Switch Time (Ton, Toff) (Max):
- 250ns, 200ns
- -3db Bandwidth:
- -
- Charge Injection:
- 10pC
- Channel Capacitance (CS(off), CD(off)):
- 12pF, 12pF
- Current - Leakage (IS(off)) (Max):
- 500pA
- Crosstalk:
- -90dB @ 1MHz
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
DG423DY+ FAQ
1.How can I place an order for DG423DY+ through Aetrix?
Please submit a Request for Quotation (RFQ) for DG423DY+ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DG423DY+ reliable?
The price and inventory of DG423DY+ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DG423DY+ is usually 5 days.
3.What payment methods are accepted for DG423DY+?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DG423DY+ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DG423DY+?
DG423DY+ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DG423DY+ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DG423DY+?
For technical support, including DG423DY+ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DG423DY+ requirements.
6.How does Aetrix verify that DG423DY+ is sourced from the original manufacturer or authorized distributors?
All DG423DY+ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DG423DY+ meets industry standards.
7.What is the process for return or replacement of DG423DY+?
All DG423DY+ units undergo pre-shipment inspection (PSI). If there is an issue with DG423DY+, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DG423DY+ part is unused and in its original packaging.
Return procedure for DG423DY+:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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