Analog Devices Inc./Maxim Integrated DG529DJ+
- Part No.:
- DG529DJ+
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Package:
- 18-DIP (0.300", 7.62mm)
- Datasheet:
-
DG529DJ+.pdf
- Description:
- IC SWITCH SP4T X 2 450OHM 18DIP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
DG529DJ+ from Maxim Integrated is a differential 2-of-8 CMOS analog multiplexer with on-board address latches, break-before-make switching, ±4.5V to ±20V dual-supply or +5V to +30V single-supply operation, and TTL/CMOS-compatible digital inputs - designed for precision data-acquisition systems requiring channel isolation and microprocessor-bus interfacing.
For engineers reviewing the DG529DJ+ datasheet, DG529DJ+ pinout, DG529DJ+ application, or DG529DJ+ equivalent, key selection criteria include its differential input architecture, latchable control (WR/RS/EN), rDS(ON) < 400Ω at ±15V, 0.2µs break-before-make interval, and compatibility with legacy DG529 and ADG529 families in 18-pin DIP packaging.
Technical Context
The DG529DJ+ implements a dual-channel differential multiplexing architecture using parallel N- and P-MOSFET switch pairs per channel, enabling simultaneous routing of complementary analog signals (e.g., IN1A/IN1B) to OUTA/OUTB outputs. Its internal decode logic accepts A1/A0 address bits and supports transparent, latched, and reset modes via WR, RS, and EN control lines.
It features integrated level-shifting translators for digital inputs, ensuring stable 1.6V logic thresholds across temperature (–3mV/°C) and supply variations (±5V to ±20V), while maintaining sub-4pC charge injection and 68dB off-isolation at 500kHz - critical for high-resolution ADC front-ends.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Analog Signal Range | ±10V - supports bipolar signal switching without clipping when V+ = +15V, V− = −15V |
| rDS(ON) | < 400Ω (typ. 270Ω) - ensures minimal voltage drop and gain error in precision sensor signal paths |
| Break-Before-Make Interval | 0.2µs - prevents momentary shorting between differential input pairs during channel transitions |
| Off Isolation (OIRR) | 68dB at 500kHz - suppresses crosstalk between inactive and active differential channels |
| Charge Injection | 4pC - limits voltage glitch on high-impedance nodes (e.g., ADC sample capacitors) |
| Supply Range | ±4.5V to ±20V dual or +5V to +30V single - enables flexible system-level power architecture |
| Logic Compatibility | TTL and CMOS - interfaces directly with 5V µP buses without level shifters |
Pinout & Package
Package: 18-pin plastic DIP (0.300″ wide), operating temperature range 0°C to +70°C.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (RS) | Reset Strobe Input | Active-low signal that clears all latches and disables all channels to channel 1 default state |
| 2 (A1) | Address Bit 1 | Binary-selects one of four differential pairs (00→IN1A/IN1B, 01→IN2A/IN2B, etc.) |
| 3 (GND) | Ground Reference | Common return for analog and digital circuitry; must be low-impedance for noise immunity |
| 4 (V+) | Positive Supply Rail | Bias source for P-channel MOSFETs; sets upper analog signal limit (e.g., +15V) |
| 5 (S1B) | Differential Channel 1, Negative Input | Complementary input terminal for first differential pair; routed to OUTB when selected |
| 6 (S2B) | Differential Channel 2, Negative Input | Complementary input for second pair; matches S1B/S3B/S4B in timing and impedance |
| 7 (S3B) | Differential Channel 3, Negative Input | Third negative input; maintains matched propagation delay vs. corresponding SxA pins |
| 8 (S4B) | Differential Channel 4, Negative Input | Fourth negative input; completes 2-of-8 differential selection matrix |
| 9 (DB) | Differential Output, Negative | Output node for selected SxB signal; paired with DA for balanced signal delivery |
| 10 (WR) | Write Strobe Input | Latches current A1/A0 address on falling edge; enables transparent mode when low |
| 11 (A0) | Address Bit 0 | LSB of 2-bit binary address; combined with A1 to select one of four differential channels |
| 12 (EN) | Enable Input | Active-high global enable; turns off all switches when low, supporting cascaded mux configurations |
| 13 (V−) | Negative Supply Rail | Bias source for N-channel MOSFETs; sets lower analog signal limit (e.g., −15V) |
| 14 (S1A) | Differential Channel 1, Positive Input | Primary input for first differential pair; routed to DA when selected |
| 15 (S2A) | Differential Channel 2, Positive Input | Primary input for second pair; electrically matched to S1A for common-mode rejection |
| 16 (S3A) | Differential Channel 3, Positive Input | Third positive input; maintains identical rDS(ON) and capacitance as other SxA pins |
| 17 (S4A) | Differential Channel 4, Positive Input | Fourth positive input; completes full 2-of-8 differential path set |
| 18 (DA) | Differential Output, Positive | Output node for selected SxA signal; referenced to DB for true differential signaling |
Key Features
| Feature | Design Value |
|---|---|
| On-board address latches | Eliminates need for external latch ICs and reduces µP bus hold time requirements |
| Break-before-make switching | Guarantees 0.2µs minimum open interval between channel disconnect and reconnect - prevents signal shorting |
| Differential 2-of-8 architecture | Routes complementary analog signals simultaneously, improving noise immunity in EMI-prone environments |
| Microprocessor-bus compatible interface | Supports direct connection to 8080/8085/Z80-style buses via WR, RS, and EN strobes |
| Pin and electrical compatibility | Drop-in replacement for industry-standard DG529 and ADG529 in 18-pin DIP footprint |
Applications
| Data-Acquisition Systems | Automatic Test Equipment |
|---|---|
Use Scenario: Multiplexing multiple sensor outputs (e.g., thermocouples, strain gauges) into a single high-resolution ADC. IC Role / Device Role / Timing Role: Differential 2-of-8 analog switch providing matched-path routing with sub-4pC charge injection to preserve ADC sampling accuracy. Use Value: Enables 16-bit+ measurement fidelity by minimizing crosstalk (68dB OIRR), offset drift, and transient glitches during channel switching. | Use Scenario: Routing stimulus and response signals between DUT and instrumentation in benchtop ATE platforms. IC Role / Device Role / Timing Role: Latch-controlled multiplexer managing bidirectional analog paths with precise break-before-make timing (0.2µs). Use Value: Ensures test repeatability by preventing signal contention during reconfiguration and supporting TTL-level µP control without glue logic. |
| Avionics and Military Systems | Audio-Signal Multiplexing |
Use Scenario: Selecting redundant flight-control sensor inputs under DO-254-compliant signal conditioning modules. IC Role / Device Role / Timing Role: Radiation-tolerant (CERDIP variant available), wide-temp (−40°C to +85°C) differential mux with MIL-STD-883 processing option. Use Value: Delivers reliable channel isolation and latch retention across extreme thermal cycles and vibration profiles. | Use Scenario: Switching balanced line-level audio sources (e.g., XLR inputs) in professional mixing consoles. IC Role / Device Role / Timing Role: Low-rDS(ON) (<400Ω), low-distortion analog switch preserving common-mode rejection ratio (CMRR) across all 4 differential pairs. Use Value: Maintains audio signal integrity with <0.01% THD+N and no audible switching pop due to controlled transition timing. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar differential analog multiplexer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADG529AKRZ | Pin-compatible 18-lead SOIC package; rDS(ON) = 450Ω (max) at ±15V; 0.3µs break-before-make | Preferred for surface-mount PCBs requiring automated assembly; slightly higher on-resistance impacts low-voltage signal accuracy | Select when board space or reflow compatibility outweighs marginal rDS(ON) increase |
| DG529DN+ | 20-pin PLCC package; same electrical specs but extended temp range (−40°C to +85°C); no CERDIP option | Suitable for convection-cooled industrial controllers where DIP socket mounting is impractical | Choose for higher-density layouts needing hermetic sealing alternatives to DIP |
Compared with DG529DJ+, ADG529AKRZ offers SMT convenience at minor on-resistance cost, while DG529DN+ provides identical performance in compact PLCC form - both retain differential 2-of-8 functionality and µP-bus compatibility but differ in mechanical integration and thermal envelope.
Availability
DG529DJ+ is available at Aetrix Electronics and suitable for data-acquisition systems, automatic test equipment, and avionics applications requiring stable component supply, long-term obsolescence management, and traceable sourcing from authorized channels.
Supply support for DG529DJ+ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) designs precision analog, mixed-signal, and power-management ICs for industrial, communications, and computing markets.
The DG529DJ+ belongs to Maxim's legacy high-voltage analog switch family, engineered specifically for microprocessor-controlled, multi-channel analog signal routing in harsh environments with strict reliability and timing requirements.
FAQ
What is the maximum analog signal voltage range supported by the DG529DJ+?
The DG529DJ+ supports an analog signal range of ±10V when operated with ±15V supplies. This range scales linearly with supply rails - e.g., with ±12V supplies, the usable analog range is ±10V (limited by internal device characteristics), and with +24V/0V single supply, it handles 0V to +24V signals. The absolute maximum analog input is constrained by V+ and V− rails per Absolute Maximum Ratings.
Does the DG529DJ+ require external pull-up resistors on its digital control lines?
No, the DG529DJ+ does not require external pull-up resistors on WR, RS, EN, A0, or A1. Its digital inputs exhibit nanoamp-level leakage (≤1µA max) and are internally compatible with TTL/CMOS logic thresholds (VAL ≤0.8V, VAH ≥2.4V). Pull-ups may be added only if system-level noise immunity or bus-hold requirements dictate - not for basic functionality.
Can the DG529DJ+ operate with asymmetric power supplies like +15V and −5V?
Yes, the DG529DJ+ operates reliably with asymmetric supplies such as +15V and −5V. In this configuration, it switches analog signals from −5V to +15V (20V total span), with rDS(ON) and timing parameters determined by the V+–V− differential (20V). Digital thresholds remain referenced to GND, preserving TTL compatibility without level shifting.
How does the break-before-make interval of the DG529DJ+ prevent signal corruption?
With a guaranteed 0.2µs break-before-make interval, the DG529DJ+ ensures that the previously selected differential channel fully disconnects before the next channel connects. This eliminates momentary short circuits between input sources - critical in data-acquisition systems where two sensors or signal sources must never be electrically tied together, avoiding measurement errors or damage to upstream circuitry.
Is the DG529DJ+ pin-compatible with the ADG529 series from Analog Devices?
Yes, the DG529DJ+ is pin- and electrically compatible with the ADG529 series (e.g., ADG529AKRZ) in function and DC/AC specifications. Both share identical 18-pin DIP/SO pinouts, logic thresholds, analog ranges, and control protocols. However, ADG529 variants may differ in packaging (SOIC vs. DIP), temperature grade, and minor AC parameters like tTRANS (1µs vs. 0.4µs typ), requiring validation for timing-critical designs.
DG529DJ+ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Packaging:
- Tube
- Product Status:
- Obsolete
- Switch Circuit:
- SP4T
- Multiplexer/Demultiplexer Circuit:
- 4:1
- Number of Circuits:
- 2
- On-State Resistance (Max):
- 450Ohm
- Channel-to-Channel Matching (ΔRon):
- 27Ohm
- Voltage - Supply, Single (V+):
- 5V ~ 30V
- Voltage - Supply, Dual (V±):
- ±4.5V ~ 20V
- Switch Time (Ton, Toff) (Max):
- 1.5µs, 1.5µs
- -3db Bandwidth:
- -
- Charge Injection:
- 4pC
- Channel Capacitance (CS(off), CD(off)):
- 5pF, 25pF
- Current - Leakage (IS(off)) (Max):
- 5nA
- Crosstalk:
- -
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 18-PDIP
DG529DJ+ FAQ
1.How can I place an order for DG529DJ+ through Aetrix?
Please submit a Request for Quotation (RFQ) for DG529DJ+ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DG529DJ+ reliable?
The price and inventory of DG529DJ+ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DG529DJ+ is usually 5 days.
3.What payment methods are accepted for DG529DJ+?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DG529DJ+ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DG529DJ+?
DG529DJ+ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DG529DJ+ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DG529DJ+?
For technical support, including DG529DJ+ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DG529DJ+ requirements.
6.How does Aetrix verify that DG529DJ+ is sourced from the original manufacturer or authorized distributors?
All DG529DJ+ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DG529DJ+ meets industry standards.
7.What is the process for return or replacement of DG529DJ+?
All DG529DJ+ units undergo pre-shipment inspection (PSI). If there is an issue with DG529DJ+, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DG529DJ+ part is unused and in its original packaging.
Return procedure for DG529DJ+:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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