Vishay Siliconix DG787DQ-T1-E3
- Part No.:
- DG787DQ-T1-E3
- Manufacturer:
- Vishay Siliconix
- Package:
- 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
- Datasheet:
-
DG787DQ-T1-E3.pdf
- Description:
- IC SWITCH SPDT X 2 2.9OHM 10MSOP
- Quantity:
- Payment:

- Shipping:

Inventory:4,500
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Product details
Overview
DG787DQ-T1-E3 from Vishay Siliconix is a dual SPDT analog switch IC designed for high-fidelity audio, video, and USB signal routing in portable electronics. It operates from 1.8 V to 5.5 V, delivers 2.5 Ω on-resistance at 2.7 V, supports 300 MHz –3 dB bandwidth, and features 0.2 Ω on-resistance matching - enabling low-distortion switching in cellular phone front-end and media player audio paths.
For engineers reviewing the DG787DQ-T1-E3 datasheet, DG787DQ-T1-E3 pinout, DG787DQ-T1-E3 application, or DG787DQ-T1-E3 equivalent, key selection criteria include rail-to-rail analog swing capability, 1.6 V logic compatibility across full supply range, ESD robustness (>2 kV per MIL-STD-883), latch-up immunity (200 mA), and MSOP-10 footprint suitability for space-constrained PCB layouts.
Technical Context
The DG787DQ-T1-E3 integrates two independent SPDT switches sharing a common 10-pin MSOP package. Each channel exhibits matched RON flatness (≤1.0 Ω) and low charge injection (1 pC), ensuring minimal signal transient artifacts during switching. Its sub-micron process enables stable performance across –40 °C to +85 °C with <1 µA quiescent supply current.
Control logic is CMOS-compatible with input thresholds of 0.5 V (low) and 1.4 V (high) at 3 V supply, scaling to 0.8 V/2.0 V at 5 V. The device supports full rail analog voltage swing (0 V to V+), and internal clamping diodes protect against overvoltage on NC/NO/COM pins up to V+ + 0.3 V.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 1.8 V to 5.5 V single rail - enables direct integration with Li-ion battery-powered systems and 3.3 V/5 V logic domains. |
| On-Resistance (RON) | 2.5 Ω typical at V+ = 2.7 V, INO = 10 mA - ensures minimal insertion loss and thermal drift in audio path switching. |
| –3 dB Bandwidth | 300 MHz - supports high-speed USB 1.1/2.0 data lines and composite video signals without attenuation. |
| On-Resistance Matching | 0.25 Ω max between channels - critical for balanced differential signal routing and stereo audio channel tracking. |
| Charge Injection | 1 pC - limits voltage glitch on sampled nodes, preserving integrity in ADC multiplexing and sensor interface applications. |
| Off-Isolation | –74 dB at 1 MHz - suppresses crosstalk between active and inactive signal paths in multi-source audio/video hubs. |
| ESD Rating | >2 kV per MIL-STD-883 Method 3015.7 - provides robust handling margin during board assembly and end-user operation. |
Pinout & Package
Package: MSOP-10 (JEDEC MO-187, variation AA/BA), 3.0 mm × 4.9 mm footprint, 0.5 mm pitch, exposed pad optional, matte tin terminations (Pb-free, "-E3" suffix).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (NO1) | Normally Open 1 | Analog output path closed when IN1 = logic high; connects to COM1 in ON state. |
| 2 (COM1) | Common 1 | Primary analog I/O node for Channel 1; supports bidirectional rail-to-rail signal flow (0 V to V+). |
| 3 (IN1) | Control Input 1 | CMOS digital input controlling Channel 1; 1.4 V threshold at 3 V supply, compatible with 1.8 V logic. |
| 4 (NC1) | Normally Closed 1 | Analog output path closed when IN1 = logic low; disconnects from COM1 when IN1 = high. |
| 5 (NO2) | Normally Open 2 | Independent analog output for Channel 2; functionally identical to NO1 but isolated from Channel 1. |
| 6 (GND) | Ground Reference | System ground return for analog and digital circuitry; must be low-impedance for noise control. |
| 7 (NC2) | Normally Closed 2 | Channel 2 normally closed path; complements NO2 and COM2 under inverse logic control. |
| 8 (IN2) | Control Input 2 | Independent digital control for Channel 2; electrically isolated from IN1, supports asynchronous switching. |
| 9 (COM2) | Common 2 | Second analog I/O node; fully independent from COM1 - enables dual-path signal routing without coupling. |
| 10 (V+) | Positive Supply | Single power rail input (1.8–5.5 V); powers both analog switch core and level-shifted control logic. |
Key Features
| Feature | Design Value |
|---|---|
| Rail-to-rail analog signal handling | Supports 0 V to V+ voltage swing on all analog terminals - preserves dynamic range in audio DAC outputs and sensor interfaces. |
| Low on-resistance flatness | ≤1.0 Ω variation across VCOM = 1 V to 3.5 V - maintains consistent gain and THD across full signal amplitude range. |
| Break-before-make timing | 1 ns typical - prevents momentary short-circuit between NC and NO paths during state transition. |
| Ultra-low leakage current | ±20 nA max off-state leakage at 85 °C - avoids DC offset accumulation in high-impedance sensor multiplexers. |
| Logic-level flexibility | 1.6 V logic compatible across entire 1.8–5.5 V supply range - eliminates need for external level shifters with 1.8 V microcontrollers. |
Applications
| Cellular Phone Audio Routing | USB 2.0 Data Line Switching |
|---|---|
|
Use Scenario: Selecting between earpiece, speaker, and headset microphone paths in smartphone baseband subsystems. IC Role / Device Role / Timing Role: Dual SPDT analog switch providing bidirectional, low-distortion signal path selection under baseband processor GPIO control. Use Value: 2.5 Ω RON and 0.2 Ω matching preserve SNR >95 dB and minimize crosstalk between voice uplink/downlink channels. |
Use Scenario: Multiplexing USB D+/D– lines between host controller and multiple peripheral ports in OTG-capable handheld devices. IC Role / Device Role / Timing Role: High-bandwidth analog switch enabling USB 1.1/2.0 signal integrity with <50 ns tON/tOFF and –74 dB off-isolation. Use Value: 300 MHz –3 dB bandwidth and 12 pF off-capacitance meet USB 2.0 eye diagram mask requirements without added termination. |
| Portable Media Player Audio Mux | Hard Disk Drive Interface Isolation |
|
Use Scenario: Routing stereo DAC outputs to headphone jack, line-out, or internal speaker amplifier in MP3 players. IC Role / Device Role / Timing Role: Low-noise analog switch managing multiple audio destinations while maintaining channel balance and THD+N <0.005 %. Use Value: 1 pC charge injection and full rail swing prevent audible pop/click artifacts during playback mode transitions. |
Use Scenario: Isolating IDE/ATA control signals during hot-swap events or power sequencing in laptop HDD bays. IC Role / Device Role / Timing Role: Fail-safe analog switch decoupling sensitive drive interface lines from system power domain during reset or sleep states. Use Value: ±100 mA continuous current rating and 200 mA latch-up immunity ensure reliability under transient fault conditions. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual SPDT analog switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX4687ETE+ | Higher RON (3.5 Ω typ at 3 V), lower bandwidth (200 MHz), same MSOP-10 package. | Less suitable for USB 2.0 due to bandwidth limitation; acceptable for audio-only routing where cost sensitivity outweighs performance. | Select MAX4687ETE+ only if system bandwidth requirement ≤200 MHz and supply voltage is fixed at 3.3 V. |
| ADG787BRMZ | Identical RON (2.5 Ω), same 300 MHz bandwidth, but requires separate VLOGIC pin and has higher supply current (2 µA vs. 1 µA). | Better logic-level independence but adds layout complexity; not drop-in due to different pinout (VLOGIC replaces GND on Pin 6). | Choose ADG787BRMZ only when independent logic supply is available and ultra-low quiescent current is not critical. |
Compared with MAX4687ETE+ and ADG787BRMZ, the DG787DQ-T1-E3 offers optimal balance of bandwidth, on-resistance, and single-supply simplicity - making it preferred for space-constrained, battery-powered designs requiring simultaneous audio and data switching without auxiliary supplies or performance trade-offs.
Availability
DG787DQ-T1-E3 is available at Aetrix Electronics and suitable for cellular phones, portable media players, USB peripheral hubs, and hard disk drive interface modules requiring stable component supply, Pb-free compliance, and long-term industrial availability.
Supply support for DG787DQ-T1-E3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay Siliconix is a global semiconductor manufacturer specializing in discrete MOSFETs, diodes, optoelectronics, and precision analog switches - known for high-reliability, high-performance components in consumer and industrial markets.
The DG787 series was developed specifically for portable multimedia applications demanding low RON, high bandwidth, and single-supply operation - targeting design-in in smartphones, tablets, and portable storage devices.
FAQ
What is the maximum analog signal voltage range supported by DG787DQ-T1-E3?
The DG787DQ-T1-E3 supports full rail-to-rail analog signal swing from 0 V to V+, where V+ ranges from 1.8 V to 5.5 V. Signals exceeding V+ + 0.3 V on NC, NO, or COM pins are clamped by internal diodes; forward diode current must be limited to rated maximums per datasheet absolute maximum ratings.
Does DG787DQ-T1-E3 require separate logic and analog supplies?
No, DG787DQ-T1-E3 uses a single supply (V+) for both analog switching and digital control logic. Its inputs are 1.6 V logic compatible across the full 1.8–5.5 V supply range, eliminating need for external level shifters - a key advantage over alternatives like ADG787BRMZ that require dedicated VLOGIC.
What is the thermal performance of DG787DQ-T1-E3 in MSOP-10 package?
In MSOP-10 package, DG787DQ-T1-E3 has a power dissipation limit of 320 mW at TA = 70 °C, with derating of 4.0 mW/°C above that temperature. Junction-to-ambient thermal resistance (θJA) is approximately 312.5 °C/W, verified per JEDEC J-STD-020 reflow profile compliance.
How does DG787DQ-T1-E3 handle ESD and latch-up events?
DG787DQ-T1-E3 is rated for >2 kV ESD per MIL-STD-883 Method 3015.7 and withstands 200 mA latch-up current per JESD 78. These specifications are guaranteed by design and validated during qualification testing - confirming robustness in handheld device environments subject to frequent human handling.
Can DG787DQ-T1-E3 be used in USB 2.0 applications?
Yes, DG787DQ-T1-E3 supports USB 2.0 signaling with its 300 MHz –3 dB bandwidth, 12 pF off-capacitance, –74 dB off-isolation at 1 MHz, and <52 ns turn-on time. Measured insertion loss and crosstalk meet USB 2.0 eye diagram requirements when used with proper 90 Ω differential PCB routing and termination.
DG787DQ-T1-E3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay Siliconix
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Switch Circuit:
- SPDT
- Multiplexer/Demultiplexer Circuit:
- 2:1
- Number of Circuits:
- 2
- On-State Resistance (Max):
- 2.9Ohm
- Channel-to-Channel Matching (ΔRon):
- 250mOhm (Max)
- Voltage - Supply, Single (V+):
- 1.8V ~ 5.5V
- Voltage - Supply, Dual (V±):
- -
- Switch Time (Ton, Toff) (Max):
- 45ns, 42ns
- -3db Bandwidth:
- 300MHz
- Charge Injection:
- 1pC
- Channel Capacitance (CS(off), CD(off)):
- 12pF
- Current - Leakage (IS(off)) (Max):
- 1nA
- Crosstalk:
- -56dB @ 10MHz
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-MSOP
DG787DQ-T1-E3 FAQ
1.How can I place an order for DG787DQ-T1-E3 through Aetrix?
Please submit a Request for Quotation (RFQ) for DG787DQ-T1-E3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DG787DQ-T1-E3 reliable?
The price and inventory of DG787DQ-T1-E3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DG787DQ-T1-E3 is usually 5 days.
3.What payment methods are accepted for DG787DQ-T1-E3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DG787DQ-T1-E3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DG787DQ-T1-E3?
DG787DQ-T1-E3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DG787DQ-T1-E3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DG787DQ-T1-E3?
For technical support, including DG787DQ-T1-E3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DG787DQ-T1-E3 requirements.
6.How does Aetrix verify that DG787DQ-T1-E3 is sourced from the original manufacturer or authorized distributors?
All DG787DQ-T1-E3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DG787DQ-T1-E3 meets industry standards.
7.What is the process for return or replacement of DG787DQ-T1-E3?
All DG787DQ-T1-E3 units undergo pre-shipment inspection (PSI). If there is an issue with DG787DQ-T1-E3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DG787DQ-T1-E3 part is unused and in its original packaging.
Return procedure for DG787DQ-T1-E3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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