Diodes Incorporated DML22990LWG-7

Overview

DML22990LWG from Diodes Incorporated is a single-channel N-channel smart load switch with 3.9mΩ on-resistance, 10A continuous current rating, adjustable slew-rate control via external CT capacitor, integrated power-good (PG) indicator, and 200Ω output discharge resistor. It operates across 0.6V–5.5V input voltage and 2.5V–5.5V bias voltage, enabling precise power sequencing in high-density computing and storage systems.

For engineers reviewing the DML22990LWG datasheet, DML22990LWG pinout, DML22990LWG application, or DML22990LWG equivalent, key selection criteria include controlled inrush current management, PG-driven system-level power sequencing, low quiescent current (85µA typ), and compatibility with sub-1V logic rails in SSDs and industrial PCs.

Technical Context

The DML22990LWG integrates a charge-pump gate driver to fully enhance its internal N-channel MOSFET across 0.6V–5.5V VIN while maintaining stable R_ON of 3.9mΩ at VBIAS = 3.3V/5V. Its ON pin accepts active-high logic with 60mV hysteresis for noise immunity, and PG provides open-drain status signaling after output voltage reaches 90% of final value.

Slew rate is externally tuned via CT capacitor (0–10nF), directly modulating t_R (10–325µs) and t_{PG_ON} (162–569µs) based on VIN and CT values per documented equations. The device supports dual-power sequencing (VBIAS→VIN→ON or VIN→VBIAS→ON) and includes an embedded 200Ω pulldown for rapid output discharge during disable.

Key Specifications

Pinout & Package

Package: V-DFN3020-10 (Type C), 3.0mm × 2.0mm × 0.8mm, exposed thermal pad (EPAD), RoHS-compliant NiPdAu-plated terminals.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar smart load switch applications.

Compared with TPS22975DSGR and RT9742AGQW, the DML22990LWG delivers higher current capacity (10A vs. 4A/6A), true programmable slew control, and integrated PG + discharge-reducing BOM count and enabling tighter power-up timing control in multi-rail systems.

Availability

DML22990LWG is available at Aetrix Electronics and suitable for SSD power rail control, industrial PC core voltage sequencing, notebook subsystem isolation, and telecom gateway power management requiring stable component supply, long-term lifecycle support, and traceable sourcing.

Supply support for DML22990LWG includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Diodes Incorporated is a global manufacturer of discrete semiconductors and analog ICs, specializing in high-efficiency power management, signal integrity, and protection solutions for computing, industrial, and communications markets.

The DML22990LWG belongs to Diodes' Smart Load Switch family, engineered specifically for high-current, low-voltage power domain control in space-constrained client and infrastructure equipment where precision sequencing and inrush mitigation are critical.

FAQ

What is the minimum input voltage supported by the DML22990LWG?

The DML22990LWG supports VIN as low as 0.6V while maintaining full functionality, including 3.9mΩ R_ON, PG assertion, and controlled turn-on. This enables direct switching of modern ultra-low-voltage domains such as 0.8V FPGA I/O banks and 1.05V CPU cores without level-shifting circuitry.

How does the CT capacitor affect power-good timing?

The CT capacitor linearly increases both output rise time (t_R) and PG turn-on time (t_{PG_ON}): for example, at VIN = 5V and VBIAS = 5V, adding 1nF raises t_R from 37.5µs to 66.4µs and t_{PG_ON} from 187.6µs to 223.8µs. This correlation is defined by published equations and verified in Table 1 and Table 2 of DS45068 Rev. 2–2.

Can the PG pin drive a microcontroller GPIO directly?

Yes-the PG pin is an active-high open-drain output rated for 1mA sink current. When pulled up to a compatible logic rail (e.g., 3.3V with ≥1kΩ resistor), it delivers clean 0V/3.3V transitions synchronized to output voltage stabilization, making it suitable for direct connection to MCU interrupt or status GPIO pins without buffering.

Is the exposed pad (EPAD) electrically connected to VIN or GND?

The EPAD is internally connected to the VIN terminal and must be soldered to a PCB copper pour tied to the VIN net-not GND-to ensure optimal thermal dissipation (R_{θJC_bot} = 3.7°C/W) and low-inductance current return path. Thermal vias to inner-layer VIN planes are strongly recommended per Diodes' layout guidelines.