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Texas Instruments DP83902AV/NOPB
- Part No.:
- DP83902AV/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- Controllers
- Package:
- 84-LCC (J-Lead)
- Datasheet:
-
DP83902AV/NOPB.pdf
- Description:
- IC CTRLR SER NETWORK IN 84PLCC
- Quantity:
- Payment:
- Shipping:
Inventory:2,690
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Product details
Overview
DP83902AV/NOPB from Texas Instruments (formerly National Semiconductor) is a single-chip IEEE 802.3-compliant Serial Network Interface Controller (ST-NIC) integrating MAC, ENDEC, and 10BASE-T transceiver functions for twisted-pair Ethernet. It operates at 10 Mbit/s, supports Manchester encoding/decoding with ≤18 ns jitter tolerance, provides dual 16-bit DMA channels, and features full AUI interface compatibility for multi-media flexibility in embedded LAN nodes.
For engineers reviewing the DP83902AV/NOPB datasheet, DP83902AV/NOPB pinout, DP83902AV/NOPB application, or DP83902AV/NOPB equivalent, key selection considerations include its integrated 10BASE-T PHY compliance, programmable FIFO threshold, collision detection with heartbeat/SQE signaling, smart squelch with SQSEL-selectable thresholds, and support for both half-step and full-step transmit idle states via SEL pin configuration.
Technical Context
The DP83902AV/NOPB implements a complete CSMA/CD media access controller with hardware-accelerated packet handling: its Receive Deserializer detects SFD to align byte boundaries, CRC generator/checker computes and validates 32-bit FCS fields, and Address Recognition Logic performs physical/multicast/broadcast filtering using preloaded address registers and hash-based multicast bit array lookup.
Its ENDEC module uses a phase-locked loop decoder for clock recovery from Manchester-encoded signals, while the TPI module integrates link integrity monitoring (16 ms link pulses), jabber protection (26 ms transmit timeout), polarity correction (POL output latches on 7 consecutive reversed pulses), and digital pre-emphasis via resistively combined TXOa/TXOdb and TXOb/TXOda outputs to compensate for twisted-pair ISI.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Data Rate | 10 Mbit/s - Fixed rate for IEEE 802.3 10BASE-T compliance; no software-configurable speed modes. |
| Encoding | Manchester - Hardware-enforced encoding/decoding with lock time of 5 bits typical; supports NRZ-to-Manchester conversion and reverse. |
| FIFO Depth | 16-byte - Internal buffer enables burst-mode DMA transfers; threshold programmable to optimize host bus utilization and avoid underrun/overrun. |
| DMA Channels | Dual 16-bit - Independent local and remote DMA paths allow concurrent packet reception and system memory write operations without CPU intervention. |
| Jitter Tolerance | ≤18 ns - Maximum allowable timing deviation in received Manchester data before decoding failure; verified per IEEE 802.3 specification. |
| Transceiver Mode | 10BASE-T + AUI - Selectable via AUI/TPI pin; TPI mode drives twisted pair directly; AUI mode interfaces to external transceivers via differential CDa/CDb, RXa/RXb, TXa/TXb. |
| Squelch Control | SQSEL-pin selectable - High threshold (10BASE-T spec) or reduced threshold (extended cable reach); no external components required. |
Pinout & Package
DP83902AV/NOPB is packaged in a 100-pin PQFP (NS package code V84A), with 48 signal pins, 40 power/ground pins (segregated digital/analog/TPI/AUI domains), and 12 NC pins. Power domains include dedicated VCC/GND pairs for VCO, TPI receive/transmit, and AUI receive/transmit to minimize analog noise coupling into PLL and receiver circuits.
| Pin | Circuit Role | Design Meaning |
|---|---|---|
| INT | Interrupt Output | Active-low open-drain signal indicating pending ISR events (RX/TX completion, DMA done); cleared by writing ISR register. |
| AD0–AD15 | Multiplexed Address/Data Bus | 16-bit bidirectional bus: carries register addresses during t1, data during t2–t4; direction controlled by MRD/MWR; supports byte/word transfer modes. |
| RA0–RA3 | Register Address Inputs | 4-bit register select for internal NIC registers (CR, ISR, RCR, etc.) when CS is low and device in slave mode. |
| AUI/TPI | Interface Mode Select | Active-high input: high selects AUI differential interface (CDa/CDb, RXa/RXb, TXa/TXb); low enables integrated TPI (TXOa–TXOda, RXIa/RXIb). |
| GDLNK/LNKDIS | Link Status I/O | Open-drain output (LED drive) indicating good link when low; tied low becomes input disabling link integrity checking. |
| SQSEL | Squelch Threshold Select | Input selecting TPI receive squelch level: low = 10BASE-T spec; high = reduced threshold for longer cables or higher loss media. |
| SEL | Transmit Idle State Select | Configures differential idle voltage: low → Transmita positive w.r.t. Transmitb (Ethernet I); high → equal voltage (IEEE 802.3 zero-differential). |
Key Features
| Feature | Design Value |
|---|---|
| Integrated 10BASE-T Transceiver | Meets full IEEE 802.3 Clause 14 requirements including collision detect, heartbeat (SQE), jabber timer, link integrity test, and polarity correction - eliminating need for external PHY ICs. |
| Smart Receive Squelch | Amplitude- and timing-gated detection on RXIa/RXIb inputs prevents false triggering from impulse noise; two user-selectable thresholds via SQSEL pin. |
| Dual DMA Architecture | Independent local and remote DMA channels enable simultaneous packet buffering and host memory transfer, reducing CPU overhead and improving throughput determinism. |
| Programmable Address Filtering | Hardware-accelerated recognition of unicast (6-byte match), multicast (hash-based 8-bit filter), and broadcast (all-1s) frames - offloads filtering from host processor. |
| Pre-emphasis Transmit Driver | Digital pre-emphasis via resistive combination of delayed/non-delayed TXO outputs compensates for twisted-pair low-pass attenuation, enabling reliable 100 m operation. |
| Crystal-Controlled Timing | 20 MHz crystal oscillator (X1/X2) with internal /2 divider generates precise 10 MHz transmit clock; crystal tolerance ±0.005% ensures transmitted frequency accuracy within IEEE 802.3 ±0.01% limit. |
Applications
| Industrial Ethernet Node | Legacy PC Network Adapter |
|---|---|
|
Use Scenario: Embedded PLC or HMI with wired Ethernet connectivity in factory automation environments requiring deterministic packet handling and noise immunity. IC Role / Device Role / Timing Role: Full MAC+PHY controller managing CSMA/CD arbitration, Manchester encoding/decoding, and 10BASE-T physical layer signaling with built-in collision detection and link integrity monitoring. Use Value: Eliminates discrete transceiver and controller ICs, reduces BOM count and PCB area, and provides hardware CRC validation and address filtering to minimize host CPU load. |
Use Scenario: ISA or PCI-based network interface card for DOS/Windows 3.x systems where DP8390 software compatibility is required. IC Role / Device Role / Timing Role: Drop-in replacement for DP8390-based designs, providing identical register map and interrupt behavior while adding integrated 10BASE-T transceiver and AUI support. Use Value: Enables single-chip 10BASE-T capability without modifying driver software or host interface logic - critical for legacy system upgrades. |
| Medical Device Networking | Building Automation Controller |
|
Use Scenario: Patient monitor or diagnostic equipment connecting to hospital LANs via shielded twisted-pair cabling in electrically noisy clinical settings. IC Role / Device Role / Timing Role: Provides galvanically isolated AUI interface option (with external transformer) plus robust TPI squelch and polarity correction to maintain link integrity amid EMI. Use Value: Smart squelch rejects EMI-induced false carrier sense; POL output flags wiring errors; GDLNK drives status LED for real-time link health indication. |
Use Scenario: HVAC or lighting controller deployed in commercial buildings with long cable runs between control panels and field devices. IC Role / Device Role / Timing Role: TPI module operating in reduced-squelch mode (SQSEL high) extends effective cable reach beyond standard 100 m by tolerating higher attenuation. Use Value: Enables reliable communication over 120–150 m CAT3/CAT5 cable without repeaters or active hubs - reducing infrastructure cost and complexity. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar Ethernet controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| RTL8019AS | NE2000-compatible 10BASE-T controller with integrated PHY; lacks AUI interface and dual DMA; uses 8-bit ISA bus interface only. | Targeted at PC add-in cards; not suitable for embedded microcontroller buses or AUI-based multi-media networks. | Select RTL8019AS only for cost-sensitive ISA-based designs where NE2000 driver reuse is mandatory and AUI support is unnecessary. |
| DP83840A | 10/100 Mbps MII-capable PHY with separate MAC interface; no integrated MAC or DMA; requires external controller. | Designed for modern 100BASE-TX systems with MII or RMII host interfaces; incompatible with DP8390 register set or legacy software stacks. | Choose DP83840A for new 100 Mbps designs needing MII flexibility; DP83902AV/NOPB remains optimal for 10 Mbps embedded systems requiring full MAC+PHY integration and DP8390 compatibility. |
Compared with RTL8019AS and DP83840A, DP83902AV/NOPB uniquely delivers full 10BASE-T MAC+PHY integration with AUI fallback, DP8390 register compatibility, and hardware features like programmable FIFO and dual DMA - making it irreplaceable in legacy-compatible or resource-constrained embedded Ethernet implementations.
Availability
DP83902AV/NOPB is available at Aetrix Electronics and suitable for industrial Ethernet nodes, legacy PC network adapters, medical device networking, and building automation controllers requiring stable component supply and long-term obsolescence management.
Supply support for DP83902AV/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments acquired National Semiconductor in 2011 and maintains legacy product support, including datasheets, application notes, and cross-reference guidance for discontinued parts like the DP83902AV/NOPB.
The DP83902AV/NOPB belongs to TI's legacy Ethernet controller portfolio, designed specifically for cost-effective, low-power 10 Mbps embedded LAN connectivity with minimal external components and maximum software compatibility with the widely adopted DP8390 architecture.
FAQ
What is the primary function of the DP83902AV/NOPB in an Ethernet system?
The DP83902AV/NOPB serves as a complete Serial Network Interface Controller (ST-NIC), integrating Media Access Control (MAC), Manchester Encoder/Decoder (ENDEC), and a fully compliant 10BASE-T transceiver. It handles CSMA/CD arbitration, packet framing, CRC generation/validation, address filtering, and physical layer signaling - enabling direct connection to twisted-pair or AUI media without additional PHY or controller ICs. Its design centers on simplifying 10 Mbps Ethernet implementation in embedded systems.
Does the DP83902AV/NOPB support both 10BASE-T and AUI interfaces simultaneously?
No, the DP83902AV/NOPB supports either 10BASE-T or AUI operation, selected by the AUI/TPI pin. When AUI/TPI is high, the device uses differential CDa/CDb, RXa/RXb, and TXa/TXb pins to interface with external transceivers (e.g., DP8392 CTI). When low, it activates its internal TPI module driving TXOa–TXOda and RXIa/RXIb directly to twisted-pair cabling. Both modes share the same ENDEC and MAC logic but cannot operate concurrently.
How does the SQSEL pin affect the DP83902AV/NOPB's receiver performance?
The SQSEL pin selects between two TPI receive squelch thresholds: low = standard 10BASE-T compliance (rejecting signals <±175 mV), high = reduced threshold for extended cable reach (tolerating lower-amplitude valid signals). In reduced mode, the same lower threshold applies for both squelch activation and deactivation, improving sensitivity on lossy or long cables without increasing false-trigger risk from noise - a key enabler for >100 m deployments.
Is the DP83902AV/NOPB pin-compatible with the original DP8390?
Yes, the DP83902AV/NOPB is 100% DP8390 software- and hardware-compatible per its datasheet, sharing identical register mapping, command set, interrupt behavior, and timing requirements. However, it adds integrated 10BASE-T transceiver functionality and AUI interface support - meaning existing DP8390 firmware and drivers run unchanged, while eliminating external transceiver components and simplifying board layout.
What crystal specifications are required for stable DP83902AV/NOPB operation?
The DP83902AV/NOPB requires a 20 MHz parallel-resonant AT-cut crystal with ±0.005% frequency tolerance at 25°C, stability of ±0.005% over 0°C–70°C, maximum ESR of 25 Ω, and 20 pF load capacitance. Stray capacitance must be minimized - board parasitics and device pin capacitance (~5 pF each) must be compensated using trim caps calculated as C1 = 2×CL − (Cb1 + Cd1) - to ensure total load matches spec and maintain transmitted frequency accuracy within IEEE 802.3 ±0.01%.
DP83902AV/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Package/Case:
- 84-LCC (J-Lead)
- Programmable:
- Not Verified
- Protocol:
- Ethernet
- Function:
- Controller
- Interface:
- Serial
- Standards:
- IEEE 802.3, 10 Base-T PHY
- Voltage - Supply:
- 4.75V ~ 5.25V
- Current - Supply:
- 140mA
- Operating Temperature:
- -
- Supplier Device Package:
- 84-PLCC (29.31x29.31)
- Grade:
- -
- Qualification:
- -
DP83902AV/NOPB FAQ
1.How can I place an order for DP83902AV/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for DP83902AV/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DP83902AV/NOPB reliable?
The price and inventory of DP83902AV/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DP83902AV/NOPB is usually 5 days.
3.What payment methods are accepted for DP83902AV/NOPB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DP83902AV/NOPB transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DP83902AV/NOPB?
DP83902AV/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DP83902AV/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DP83902AV/NOPB?
For technical support, including DP83902AV/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DP83902AV/NOPB requirements.
6.How does Aetrix verify that DP83902AV/NOPB is sourced from the original manufacturer or authorized distributors?
All DP83902AV/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DP83902AV/NOPB meets industry standards.
7.What is the process for return or replacement of DP83902AV/NOPB?
All DP83902AV/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with DP83902AV/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DP83902AV/NOPB part is unused and in its original packaging.
Return procedure for DP83902AV/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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