My Inquiry
My Account
Texas Instruments DP83905AVQB
- Part No.:
- DP83905AVQB
- Manufacturer:
- Texas Instruments
- Category:
- Controllers
- Package:
- 160-BFQFP
- Datasheet:
-
DP83905AVQB.pdf
- Description:
- IC CONTROLR AT/LAN TP IN 160QFP
- Quantity:
- Payment:
- Shipping:
Inventory:1,481
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
DP83905AVQB from National Semiconductor is a CMOS VLSI Ethernet controller IC integrating ISA bus interface, IEEE 802.3-compliant MAC, ENDEC, and on-die 10BASE-T transceiver. It supports 10 Mbit/s Manchester encoding/decoding, software compatibility with NE2000/EtherCard PLUS16, single 5V supply operation, and dual-media support (AUI + TPI). It targets ISA-based PC-AT Ethernet adapter cards requiring integrated physical layer and legacy driver compatibility.
For engineers reviewing the DP83905AVQB datasheet, DP83905AVQB pinout, DP83905AVQB application, or DP83905AVQB equivalent, key selection criteria include ISA bus width auto-detection (via DWID), shared memory vs. I/O port architecture modes, AUI/TPI media switching, CHRDY wait-state control, and EEPROM-based configuration loading for plug-and-play initialization.
Technical Context
The DP83905AVQB implements a full IEEE 802.3-compliant 10BASE-T PHY with integrated transmitter/receiver, collision detection, heartbeat, jabber, link integrity test, and polarity correction - all in silicon without external analog components beyond transformers and equalization resistors. Its ENDEC module uses phase-locked loop decoding and squelch on receive/collision pairs.
Its bus interface supports four operational modes: 8-/16-bit shared memory (compatible/enhanced) and 8-/16-bit I/O port (compatible/enhanced), selectable via Configuration Registers A–C and hardware pins (DWID, EECONFIG). The DP8390 core provides packet transmission/reception control using off-board RAM accessed via DMA or I/O-mapped ports.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Data Rate | 10 Mbit/s - Fixed-rate Manchester encoding/decoding per IEEE 802.3 for baseband Ethernet. |
| Media Support | 10BASE-T (integrated TPI) + 10BASE2/10BASE5 (via AUI port) - Enables dual-physical-layer adapter designs with single-chip integration. |
| Bus Interface | ISA-compatible 8-/16-bit - Auto-detected via DWID pin; supports NE2000/EtherCard PLUS16 software compatibility. |
| Supply Voltage | Single 5V - Powers logic, PLL, oscillator, LED drivers, and analog PHY sections with dedicated VCC/PGND/PLLVCC/PLLGND rails. |
| Memory Architecture | Shared memory or I/O port - Configurable via registers; supports up to 64 KB address space in non-compatible modes. |
| Configuration Method | EEPROM-loaded (via DO/DI/SK) or jumpered - Loads node address, interrupt mapping, and mode settings at reset. |
| LED Outputs | TXLED, RXLED, COLED, GDLNK, POLED - Five open-drain active-low indicators for real-time link status, transmit/receive activity, collision, and polarity detection. |
Pinout & Package
DP83905AVQB is packaged in a 160-pin LQFP (NS package code VUL160A), with dedicated power domains (VCC/GND, IFVCC/IFGND, PVCC/PGND, PLLVCC/PLLGND, OVCC/OGND) and functional pin groups: ISA bus interface (SA0–SA19, SD0–SD15, BALE, IO16, M16, etc.), network interface (TXOa–TXOdb, RXIa/RXIb, AUI TX/RX/CD), EEPROM/memory support (MSD0–15, MSA1–15, EECS, RCS1/RCS2), and control signals (DWID, LOWPWR, TEST, CHRDY).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| DWID | Bus Width Select Input | Determines 8-bit (low/floating) or 16-bit (high) ISA data path; enables slot auto-detection in adapter cards. |
| CHRDY | Channel Ready Output | Open-collector signal used to insert wait states during ISA memory/I/O cycles when internal accesses are pending. |
| EECONFIG | EEPROM Load Enable | High-level assertion triggers automatic register initialization from external serial EEPROM at reset release. |
| GDLNK | Link Integrity Indicator | Active-low output signaling valid twisted-pair link presence only in TPI mode; disabled in AUI mode. |
| TXOa–TXOdb | TPI Transmit Outputs | Four high-drive CMOS outputs resistively combined externally to generate differential 10BASE-T signal with ISI compensation. |
| RXIa/RXIb | TPI Receive Inputs | Differential inputs feeding internal amplifier and ENDEC; require external pulse transformers for isolation and impedance matching. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated 10BASE-T Transceiver | Eliminates need for external PHY ICs or discrete analog front-end components beyond transformers and passive filters. |
| Software-Compatible Bus Interface | Reduces driver development effort by supporting existing NE2000 and EtherCard PLUS16 BIOS and OS stack interfaces. |
| Configurable Memory Access Modes | Enables flexible system integration - shared memory for high-throughput transfers or I/O port for simpler resource mapping. |
| EEPROM-Based Initialization | Allows field-updatable MAC address, IRQ, and base I/O address without hardware modifications or soldering. |
| Dedicated Power Domains | Separates digital logic, ISA interface, analog PHY, PLL, and oscillator supplies to minimize noise coupling and meet IEEE 802.3 signal integrity requirements. |
Applications
| ISA-Based Ethernet Adapter Cards | Industrial PC Network Interfaces |
|---|---|
Use Scenario: Plug-in Ethernet card for legacy IBM PC-AT and compatible systems requiring 10BASE-T connectivity. IC Role / Device Role / Timing Role: Primary network controller managing MAC layer, ENDEC, and physical layer signaling; synchronizes to ISA clock and internal PLL. Use Value: Reduces BOM count by integrating bus interface, MAC, ENDEC, and 10BASE-T transceiver - enabling compact, low-cost adapter designs with NE2000 driver compatibility. | Use Scenario: Embedded networking in factory-floor IPCs where long-term driver stability and hardware longevity are critical. IC Role / Device Role / Timing Role: Standalone Ethernet controller interfacing to ISA-bus industrial motherboards; handles packet framing, CRC generation/checking, and collision backoff. Use Value: Provides IEEE 802.3 compliance with deterministic timing behavior and no firmware dependencies - ideal for deterministic real-time control networks. |
| Legacy System Network Upgrades | Diagnostic & Test Equipment Interfaces |
Use Scenario: Retrofitting 10BASE-T capability into older equipment lacking native Ethernet, such as lab instruments or medical devices with ISA expansion slots. IC Role / Device Role / Timing Role: Media access controller bridging ISA host CPU to twisted-pair physical layer; operates in I/O port mode for minimal BIOS modification. Use Value: Enables reuse of existing ISA infrastructure while adding modern cabling convenience and eliminating coaxial termination issues. | Use Scenario: Built-in Ethernet port on automated test equipment for remote configuration, firmware updates, and result streaming. IC Role / Device Role / Timing Role: Deterministic packet handler with hardware loopback diagnostics (AUI/TPI), collision detection, and LED status feedback for field serviceability. Use Value: Supports self-test and remote validation via CHRDY-controlled timing and dedicated diagnostic LEDs (TXLED, COLED, GDLNK) without host software intervention. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar Ethernet controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| RTL8019AS | NE2000-compatible 10BASE-T controller with integrated PHY; lacks AUI port and dedicated TPI equalization circuitry. | Supports only 10BASE-T; no native 10BASE2/10BASE5 fallback via AUI; requires external magnetics with different impedance profile. | Choose for cost-sensitive 10BASE-T-only designs where AUI flexibility is unnecessary and driver footprint must match standard NE2000 binaries. |
| DP83902AVLB | Same DP8390 core but without integrated 10BASE-T transceiver; requires external PHY and AUI transceiver; 128-pin LQFP package. | Demands additional board area and component count for PHY functions; supports broader media options including fiber via AUI. | Choose when multi-media support (fiber, thick/thin coax) is required and board space allows discrete PHY implementation. |
Compared with RTL8019AS and DP83902AVLB, DP83905AVQB uniquely delivers AUI + 10BASE-T dual-physical-layer integration in one package, enabling field-selectable media without hardware changes - critical for adapter cards serving heterogeneous network environments.
Availability
DP83905AVQB is available at Aetrix Electronics and suitable for legacy system upgrades, industrial PC networking, diagnostic equipment interfaces, and ISA-based embedded Ethernet applications requiring stable component supply and long-term obsolescence management.
Supply support for DP83905AVQB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
National Semiconductor was a U.S.-based semiconductor company specializing in analog, interface, and mixed-signal ICs before its acquisition by Texas Instruments in 2011. It pioneered early Ethernet controller architectures for PC platforms.
The DP83905AVQB belongs to the AT/LANTIC family - designed specifically to simplify ISA-based Ethernet adapter development by unifying MAC, bus interface, ENDEC, and 10BASE-T transceiver functions in a single CMOS VLSI device.
FAQ
What is the primary function of the DP83905AVQB in an Ethernet adapter design?
The DP83905AVQB serves as a complete Ethernet controller IC that integrates the Media Access Control (MAC), Encoder/Decoder (ENDEC), ISA bus interface logic, and a fully compliant 10BASE-T transceiver. In adapter designs, it handles packet transmission/reception, Manchester encoding/decoding, bus arbitration, and physical layer signaling - eliminating the need for separate PHY, bus glue logic, or external ENDEC components. This integration reduces board area and simplifies driver compatibility with NE2000 standards.
Does the DP83905AVQB support both 8-bit and 16-bit ISA bus configurations?
Yes, the DP83905AVQB supports both 8-bit and 16-bit ISA bus operation through hardware auto-detection using the DWID pin. When DWID is high, the device configures itself for 16-bit mode; when low or floating (with internal pull-down), it defaults to 8-bit mode. This enables a single adapter card design to operate correctly in either 8-bit or 16-bit ISA slots without manual jumpering or configuration changes - a key feature for backward-compatible PC-AT Ethernet cards.
How does the DP83905AVQB handle configuration and MAC address storage?
The DP83905AVQB supports configuration loading via an external serial EEPROM connected to its DO/DI/SK pins. At power-on reset, if EECONFIG is asserted high, the device reads 16 bytes from the EEPROM and loads them into internal configuration registers - including the 6-byte MAC address, IRQ mapping, and I/O base address. This eliminates the need for DIP switches or solder jumpers, enabling field-programmable identity and setup while maintaining compatibility with NE2000 PROM layout conventions.
What are the key differences between the DP83905AVQB and the DP83902AVLB?
The DP83905AVQB integrates a full IEEE 802.3-compliant 10BASE-T transceiver and ENDEC, whereas the DP83902AVLB is a MAC-only controller requiring external PHY and AUI transceiver components. The DP83905AVQB also includes dedicated TPI output drivers (TXOa–TXOdb), link integrity monitoring (GDLNK), and polarity correction (POLED) - features absent in the DP83902AVLB. Both share the same DP8390 core and NE2000 software compatibility, but DP83905AVQB targets compact, single-chip adapter solutions while DP83902AVLB targets flexible, multi-media designs.
Can the DP83905AVQB be used in modern systems or is it strictly for legacy applications?
DP83905AVQB is intended exclusively for legacy ISA-based systems and industrial embedded platforms with ISA expansion capability. It is not compatible with PCI, PCIe, USB, or modern host interfaces. Its value lies in maintaining continuity for long-lifecycle equipment - such as factory automation controllers, test instrumentation, and medical devices - where original-spec replacement parts are required for certification, reliability, or driver compatibility. New designs should use contemporary Ethernet controllers with updated interfaces and security features.
DP83905AVQB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Package/Case:
- 160-BFQFP
- Programmable:
- Not Verified
- Protocol:
- Ethernet
- Function:
- Controller
- Interface:
- ISA
- Standards:
- IEEE 802.3, 10 Base-T PHY
- Voltage - Supply:
- 4.75V ~ 5.25V
- Current - Supply:
- 100mA
- Operating Temperature:
- 0°C ~ 70°C
- Supplier Device Package:
- 160-QFP (28x28)
- Grade:
- -
- Qualification:
- -
DP83905AVQB FAQ
1.How can I place an order for DP83905AVQB through Aetrix?
Please submit a Request for Quotation (RFQ) for DP83905AVQB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DP83905AVQB reliable?
The price and inventory of DP83905AVQB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DP83905AVQB is usually 5 days.
3.What payment methods are accepted for DP83905AVQB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DP83905AVQB transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DP83905AVQB?
DP83905AVQB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DP83905AVQB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DP83905AVQB?
For technical support, including DP83905AVQB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DP83905AVQB requirements.
6.How does Aetrix verify that DP83905AVQB is sourced from the original manufacturer or authorized distributors?
All DP83905AVQB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DP83905AVQB meets industry standards.
7.What is the process for return or replacement of DP83905AVQB?
All DP83905AVQB units undergo pre-shipment inspection (PSI). If there is an issue with DP83905AVQB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DP83905AVQB part is unused and in its original packaging.
Return procedure for DP83905AVQB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
DP83905AVQB Tags
-
PTN5150AHXMP
NXP Semiconductors
-
USB3740B-AI9-TR
Microchip Technology
-
USB3740B-AI2-TR
Microchip Technology
-
USB3300-EZK-TR
Microchip Technology
-
USB3300-EZK
Microchip Technology
-
FUSB340TMX
onsemi
-
FUSB302BMPX
onsemi
-
DP83826IRHBR
Texas Instruments
-
MCP2518FDT-E/QBB
Microchip Technology
-
FUSB302MPX
onsemi
-
MCP2518FDT-E/SL
Microchip Technology
-
FT260Q-R
FTDI, Future Technology Devices International Ltd
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
