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Texas Instruments DP83936AVUL-33
- Part No.:
- DP83936AVUL-33
- Manufacturer:
- Texas Instruments
- Category:
- Controllers
- Package:
- 160-BQFP
- Datasheet:
-
DP83936AVUL-33.pdf
- Description:
- IC CTRLR ORIENT NETWORK 160QFP
- Quantity:
- Payment:
- Shipping:
Inventory:2,064
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Product details
Overview
DP83936AVUL-33 from National Semiconductor is a 33 MHz full-duplex Ethernet controller IC implementing IEEE 802.3 10BASE-T physical layer interface with integrated ENDEC and twisted-pair transceiver. It delivers high-speed DMA-based packet handling (<5% bus bandwidth consumption), supports big/little-endian microprocessor interfaces, and enables embedded network connectivity in 16-/32-bit systems via its linked-list buffer management architecture.
For engineers reviewing the DP83936AVUL-33 datasheet, DP83936AVUL-33 pinout, DP83936AVUL-33 application, or DP83936AVUL-33 equivalent, key selection criteria include its 33 MHz system clock support, integrated TPI/ENDEC for 10BASE-T, 160-pin PQFP package, full-duplex MAC operation, and compatibility with National/Intel and Motorola bus modes.
Technical Context
The DP83936AVUL-33 integrates a complete 10BASE-T PHY stack: Manchester encoder/decoder, differential transmit/receive circuitry (TXOda–TXOdb, RXIa–RXIb), and collision detection logic. Its MAC unit implements full-duplex media access control with programmable backoff and carrier sense, while supporting both AUI and twisted-pair interface modes via AUI/TP pin configuration.
Buffer management uses three memory regions for receive (RRA, RBA, RDA) and two for transmit (TDA, TBA), enabling zero-copy packet processing without intermediate buffering. The DMA engine operates synchronously with BSCK and supports 16- or 32-bit data transfers, configurable via BMODE and DCR register settings.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Interface Standard | IEEE 802.3 10BASE-T compliant with integrated ENDEC and Twisted Pair Interface (TPI) |
| System Clock | 33 MHz - defines maximum DMA throughput and register access timing for host bus synchronization |
| Bus Width | 32-bit non-multiplexed address/data bus - eliminates address latching overhead and supports burst transfers |
| FIFO Depth | 32-byte transmit and 32-byte receive FIFOs - decouples MAC timing from system bus latency during packet bursts |
| Endianness | Configurable big or little endian - selectable via BMODE pin to match host processor architecture without software byte-swapping |
| Power Supply | +5 V digital (VCC1–VCC9), +5 V ENDEC (VCCL/TXVCC/RXVCC), +5 V TPI (TPVCC/PLLVCC) - segregated rails reduce noise coupling between analog PHY and digital logic |
| Package | 160-pin Plastic Quad Flat Package (PQFP) - standard surface-mount footprint compatible with automated PCB assembly |
Pinout & Package
DP83936AVUL-33 is housed in a 160-pin PQFP (Plastic Quad Flat Package) with 0.65 mm lead pitch, designed for surface-mount assembly on industrial and embedded PCBs. Pin functions are mode-dependent (National/Intel vs. Motorola), with dual-function pins indicated by slash notation (e.g., CRSo/CRSi).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| TXOda, TXOa, TXOb, TXOdb | Twisted Pair Transmit Outputs | Differential CMOS-level outputs resistively combined externally to generate 10BASE-T compliant differential signal with ISI equalization |
| RXIa, RXIb | Twisted Pair Receive Inputs | Differential inputs feeding internal amplifier and ENDEC - enable direct connection to 10BASE-T transformer without external receiver |
| AUI/TP | Interface Mode Select | Logic-low selects Twisted Pair Interface (TPI); logic-high enables AUI mode for coaxial transceiver pairing |
| EXT | ENDEC Selection | Logic-low enables internal IEEE 802.3 ENDEC; logic-high disables internal ENDEC and enables external ENDEC interface |
| BMODE | Bus Mode Control | Logic-low configures National/Intel (little-endian) bus timing; logic-high selects Motorola (big-endian) timing and signal naming |
| OSCIN / OSCOUT | Crystal Oscillator Interface | Supports 20 MHz crystal (for 10 MHz ENDEC clock derivation) or external oscillator - no PLL required for 10BASE-T timing |
Key Features
| Feature | Design Value |
|---|---|
| Full-Duplex MAC Operation | Enables simultaneous transmit/receive without CSMA/CD arbitration - reduces latency and increases effective throughput in point-to-point links |
| Linked-List Buffer Management | Allows dynamic allocation of receive/transmit descriptors across non-contiguous memory - eliminates fixed buffer size constraints and simplifies driver development |
| Integrated TPI + ENDEC | Provides single-chip 10BASE-T solution - eliminates need for external transceiver or line driver, reducing BOM count and board space |
| Programmable LED Outputs | TXLED, RXLED, COLED, POLED, LINKLED provide real-time hardware status indication - enables front-panel diagnostics without CPU polling |
| 32-bit General-Purpose Timer | Independent timer usable for packet timestamping, watchdog functions, or periodic interrupt generation - offloads timing tasks from host processor |
| Loopback Diagnostics | Hardware-supported internal ENDEC loopback (LBK pin) and MAC loopback - enables functional validation without external network infrastructure |
Applications
| Industrial Ethernet Node | Legacy System Network Upgrade |
|---|---|
|
Use Scenario: Connecting PLCs, HMIs, and motion controllers to 10BASE-T industrial LANs with deterministic response requirements. IC Role / Device Role / Timing Role: Primary MAC+PHY controller managing packet framing, CRC generation, Manchester encoding/decoding, and collision-free full-duplex link establishment. Use Value: Integrated TPI eliminates external transceiver components, reducing node BOM cost and improving EMI robustness in electrically noisy factory environments. |
Use Scenario: Retrofitting ISA or VMEbus-based test equipment with native 10BASE-T connectivity without redesigning host interface logic. IC Role / Device Role / Timing Role: Bus-master DMA controller bridging legacy parallel bus to Ethernet, handling packet assembly/disassembly with minimal CPU intervention. Use Value: Configurable bus modes (BMODE) and endian support allow seamless integration with diverse 16-/32-bit microprocessors without firmware abstraction layers. |
| Embedded Bridge Module | Network Management Agent |
|
Use Scenario: Implementing store-and-forward bridging between 10BASE-T segments in building automation gateways. IC Role / Device Role / Timing Role: Dual-role controller performing MAC-layer forwarding decisions and frame retransmission with integrated address filtering (16-entry CAM). Use Value: On-chip CAM and tally counters (6.4.11) enable hardware-accelerated address lookup and traffic statistics collection - critical for low-latency bridge operation. |
Use Scenario: Enabling SNMP-based monitoring in remote telemetry units using IEEE 802.3 layer management (802.3u MII not supported, but 802.3 layer management facilities implemented). IC Role / Device Role / Timing Role: Network interface with full MIB-II-compatible register set (tally counters, link status, error flags) accessible via memory-mapped I/O. Use Value: Hardware-managed link integrity (LINKLED), polarity detection (POLED), and squelch control (LOWSQL) simplify implementation of RFC 1213-compliant agent stacks. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar Ethernet controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| DP83936AVUL-25 | 25 MHz system clock rating - lower maximum DMA bandwidth and longer bus cycle times than DP83936AVUL-33 | Suitable for cost-sensitive designs where 33 MHz timing margin is unnecessary; identical pinout and register map | Select DP83936AVUL-25 only when host system clock is ≤25 MHz and full 33 MHz performance is not required. |
| DP83936AVUL-20 | 20 MHz system clock rating - reduced timing margin for high-bandwidth DMA transfers; same functional feature set | Targeted at legacy 20 MHz microprocessor buses; maintains full software compatibility with DP83936AVUL-33 drivers | Choose DP83936AVUL-20 for systems constrained to 20 MHz bus clocks or requiring extended temperature qualification not available at 33 MHz grade. |
Compared with DP83936AVUL-20 and DP83936AVUL-25, the DP83936AVUL-33 provides higher sustained DMA throughput and tighter timing margins for 33 MHz host buses, while maintaining identical pinout, register interface, and feature set - making it the optimal choice for performance-critical embedded Ethernet nodes.
Availability
DP83936AVUL-33 is available at Aetrix Electronics and suitable for industrial Ethernet nodes, legacy system network upgrades, embedded bridge modules, and network management agents requiring stable component supply and long-term obsolescence planning.
Supply support for DP83936AVUL-33 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
National Semiconductor was a U.S.-based semiconductor company specializing in analog, interface, and communication ICs before its acquisition by Texas Instruments in 2011. Known for high-reliability industrial-grade products and comprehensive technical documentation.
The DP83936AVUL-33 belongs to National's SONIC-T family of Systems-Oriented Network Interface Controllers, designed specifically for embedded 10BASE-T Ethernet implementations requiring integrated PHY, low CPU overhead, and flexible bus interfacing in resource-constrained systems.
FAQ
What is the primary function of the DP83936AVUL-33 in an Ethernet system?
The DP83936AVUL-33 serves as a full-duplex Ethernet controller with integrated IEEE 802.3 10BASE-T PHY, combining MAC, ENDEC, and twisted-pair interface functions in a single 160-pin PQFP device. It handles frame assembly/disassembly, Manchester encoding/decoding, differential signal generation, and DMA-based memory transfers - enabling direct connection of 32-bit microprocessors to 10BASE-T networks without external transceivers.
Does the DP83936AVUL-33 support both National/Intel and Motorola bus protocols?
Yes, the DP83936AVUL-33 supports both bus modes via the BMODE pin: logic-low configures National/Intel (little-endian) timing with ADS/MWR signals, while logic-high enables Motorola (big-endian) mode with AS/MRW. Pin naming, strobe polarity, and byte ordering change accordingly, but register mapping and core functionality remain identical across modes.
Can the DP83936AVUL-33 operate without an external crystal or oscillator?
No, the DP83936AVUL-33 requires a 20 MHz crystal connected between OSCIN and OSCOUT (or a 20 MHz external oscillator on OSCIN) to derive its 10 MHz ENDEC clock. The internal ENDEC and TPI modules depend on this clock source for Manchester encoding/decoding and signal timing - operation is not possible without it.
How does the DP83936AVUL-33 handle packet buffering and memory management?
The DP83936AVUL-33 implements a linked-list descriptor model with separate memory regions: three areas for receive (RRA, RBA, RDA) and two for transmit (TDA, TBA). This allows zero-copy packet processing - the MAC directly reads/writes system RAM without intermediate buffers - and supports non-contiguous packet storage, reducing driver complexity and memory fragmentation.
What diagnostic capabilities does the DP83936AVUL-33 provide for hardware validation?
The DP83936AVUL-33 includes hardware loopback (LBK pin), LED status outputs (TXLED, RXLED, COLED, LINKLED, POLED), and programmable squelch (LOWSQL) and packet reject (PREJ) controls. These enable comprehensive physical-layer validation - including link integrity testing, polarity detection, collision simulation, and packet-level fault injection - without requiring external test equipment.
DP83936AVUL-33 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Package/Case:
- 160-BQFP
- Programmable:
- Not Verified
- Protocol:
- Ethernet
- Function:
- Controller
- Interface:
- Parallel
- Standards:
- 10 Base-T PHY
- Voltage - Supply:
- 4.75V ~ 5.25V
- Current - Supply:
- 140mA
- Operating Temperature:
- 0°C ~ 70°C
- Supplier Device Package:
- 160-PQFP (28x28)
- Grade:
- -
- Qualification:
- -
DP83936AVUL-33 FAQ
1.How can I place an order for DP83936AVUL-33 through Aetrix?
Please submit a Request for Quotation (RFQ) for DP83936AVUL-33 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DP83936AVUL-33 reliable?
The price and inventory of DP83936AVUL-33 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DP83936AVUL-33 is usually 5 days.
3.What payment methods are accepted for DP83936AVUL-33?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DP83936AVUL-33 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DP83936AVUL-33?
DP83936AVUL-33 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DP83936AVUL-33 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DP83936AVUL-33?
For technical support, including DP83936AVUL-33 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DP83936AVUL-33 requirements.
6.How does Aetrix verify that DP83936AVUL-33 is sourced from the original manufacturer or authorized distributors?
All DP83936AVUL-33 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DP83936AVUL-33 meets industry standards.
7.What is the process for return or replacement of DP83936AVUL-33?
All DP83936AVUL-33 units undergo pre-shipment inspection (PSI). If there is an issue with DP83936AVUL-33, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DP83936AVUL-33 part is unused and in its original packaging.
Return procedure for DP83936AVUL-33:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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