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Analog Devices Inc./Maxim Integrated DS1013S-35
- Part No.:
- DS1013S-35
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Delay Lines
- Package:
- 16-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
DS1013S-35.pdf
- Description:
- DELAY LINE 3TAP 35NS 16-SOIC
- Quantity:
- Payment:
- Shipping:
Inventory:1,411
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Product details
Overview
DS1013S-35 from Dallas Semiconductor (now Maxim Integrated) is a 3-channel all-silicon logic delay line in 16-pin SOIC package, delivering precise 35 ns fixed delay per channel with ±2 ns tolerance (–10 to –60 variants), TTL/CMOS-compatible I/O, and leading/trailing edge accuracy for timing-critical digital synchronization. It drives up to 10 × 74LS loads and operates from 4.75 V to 5.25 V at 0°C to 70°C.
For engineers reviewing the DS1013S-35 datasheet, DS1013S-35 pinout, DS1013S-35 application, or DS1013S-35 equivalent, key selection criteria include guaranteed 35 ns per-output delay tolerance, simultaneous three-output buffering, SOIC-16 footprint compatibility, input pulse width support ≥100% of tPLH, and stable performance across voltage (±5%) and temperature (0°C–70°C) variations.
Technical Context
The DS1013S-35 implements three independent buffered delay paths using low-power CMOS circuitry, each reproducing both rising and falling edges with equal precision at 35 ns nominal delay. Its architecture ensures unidirectional delay shift across temperature/voltage-i.e., all outputs slow or speed together-enabling predictable system-level timing margining.
Designed as a drop-in silicon replacement for hybrid delay lines, it eliminates trimming and aging drift while maintaining pin-compatible layout options across DIP-14, DIP-8, and SOIC-16 packages. Input thresholds meet TTL/CMOS standards (VIH ≥ 2.2 V, VIL ≤ 0.8 V), and output drive capability is specified under 74F04-equivalent loading at 1.5 V switching threshold.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Delay per output | 35 ns ±2 ns (guaranteed over 0°C–70°C, VCC = 4.75–5.25 V) |
| Supply voltage | 4.75 V to 5.25 V (supports standard +5 V rail with ±5% regulation) |
| Input logic compatibility | TTL/CMOS (VIH ≥ 2.2 V, VIL ≤ 0.8 V) |
| Output drive strength | 12 mA sink / –1 mA source (drives 10 × 74LS loads) |
| Operating temperature | 0°C to 70°C (commercial grade; no extended temp option for DS1013S-35) |
| Input capacitance | 5 pF typical (minimizes signal integrity impact on high-speed traces) |
| Power consumption | 40–70 mA active current (low quiescent draw for timing-critical embedded systems) |
Pinout & Package
DS1013S-35 uses a 16-pin SOIC (300-mil) package with 1.27 mm pitch, surface-mount compatible, vapor-phase/wave-solderable. Pin 1 is top-left corner (IN 1), pin 16 is bottom-right (NC). No thermal pad or exposed die; standard JEDEC MO-012 outline.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | IN 1 | Primary logic input for first 35 ns delay path |
| 2 | NC | No internal connection; must be left floating or grounded per layout best practice |
| 3 | NC | No internal connection; no routing required |
| 4 | IN 2 | Logic input for second independent 35 ns delay path |
| 5 | IN 3 | Logic input for third independent 35 ns delay path |
| 6 | NC | No internal connection; unused pin |
| 7 | GND | Digital ground reference for all delay paths and I/O buffers |
| 8 | NC | No internal connection |
| 9 | NC | No internal connection |
| 10 | NC | No internal connection |
| 11 | OUT 3 | Buffered 35 ns delayed output corresponding to IN 3 |
| 12 | OUT 2 | Buffered 35 ns delayed output corresponding to IN 2 |
| 13 | OUT 1 | Buffered 35 ns delayed output corresponding to IN 1 |
| 14 | VCC | +5 V supply for all internal logic and output drivers |
| 15 | NC | No internal connection |
| 16 | NC | No internal connection |
Key Features
| Feature | Design Value |
|---|---|
| All-silicon construction | Eliminates aging, trimming, and thermal hysteresis issues inherent in hybrid delay lines |
| Three independent buffered delays | Enables concurrent delay of separate control/data signals without crosstalk or shared loading effects |
| Leading and trailing edge accuracy | Ensures matched propagation for both rising and falling transitions-critical for clock/data alignment |
| ±2 ns delay tolerance (–10 through –60) | Provides deterministic timing budget for high-speed digital interfaces operating up to ~20 MHz |
| Low-power CMOS operation | Reduces local heat generation and power supply noise in dense PCB layouts |
Applications
| Digital Test Equipment | High-Speed Data Acquisition |
|---|---|
Use Scenario: Synchronizing trigger and sampling clocks in automated test systems to eliminate setup/hold violations. IC Role / Device Role / Timing Role: DS1013S-35 provides matched 35 ns delay across three parallel channels to align strobe, enable, and sample signals. Use Value: Guarantees sub-nanosecond skew between delayed outputs, enabling reliable capture of 50+ MHz data streams. | Use Scenario: Compensating for fixed propagation delay in ADC front-end analog signal paths. IC Role / Device Role / Timing Role: DS1013S-35 delays digital control signals (e.g., CONV, BUSY) to match analog signal settling time before sampling. Use Value: Eliminates need for custom PCB trace-length tuning; replaces discrete RC networks with stable, repeatable silicon delay. |
| Industrial PLC I/O Modules | Digital Communication Interface Timing |
Use Scenario: Debouncing multiple sensor inputs with identical latency to maintain deterministic scan cycle timing. IC Role / Device Role / Timing Role: DS1013S-35 applies uniform 35 ns delay to three isolated digital inputs before FPGA logic processing. Use Value: Prevents metastability-induced jitter across parallel I/O channels while preserving real-time determinism. | Use Scenario: Aligning transmit/receive strobes in half-duplex serial links (e.g., RS-485, SPI daisy-chain). IC Role / Device Role / Timing Role: DS1013S-35 delays direction-control and chip-select signals relative to data edges to meet bus turnaround timing. Use Value: Ensures clean bus release before next transmission, avoiding contention without software overhead. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar fixed-delay logic applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| DS1013M-35 | Same 35 ns delay, but in 8-pin DIP (300-mil); no NC pins; GND/VCC on pins 4/5 instead of 7/14 | Through-hole assembly only; larger board area; not surface-mount compatible | Select DS1013M-35 only if legacy DIP footprint or manual soldering is required |
| MAX962-35 | Successor part from Maxim (post-acquisition); same 35 ns delay, improved ICC spec (35 mA typ), wider VCC range (4.5–5.5 V) | Enhanced supply tolerance and lower power; identical SOIC-16 pinout and function | DS1013S-35 remains valid for existing designs; MAX962-35 recommended for new designs requiring tighter supply margin |
Compared with DS1013M-35 and MAX962-35, the DS1013S-35 offers proven reliability in surface-mount production environments with industry-standard SOIC-16 placement, while MAX962-35 improves power efficiency and supply flexibility, and DS1013M-35 serves through-hole-only use cases where board rework or prototyping favors DIP.
Availability
DS1013S-35 is available at Aetrix Electronics and suitable for digital test equipment, industrial PLC I/O modules, and high-speed data acquisition systems requiring stable component supply, long-term obsolescence management, and consistent parametric performance across manufacturing lots.
Supply support for DS1013S-35 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Dallas Semiconductor, acquired by Maxim Integrated in 2001, specialized in precision analog, timing, and mixed-signal ICs for industrial and embedded applications.
The DS1013 series was designed specifically to replace aging hybrid delay lines with monolithic silicon solutions offering superior stability, repeatability, and manufacturability in commercial-grade digital timing systems.
FAQ
What is the guaranteed delay tolerance for DS1013S-35 across temperature and voltage?
The DS1013S-35 guarantees ±2 ns delay tolerance for all three outputs over the full operating range of 0°C to 70°C and supply voltage 4.75 V to 5.25 V. This specification applies specifically to the –35 variant per Table 1 and Note 3 in the official datasheet, and includes combined effects of temperature and voltage variation as confirmed in Note 5.
Does DS1013S-35 support both rising and falling edge delay accuracy?
Yes, DS1013S-35 reproduces both leading (tPLH) and trailing (tPHL) edges with equal precision-each delayed by 35 ns ±2 ns. This dual-edge fidelity is explicitly stated in the DESCRIPTION section and verified in AC Electrical Characteristics, making DS1013S-35 suitable for bidirectional timing alignment in clock/data recovery circuits.
Can DS1013S-35 drive standard TTL loads directly?
Yes, DS1013S-35 can drive up to 10 × 74LS loads per output, as specified in the DESCRIPTION section. Its IOL = 12 mA and IOH = –1 mA ratings meet TTL interface requirements under worst-case VCC (4.75 V) and temperature (70°C), ensuring robust fanout without external buffers.
Is DS1013S-35 pin-compatible with hybrid delay line replacements?
DS1013S-35 is not pin-compatible with hybrid delay lines due to its 16-pin SOIC layout; however, the DS1013-35 in 14-pin DIP (pin 1 = IN1, pin 14 = VCC) is explicitly described as pin-compatible with legacy hybrid devices. The DS1013S-35 requires PCB redesign but offers superior stability and solderability.
What is the maximum input pulse width supported by DS1013S-35?
The DS1013S-35 supports input pulse widths down to 100% of tPLH (i.e., ≥35 ns), as specified in the AC Electrical Characteristics table. Shorter pulses may cause degraded delay accuracy or output distortion; minimum recommended pulse width is 500 ns per the Test Conditions section to ensure full characterization compliance.
DS1013S-35 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- *
- Package/Case:
- 16-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Number of Taps/Steps:
- -
- Function:
- Multiple
- Delay to 1st Tap:
- 35ns
- Tap Increment:
- -
- Available Total Delays:
- 35, 35, 35ns
- Number of Independent Delays:
- 3
- Voltage - Supply:
- 5V
- Operating Temperature:
- -
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
DS1013S-35 FAQ
1.How can I place an order for DS1013S-35 through Aetrix?
Please submit a Request for Quotation (RFQ) for DS1013S-35 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DS1013S-35 reliable?
The price and inventory of DS1013S-35 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DS1013S-35 is usually 5 days.
3.What payment methods are accepted for DS1013S-35?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DS1013S-35 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DS1013S-35?
DS1013S-35 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DS1013S-35 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DS1013S-35?
For technical support, including DS1013S-35 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DS1013S-35 requirements.
6.How does Aetrix verify that DS1013S-35 is sourced from the original manufacturer or authorized distributors?
All DS1013S-35 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DS1013S-35 meets industry standards.
7.What is the process for return or replacement of DS1013S-35?
All DS1013S-35 units undergo pre-shipment inspection (PSI). If there is an issue with DS1013S-35, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DS1013S-35 part is unused and in its original packaging.
Return procedure for DS1013S-35:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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