Analog Devices Inc./Maxim Integrated DS1035Z-20/T&R

Overview

DS1035Z-20/T&R from Dallas Semiconductor (now Maxim Integrated) is a 3-channel, all-silicon, high-speed logic delay line operating at +5 V. It provides three independent buffered delays of 20 ns each, with ±1.5 ns initial tolerance and ±1.5 ns additional variation over 0°C to 70°C and 4.75 V–5.25 V supply. Used in precision timing alignment for digital test equipment and high-speed interface synchronization.

For engineers reviewing the DS1035Z-20/T&R datasheet, DS1035Z-20/T&R pinout, DS1035Z-20/T&R application, or DS1035Z-20/T&R equivalent, key selection criteria include guaranteed 20 ns per-output delay accuracy, leading/trailing edge symmetry preservation, 8-pin SOIC (150-mil) package compatibility, and LS-TTL load drive capability (10 loads per output).

Technical Context

The DS1035Z-20/T&R implements three identical, fully buffered delay paths with matched tPLH/tPHL propagation characteristics. Each channel maintains precise edge alignment across temperature and voltage, with no internal feedback or programmability - it is a fixed, passive silicon delay element.

It operates strictly as a unidirectional, non-inverting delay buffer: inputs IN1–IN3 are electrically isolated, outputs OUT1–OUT3 replicate input transitions after 20 ns with sub-nanosecond edge fidelity. No internal substrate connection (Sub pin) may be externally accessed.

Key Specifications

Pinout & Package

DS1035Z-20/T&R is supplied in an 8-pin SOIC package (150-mil width), RoHS-compliant and tape-and-reel packaged (T&R). Pin 1 is IN1; pins 2–3 are IN2/IN3; pin 4 is GND; pin 5 is VCC; pins 6–8 are OUT3/OUT1/OUT2 respectively. Substrate pin (Sub) is internally connected and must remain unconnected externally.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar fixed-delay logic applications.

Compared with DS1035Z-20/T&R, DS1035M-20 offers identical timing performance in a through-hole format, while MC100EP195DG delivers programmable sub-ns resolution at the cost of supply complexity and signal-level incompatibility - making DS1035Z-20/T&R optimal for robust, fixed-delay +5 V TTL systems.

Availability

DS1035Z-20/T&R is available at Aetrix Electronics and suitable for digital test instrumentation, high-speed bus interface design, and industrial PLC timing calibration requiring stable component supply and long-term obsolescence management.

Supply support for DS1035Z-20/T&R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Dallas Semiconductor, now part of Maxim Integrated (a subsidiary of Analog Devices), specialized in precision timing, memory, and mixed-signal ICs for industrial and communications infrastructure.

The DS1035 series was designed specifically for fixed, high-accuracy digital delay applications in commercial-grade test, measurement, and control systems - prioritizing edge fidelity, channel independence, and +5 V compatibility over programmability or ultra-low power.

FAQ

What is the exact delay value and tolerance of DS1035Z-20/T&R?

The DS1035Z-20/T&R provides a nominal 20 ns delay on each of its three outputs (OUT1–OUT3), with an initial tolerance of ±1.5 ns at +25°C and VCC = +5.0 V. Over the full operating range (0°C to 70°C, 4.75 V–5.25 V), total delay variation remains within ±1.5 ns - verified for both rising (tPLH) and falling (tPHL) edges per device specification.

Can DS1035Z-20/T&R be used with 3.3 V logic systems?

No, DS1035Z-20/T&R is strictly a +5 V device: its DC electrical characteristics (VIH = 2.2 V min, VIL = 0.8 V max, ICC = 35 mA typ) and AC timing parameters are specified only for VCC = 4.75–5.25 V. For 3.3 V systems, consider the pin-compatible DS1033-20 series - DS1035Z-20/T&R will not meet timing or drive specifications at reduced supply.

Is the Sub pin on DS1035Z-20/T&R required to connect to ground?

No - the Sub pin is an internal substrate connection with no external function. Dallas Semiconductor explicitly states "do not make any external connections to these pins." Connecting Sub to ground or any other node may cause unpredictable behavior or reliability degradation; it must remain unconnected and unpopulated on the PCB layout.

Does DS1035Z-20/T&R support mixed-signal or analog delay applications?

No - DS1035Z-20/T&R is a digital logic delay line optimized for TTL/LS-TTL signal levels and edge-aligned timing. It does not preserve analog waveform shape, amplitude, or DC bias; its outputs are digital buffers with defined logic thresholds and fast transitions. For analog or RF delay, discrete transmission-line or dedicated RF delay ICs are required - DS1035Z-20/T&R is unsuitable.

What is the maximum capacitive load DS1035Z-20/T&R can drive reliably?

DS1035Z-20/T&R is characterized to drive up to 10 LS-TTL loads (equivalent to ~15 pF total load capacitance with 1 kΩ pull-up), as confirmed in the datasheet's AC Electrical Characteristics and Test Conditions sections. Exceeding this load increases rise/fall times beyond 2.5 ns and may degrade delay accuracy - for heavier loads, add a dedicated buffer stage before the DS1035Z-20/T&R output.