Analog Devices Inc./Maxim Integrated DS1035Z-6

Overview

DS1035Z-6 from Dallas Semiconductor (now Maxim Integrated) is a 3-channel, all-silicon, high-speed delay line IC operating at +5 V. It provides three independent buffered delays of 6 ns each (tPLH/tPHL), with ±1.5 ns initial tolerance and ±1.0 ns variation over 0°C to 70°C and 4.75–5.25 V. Each output drives up to 10 LS TTL loads and preserves input signal symmetry on both leading and trailing edges - used in high-speed digital timing alignment, clock deskewing, and pulse width control.

For engineers reviewing the DS1035Z-6 datasheet, DS1035Z-6 pinout, DS1035Z-6 application, or DS1035Z-6 equivalent, key selection criteria include guaranteed 6 ns per-output delay accuracy, edge-preserving buffering, SOIC-8 (150-mil) package compatibility, and operation within industrial temperature and supply voltage ranges without external components.

Technical Context

The DS1035Z-6 implements three identical, independent delay paths using monolithic silicon delay elements with integrated logic buffers - not RC or analog-based. Each path delivers matched tPLH and tPHL of 6 ns under nominal conditions (25°C, 5.0 V), with symmetrical rise/fall time ≤2.5 ns and power-up stabilization within 100 ms.

It operates strictly as a fixed-delay element: no programmability, no voltage-controlled adjustment, and no internal feedback. Delay stability relies on process-controlled silicon propagation, not external timing components, enabling deterministic latency in synchronous digital systems where jitter-sensitive signal alignment is required.

Key Specifications

Pinout & Package

DS1035Z-6 is housed in an 8-pin SOIC package (150-mil width), RoHS-compliant and compatible with vapor phase, IR, and wave soldering processes.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar fixed-delay line applications.

Compared with DS1035M-6 and MAX9622EUA+, the DS1035Z-6 uniquely combines triple 6 ns delay, SOIC-8 compactness, and industrial-grade temperature stability - making it optimal for space-constrained, multi-signal timing alignment where pin-for-pin replacement of legacy DS1035 variants is needed.

Availability

DS1035Z-6 is available at Aetrix Electronics and suitable for digital test equipment, FPGA-based prototyping platforms, and industrial control I/O timing modules requiring stable component supply and long-lifecycle support.

Supply support for DS1035Z-6 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Dallas Semiconductor, acquired by Maxim Integrated in 2001, specialized in precision analog, timing, and secure memory ICs for industrial and communications applications.

The DS1035 series was designed specifically for high-reliability, fixed-latency digital signal alignment - targeting applications where predictable, maintenance-free delay performance outweighs programmability or ultra-low power.

FAQ

What is the exact delay value and tolerance specification for DS1035Z-6?

The DS1035Z-6 delivers a nominal delay of 6 ns on each of its three outputs (tPLH and tPHL). Its initial tolerance is ±1.5 ns at 25°C and 5.0 V, with additional variation of ±1.0 ns across the full operating range (0°C to 70°C, 4.75–5.25 V). This is confirmed in Table 1 of the official DS1035 datasheet and applies identically to all three channels of the DS1035Z-6.

Does DS1035Z-6 support both rising and falling edge delay accuracy?

Yes, the DS1035Z-6 guarantees matched delay accuracy on both leading (tPLH) and trailing (tPHL) edges - preserving input signal symmetry and duty cycle. The ±1.5 ns initial tolerance and ±1.0 ns temperature/voltage variation apply to both edges, as explicitly stated in the "Leading and trailing edge precision preserves the input symmetry" feature and verified in AC Electrical Characteristics.

Can DS1035Z-6 drive standard TTL loads directly?

Yes, the DS1035Z-6 outputs are rated to drive up to 10 LS-TTL loads each, with IOL = 12 mA and IOH = –1.0 mA under specified conditions. Its buffered outputs meet TTL voltage thresholds (VIH ≥ 2.2 V, VIL ≤ 0.8 V) and require no external level-shifting or fanout buffers when interfacing with 74LS/74F families - a key design feature confirmed in the DC Electrical Characteristics table.

What is the recommended power supply decoupling for DS1035Z-6?

A minimum 0.1 µF ceramic capacitor placed as close as possible to the VCC (pin 5) and GND (pin 4) pins is required for stable DS1035Z-6 operation. This is specified in the Test Conditions section and supported by the 35 mA typical ICC draw; insufficient decoupling causes timing jitter and output overshoot, especially at high input frequencies (>1 MHz).

Is DS1035Z-6 pin-compatible with other DS1035 variants like DS1035M-6?

No - DS1035Z-6 (SOIC-8) and DS1035M-6 (DIP-8) have identical pin functions but different physical pinouts: DS1035Z-6 uses IN1/IN2/IN3 on pins 1–3 and OUT3/OUT1/OUT2 on pins 6–8, while DS1035M-6 places VCC/OUT3/OUT1/OUT2 on pins 1–4 and IN1/IN2/IN3/GND on pins 5–8. Direct PCB substitution requires layout revision.