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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Programmable Timers and Oscillators

Analog Devices Inc./Maxim Integrated DS1073Z-100

Name: DS1073Z-100
Brand: Analog Devices Inc./Maxim Integrated
SKU: DS1073Z-100
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: DS1073Z-100

Manufacturer:: Analog Devices Inc./Maxim Integrated

Category:: Programmable Timers and Oscillators

Package:: 8-SOIC (0.154", 3.90mm Width)

Datasheet:: DS1073Z-100.pdf

Description:: IC OSC DL FX FREQ 100MHZ 8-SOIC

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Product details

Overview

DS1073Z-100 from Maxim Integrated is a user-programmable 3V fixed-frequency oscillator IC with dual outputs, factory-configured for 50MHz (half of its 100MHz max), supporting internal oscillator, external clock, or fundamental-mode crystal reference, and featuring non-volatile register programming for M/N dividers and mode selection. It delivers 0.5% initial frequency accuracy and operates from 2.7V to 3.6V.

For engineers reviewing the DS1073Z-100 datasheet, DS1073Z-100 pinout, DS1073Z-100 application, or DS1073Z-100 equivalent, key selection considerations include programmable prescaler (÷1/÷2/÷4), on-chip divider range (N = 2–513), synchronous OE gating, power-down mode (<0.8µA), and SOIC-8 packaging for space-constrained timing designs.

Technical Context

The DS1073Z-100 integrates a master oscillator followed by a user-selectable prescaler (÷1, ÷2, ÷4) and a 9-bit programmable divider (N = 2–513), enabling output frequencies from 29.3kHz to 100MHz. Its architecture supports three reference sources-internal oscillator, external clock (≤50MHz), or crystal (≤25MHz)-with glitch-free switching between them via the SELX function.

It implements an enabling sequencer for deterministic OE and PDN control: OE provides synchronous output gating without pulse truncation, while PDN initiates a four-stage power-down sequence that disables outputs, counters, buffers, and the oscillator core. All register settings (MUX/DIV words) are stored in EEPROM and persist across power cycles.

Key Specifications

Parameter	Value and Actual Design Meaning
Max Output Frequency	100.000 MHz - defines upper limit of programmable output range when using internal oscillator and minimal division.
Initial Frequency Accuracy	±0.5% at TA = 25°C - ensures tight tolerance without calibration or external trimming components.
Supply Voltage Range	2.7 V to 3.6 V - compatible with modern 3V logic systems and low-power embedded applications.
Power-Down Current	0.8 µA - enables ultra-low standby consumption for battery-backed or energy-sensitive systems.
Output Enable Timing	One-to-two MCLK periods latency - guarantees glitch-free, phase-coherent output activation/deactivation.
Jitter (3σ)	100 ps - supports stable timing in high-speed digital interfaces requiring low-phase-noise clocks.
Operating Temperature	0°C to +70°C (commercial) - validated for standard industrial board environments without derating.

Pinout & Package

DS1073Z-100 is housed in a 150-mil SOIC-8 package (JEDEC MS-012AC), with lead finish Sn/Pb and RoHS-compliant variants available per ordering suffix.

Pin/Terminal	Circuit Role	Design Meaning
I/O	Main oscillator output / serial programming input	Dual-function pin: outputs programmed clock signal in operation mode; accepts 1-Wire serial data during programming mode.
OUT0	Reference output	Provides buffered master clock (MCLK) or crystal reference; unaffected by OE but disabled during power-down.
VCC	Positive supply	2.7–3.6V supply input; powers all internal circuitry including oscillator, dividers, and I/O buffers.
GND	Ground reference	Common return path for supply and signal currents; must be low-impedance for jitter performance.
OSCIN	External clock input	Accepts up to 50MHz CMOS-level clock signal; used alone or with XTAL for crystal reference.
PDN/SELX	Power-down or reference select control	User-configurable function: active-low power-down (PDN=1) or real-time internal/external clock switch (PDN=0).
XTAL	Crystal connection	Connects to one terminal of fundamental-mode crystal (≤25MHz); other terminal ties to OSCIN.
OE	Output enable	Synchronous gating: high = free-run; low = output held low at next transition, preserving duty cycle integrity.

Key Features

Feature	Design Value
Non-volatile frequency programming	EEPROM-stored MUX/DIV registers allow field reprogramming and design iteration without hardware change.
Dual-output architecture	I/O delivers final divided clock; OUT0 provides unmodified reference clock-enabling clock domain bridging and debug visibility.
Glitch-free reference switching	Enabling sequencer synchronizes transitions between internal/external/crystal references, eliminating metastability or runt pulses.
Synchronous output enable	OE controls I/O with deterministic edge-aligned gating-critical for FPGA configuration clocks and processor reset synchronization.
Ultra-low power-down state	0.8µA quiescent current and full oscillator shutdown enable rapid wake-up in energy-harvesting or portable applications.

Applications

Processor Clock Generation	FPGA Configuration Timing
Use Scenario: Providing stable, programmable clock to microcontrollers or SoCs with variable frequency requirements across product variants. IC Role / Device Role / Timing Role: Primary system clock source with factory-default 50MHz output, reprogrammable in-system for different CPU speeds. Use Value: Eliminates need for multiple crystal SKUs; single DS1073Z-100 part number supports multiple target frequencies via EEPROM configuration.	Use Scenario: Supplying precise configuration clock to Xilinx or Intel FPGAs during bitstream loading, where jitter and startup stability are critical. IC Role / Device Role / Timing Role: Low-jitter (100ps), guaranteed-startup clock generator meeting FPGA config timing margins. Use Value: Power-up time ≤1ms and synchronous OE ensure reliable, repeatable configuration without external reset coordination.
Industrial PLC Timing Module	Legacy System Clock Replacement
Use Scenario: Replacing aging crystal+divider solutions in programmable logic controllers requiring temperature-stable, field-upgradable timing. IC Role / Device Role / Timing Role: Dual-output oscillator delivering main logic clock (I/O) and isolated reference (OUT0) for watchdog or ADC sampling. Use Value: ±1% frequency variation over commercial temp/voltage and 0.8µA power-down support long-term reliability in unventilated enclosures.	Use Scenario: Modernizing legacy equipment with obsolete clock generators by retrofitting into existing SOIC-8 footprints. IC Role / Device Role / Timing Role: Pin-compatible drop-in replacement for fixed-frequency oscillators, with added programmability and low-voltage operation. Use Value: Maintains same 150-mil SOIC-8 footprint and DC characteristics while adding field-programmable flexibility and 3V compatibility.

Processor Clock Generation

FPGA Configuration Timing

Use Scenario: Providing stable, programmable clock to microcontrollers or SoCs with variable frequency requirements across product variants.

IC Role / Device Role / Timing Role: Primary system clock source with factory-default 50MHz output, reprogrammable in-system for different CPU speeds.

Use Value: Eliminates need for multiple crystal SKUs; single DS1073Z-100 part number supports multiple target frequencies via EEPROM configuration.

Use Scenario: Supplying precise configuration clock to Xilinx or Intel FPGAs during bitstream loading, where jitter and startup stability are critical.

IC Role / Device Role / Timing Role: Low-jitter (100ps), guaranteed-startup clock generator meeting FPGA config timing margins.

Use Value: Power-up time ≤1ms and synchronous OE ensure reliable, repeatable configuration without external reset coordination.

Industrial PLC Timing Module

Legacy System Clock Replacement

Use Scenario: Replacing aging crystal+divider solutions in programmable logic controllers requiring temperature-stable, field-upgradable timing.

IC Role / Device Role / Timing Role: Dual-output oscillator delivering main logic clock (I/O) and isolated reference (OUT0) for watchdog or ADC sampling.

Use Value: ±1% frequency variation over commercial temp/voltage and 0.8µA power-down support long-term reliability in unventilated enclosures.

Use Scenario: Modernizing legacy equipment with obsolete clock generators by retrofitting into existing SOIC-8 footprints.

IC Role / Device Role / Timing Role: Pin-compatible drop-in replacement for fixed-frequency oscillators, with added programmability and low-voltage operation.

Use Value: Maintains same 150-mil SOIC-8 footprint and DC characteristics while adding field-programmable flexibility and 3V compatibility.

Equivalent & Alternatives

The following parts are listed as comparable options for similar programmable oscillator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5351A-B-GM	3-output I²C-programmable clock generator with PLL-based synthesis; wider frequency range (8kHz–200MHz) but higher supply current (25mA typical).	Requires external crystal and I²C host; better suited for multi-clock domain systems than single-output timing needs.	Choose Si5351A-B-GM when multiple synchronized outputs or fractional-N synthesis are required; DS1073Z-100 remains optimal for simple, low-power, single-clock programmability.
ICS843002AGI-01LFT	Fixed 100MHz LVDS oscillator in 6-pin SOT23; no programmability, no power-down, no OE, but lower jitter (30ps) and faster startup (100µs).	Designed for high-speed SerDes and networking PHYs where absolute jitter matters more than configurability.	Choose ICS843002AGI-01LFT for jitter-critical serial links; DS1073Z-100 is preferred when field reconfiguration, low standby power, or OE control are mandatory.

Compared with Si5351A-B-GM and ICS843002AGI-01LFT, the DS1073Z-100 uniquely balances EEPROM-based on-site programmability, sub-µA power-down, synchronous OE, and SOIC-8 simplicity-making it ideal for cost-sensitive, upgradeable embedded timing where multi-output complexity or ultra-low jitter are unnecessary.

Availability

DS1073Z-100 is available at Aetrix Electronics and suitable for processor clock generation, FPGA configuration timing, industrial PLC timing modules, and legacy system clock replacement requiring stable component supply, consistent parametric performance, and long-lifecycle availability.

Supply support for DS1073Z-100 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Maxim Integrated (now part of Analog Devices) is a semiconductor company specializing in precision analog, mixed-signal, and power management ICs for industrial, communications, and computing applications.

The DS1073 product line delivers programmable, low-power clock generation for embedded systems needing field-configurable timing without external components-targeting cost-sensitive, space-constrained designs where flexibility replaces fixed-frequency crystals.

FAQ

What is the default factory configuration of the DS1073Z-100?

The DS1073Z-100 ships with DIV = 0x000 (N = 2), MUX = 0x0134, resulting in 50MHz output (half of 100MHz max), internal oscillator selected, M prescaler bypassed, and OUT0 disabled. These EEPROM-stored values are loaded automatically on power-up unless reprogrammed via the I/O pin using 1-Wire protocol.

Can the DS1073Z-100 operate with a crystal reference, and what are the constraints?

Yes, the DS1073Z-100 supports crystal reference via XTAL and OSCIN pins. The crystal must operate in fundamental mode and be rated ≤25MHz. It connects between XTAL and OSCIN; OSCIN must not be driven externally in this configuration. No load capacitors are required-the device integrates appropriate capacitance internally.

How does the synchronous output enable (OE) function prevent pulse truncation in the DS1073Z-100?

The DS1073Z-100 uses an enabling sequencer that samples OE with the prescaler output (MCLK) and gates it with the divider output. If OE goes low while OUT is high, the output is held low at the next high-to-low transition-not immediately-ensuring full pulse width integrity. This behavior is guaranteed across all N-divider values and reference modes.

What is the power-up sequence timing for the DS1073Z-100, and how does OE affect it?

DS1073Z-100 requires ≤1ms from VCC application to stable output (tPOR + tSTAB). OE must be asserted high before or during this interval to initiate output enable; if OE remains low, tSTAB starts only after OE rises. For reliable startup, assert OE high at power-on and optionally deassert it post-stabilization to force low output.

Is the DS1073Z-100 pin-compatible with other DS1073 variants like DS1073M-100?

Yes, the DS1073Z-100 (150-mil SOIC-8) and DS1073M-100 (300-mil DIP-8) share identical pinout, electrical specifications, and functional behavior. Only package type differs-SOIC vs. DIP-so PCB layout must match the chosen variant's footprint, but firmware, register settings, and system integration are fully interchangeable.

DS1073Z-100 Specifications

Product attributes: Attribute value

Manufacturer:: Analog Devices Inc./Maxim Integrated

Series:: EconOscillator™

Package/Case:: 8-SOIC (0.154", 3.90mm Width)

Packaging:: Tube

Product Status:: Obsolete

Type:: Oscillator, Fixed Frequency (Dual)

Count:: -

Frequency:: 100MHz

Voltage - Supply:: 2.7V ~ 3.6V

Current - Supply:: 25 mA

Operating Temperature:: -40°C ~ 85°C

Supplier Device Package:: 8-SOIC

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

DS1073Z-100 FAQ

1.How can I place an order for DS1073Z-100 through Aetrix?

Please submit a Request for Quotation (RFQ) for DS1073Z-100 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for DS1073Z-100 reliable?

The price and inventory of DS1073Z-100 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DS1073Z-100 is usually 5 days.

3.What payment methods are accepted for DS1073Z-100?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DS1073Z-100 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for DS1073Z-100?

DS1073Z-100 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your DS1073Z-100 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for DS1073Z-100?

For technical support, including DS1073Z-100 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DS1073Z-100 requirements.

6.How does Aetrix verify that DS1073Z-100 is sourced from the original manufacturer or authorized distributors?

All DS1073Z-100 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DS1073Z-100 meets industry standards.

7.What is the process for return or replacement of DS1073Z-100?

All DS1073Z-100 units undergo pre-shipment inspection (PSI). If there is an issue with DS1073Z-100, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The DS1073Z-100 part is unused and in its original packaging.

Return procedure for DS1073Z-100:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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