Texas Instruments DS10CP154TSQ/NOPB
- Part No.:
- DS10CP154TSQ/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- Signal Switches, Multiplexers, Decoders
- Package:
- 40-WFQFN Exposed Pad
- Datasheet:
-
DS10CP154TSQ/NOPB.pdf
- Description:
- IC CROSSPOINT SW 1 X 4:4 40WQFN
- Quantity:
- Payment:

- Shipping:

Inventory:1,122
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
DS10CP154TSQ/NOPB from Texas Instruments (formerly National Semiconductor) is a 1.5 Gbps 4×4 LVDS crosspoint switch optimized for high-speed signal routing over FR-4 backplanes and balanced cables. It features fully differential non-blocking architecture, on-chip 100 Ω input/output termination, and dual configuration modes (pin-selectable or SMBus-controlled). Used in SD/HD-SDI routers for lossless video signal switching.
For engineers reviewing the DS10CP154TSQ/NOPB datasheet, DS10CP154TSQ/NOPB pinout, DS10CP154TSQ/NOPB application, or DS10CP154TSQ/NOPB equivalent, key selection criteria include deterministic jitter at 1.5 Gbps (≤28 ps p-p), channel-to-channel skew (≤125 ps), SMBus slave address programmability, and DC-coupled compatibility with LVPECL/CML/LVDS drivers.
Technical Context
The DS10CP154TSQ/NOPB implements a non-blocking 4×4 LVDS crosspoint matrix with independent per-output routing control. Its dual-mode operation-pin-configurable (EN_smb = 0) or SMBus-programmable (EN_smb = 1)-enables flexible integration in both fixed-function and dynamically reconfigurable systems.
It integrates loss-of-signal (LOS) monitoring per input channel, accessible only via SMBus register reads (LOS Register, Address 0x04), and supports SmartPWDN power optimization that disables unused I/O blocks based on active routing paths. Input common mode range (0.05 V to VCC − 0.05 V) enables direct DC coupling to LVPECL, CML, and LVDS sources without level-shifting circuitry.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Signal Rate | DC to 1.5 Gbps - supports SMPTE 292M HD-SDI (1.485 Gbps) and legacy SD-SDI (270 Mbps) without retiming. |
| Differential Skew | Channel-to-channel skew ≤125 ps - ensures timing alignment across all four outputs in broadcast mode (1:4). |
| Jitter Performance | Deterministic jitter ≤28 ps p-p at 1.5 Gbps - meets stringent eye-opening requirements for serial digital video links. |
| Input Termination | On-chip 100 Ω differential termination - eliminates external resistors, reduces board space, and minimizes insertion loss. |
| ESD Protection | 8 kV HBM on LVDS I/O pins - protects against electrostatic discharge during handling and system integration. |
| Supply Voltage | 3.0 V to 3.6 V (typ. 3.3 V) - compatible with standard LVDS logic rails and industrial power domains. |
| Operating Temperature | −40°C to +85°C - qualified for industrial-grade embedded video infrastructure equipment. |
Pinout & Package
DS10CP154TSQ/NOPB uses a 40-pin LLP (Leadless Leadframe Package) with 6 mm × 6 mm footprint and exposed thermal pad (DAP). Pin layout follows flow-through routing for minimal trace stubs and optimal signal integrity on high-speed PCBs.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| IN0+ / IN0− to IN3+ / IN3− (Pins 1–2, 4–5, 6–7, 9–10) | Differential LVDS inputs | Accept LVDS/CML/LVPECL signals; internally terminated 100 Ω; support DC coupling without external biasing. |
| OUT0+ / OUT0− to OUT3+ / OUT3− (Pins 21–22, 23–24, 26–27, 28–29) | Differential LVDS outputs | LVDS-compliant outputs (250–450 mV diff swing); 100 Ω on-chip termination; drive standard 100 Ω differential loads. |
| EN_smb (Pin 17) | SMBus mode enable | Pull-down internal 20 kΩ; logic high activates SMBus interface and disables pin-select function for S00/S01, S10/S11, etc. |
| S00/SCL & S01/SDA (Pins 37, 36) | Configurable dual-role pins | In SMBus mode: SCL clock input and SDA bidirectional data; in pin mode: input select for OUT0. |
| PWDN (Pin 38) | Hardware power-down control | Active-low; forces full device shutdown (except SMBus/LOS circuitry) when EN_smb = 0; ORed with SoftPWDN bit D[7] when EN_smb = 1. |
| VDD (Pins 3, 8, 15, 25, 30) & GND (Pins 16, DAP) | Power distribution network | Multiple VDD/GND pins minimize supply impedance; exposed DAP enhances thermal dissipation (θJC = 3.8°C/W). |
Key Features
| Feature | Design Value |
|---|---|
| Non-blocking 4×4 LVDS crosspoint | Any input can be routed to any output simultaneously - enables dynamic reconfiguration of video/data paths without blocking. |
| SMBus-based LOS monitoring | Per-input open-cable detection reported via read-only LOS Register (Address 0x04) - enables system-level fault isolation in SDI routers. |
| SmartPWDN power optimization | Automatically powers down unused I/O blocks and logic based on active routing configuration - reduces ICC by up to 40% in partial-use scenarios. |
| DC-coupled multi-standard input interface | Wide common-mode range (0.05 V to VCC − 0.05 V) supports direct connection to LVPECL, CML, and LVDS drivers - eliminates AC-coupling capacitors and bias networks. |
| Flow-through pinout in LLP-40 package | Input pins on left side, outputs on right side, control pins on top/bottom - simplifies layer stackup and minimizes crosstalk in dense HD-SDI PCB layouts. |
Applications
| SD/HD-SDI Video Routing | High-Speed Serial Data Multiplexing |
|---|---|
|
Use Scenario: Reconfigurable routing of multiple HD-SDI camera feeds to monitors, recorders, or processing units in broadcast production switchers. IC Role / Device Role / Timing Role: Signal path selector and buffer; maintains signal integrity across 1.485 Gbps serial video streams with sub-130 ps skew. Use Value: Enables hot-swappable source selection without signal interruption; on-chip termination eliminates need for 16 external 100 Ω resistors per device. |
Use Scenario: Aggregating and distributing high-speed test data from multiple instrumentation channels into a single analysis bus. IC Role / Device Role / Timing Role: Low-jitter crosspoint switch for deterministic latency routing; supports NRZ patterns up to 1.5 Gbps with ≤72 mUIP-P total jitter. Use Value: Reduces inter-channel timing mismatch in synchronized acquisition systems; SMBus configurability allows runtime path updates without FPGA reconfiguration. |
| Clock/Data Fanout Distribution | Backplane Signal Switching |
|
Use Scenario: Distributing a single low-skew clock and parallel data bus to four independent processing modules in telecom line cards. IC Role / Device Role / Timing Role: Broadcast-mode buffer (1:4) with matched propagation delay (tPLHD/tPHLD = 460–675 ps); preserves edge alignment across all outputs. Use Value: Eliminates need for discrete fanout buffers and external termination; integrated 100 Ω termination ensures consistent load matching. |
Use Scenario: Dynamic reassignment of high-speed SerDes lanes between processor, FPGA, and peripheral slots on modular FR-4 backplanes. IC Role / Device Role / Timing Role: Lossy-medium-optimized signal router; compensates for FR-4 attenuation via robust LVDS drive strength (350 mV typ. VOD). Use Value: Extends usable trace length beyond typical 15 cm limit for 1.5 Gbps signals; ESD-hardened I/O protects against field-service induced faults. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar LVDS crosspoint switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| DS10CP154TSQX/NOPB | Same die, tape-and-reel packaging variant (no functional difference); identical electrical specs and pinout. | No change in system integration; used for automated SMT assembly where reel format required. | Select DS10CP154TSQX/NOPB for volume production with pick-and-place machines; DS10CP154TSQ/NOPB is tray-packaged for prototyping and low-volume builds. |
| DS10CP154A | Enhanced SMBus implementation supporting multi-slave bus sharing; adds arbitration and timeout recovery not present in DS10CP154TSQ/NOPB. | Required when multiple crosspoint devices share one SMBus segment; DS10CP154TSQ/NOPB is limited to point-to-point SMBus only. | Choose DS10CP154A for centralized control architectures with ≥2 crosspoints on same SMBus; DS10CP154TSQ/NOPB suffices for standalone or isolated SMBus nodes. |
Compared with DS10CP154TSQ/NOPB, DS10CP154TSQX/NOPB offers identical performance in a different packaging format, while DS10CP154A extends SMBus capability to shared-bus environments - making it essential for scalable multi-device control but unnecessary for single-switch deployments.
Availability
DS10CP154TSQ/NOPB is available at Aetrix Electronics and suitable for SD/HD-SDI routers, high-speed test instrumentation, and FR-4 backplane signal switching requiring stable component supply, long-term industrial lifecycle support, and guaranteed traceable sourcing.
Supply support for DS10CP154TSQ/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments acquired National Semiconductor in 2011 and maintains full technical support, documentation, and product continuity for legacy interface ICs including the DS10CP154 series.
The DS10CP154TSQ/NOPB belongs to TI's high-speed interface portfolio, designed specifically for lossless routing of serial digital video, test data, and timing signals in broadcast, industrial, and communications infrastructure.
FAQ
What is the maximum data rate supported by the DS10CP154TSQ/NOPB?
The DS10CP154TSQ/NOPB supports data rates from DC up to 1.5 Gbps, verified by AC electrical characterization including tTJ4 = 0.072 UIP-P at 1.5 Gbps. This enables compliance with SMPTE 292M HD-SDI (1.485 Gbps) and legacy SD-SDI (270 Mbps) standards without signal degradation.
Does the DS10CP154TSQ/NOPB support DC-coupled inputs from LVPECL sources?
Yes, the DS10CP154TSQ/NOPB supports DC-coupled LVPECL inputs due to its wide input common mode voltage range of 0.05 V to VCC − 0.05 V (typically 3.25 V at VCC = 3.3 V). Figure 30006633 in the official datasheet confirms direct interface without level-shifting components.
How is loss-of-signal (LOS) detection implemented in the DS10CP154TSQ/NOPB?
LOS detection in the DS10CP154TSQ/NOPB is implemented per input channel using internal comparators and is accessible only via SMBus register reads (LOS Register at address 0x04). Each bit (D[0]–D[3]) reports open-cable status; no dedicated LOS output pins exist in pin-mode operation.
What is the thermal performance of the DS10CP154TSQ/NOPB package?
The DS10CP154TSQ/NOPB uses an LLP-40 package with exposed die attach pad (DAP). Its thermal resistance is θJA = 26.9°C/W and θJC = 3.8°C/W, enabling reliable operation at full 1.5 Gbps with ambient temperatures up to +85°C when mounted on 2 oz copper with 4 thermal vias under the DAP.
Can the DS10CP154TSQ/NOPB be used in pin-mode and SMBus-mode simultaneously?
No, the DS10CP154TSQ/NOPB operates exclusively in one mode at a time, selected by the EN_smb pin state: logic low (0) enables pin-mode configuration using S00/S01, S10/S11, etc.; logic high (1) enables SMBus-mode, repurposing those pins as SCL/SDA and ADDR0–ADDR3. Mixed-mode operation is not supported.
DS10CP154TSQ/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 40-WFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Type:
- Crosspoint Switch
- Circuit:
- 1 x 4:4
- Independent Circuits:
- 1
- Current - Output High, Low:
- -
- Voltage Supply Source:
- Single Supply
- Voltage - Supply:
- 3V ~ 3.6V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 40-WQFN (6x6)
DS10CP154TSQ/NOPB FAQ
1.How can I place an order for DS10CP154TSQ/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for DS10CP154TSQ/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DS10CP154TSQ/NOPB reliable?
The price and inventory of DS10CP154TSQ/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DS10CP154TSQ/NOPB is usually 5 days.
3.What payment methods are accepted for DS10CP154TSQ/NOPB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DS10CP154TSQ/NOPB transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DS10CP154TSQ/NOPB?
DS10CP154TSQ/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DS10CP154TSQ/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DS10CP154TSQ/NOPB?
For technical support, including DS10CP154TSQ/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DS10CP154TSQ/NOPB requirements.
6.How does Aetrix verify that DS10CP154TSQ/NOPB is sourced from the original manufacturer or authorized distributors?
All DS10CP154TSQ/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DS10CP154TSQ/NOPB meets industry standards.
7.What is the process for return or replacement of DS10CP154TSQ/NOPB?
All DS10CP154TSQ/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with DS10CP154TSQ/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DS10CP154TSQ/NOPB part is unused and in its original packaging.
Return procedure for DS10CP154TSQ/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
DS10CP154TSQ/NOPB Tags
-
SN74HC138DR
Texas Instruments

-
TC7SB3157CFU,LF(CT
Toshiba Semiconductor and Storage

-
74CBTLV3257PW,118
Nexperia USA Inc.
-
SN74CBTLV3257PWR
Texas Instruments

-
74CBTLV3257GUX
Nexperia USA Inc.

-
74HC154BQ,118
Nexperia USA Inc.

-
P3S0200GMX
NXP USA Inc.

-
SN74CB3Q3245PWR
Texas Instruments
-
SN74CB3Q3257RGYR
Texas Instruments

-
TCA9543APWR
Texas Instruments
-
TCA9546APWR
Texas Instruments

-
SN74HC138N
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

