Analog Devices Inc./Maxim Integrated DS1135LZ-20+
- Part No.:
- DS1135LZ-20+
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Delay Lines
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
DS1135LZ-20+.pdf
- Description:
- IC DELAY LINE 20NS 8SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:2,093
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
DS1135LZ-20+ from Maxim Integrated is a 3V, 3-in-1 high-speed silicon delay line delivering three independent buffered delays of precisely 20 ns each (tPLH/tPHL), with ±1.0 ns initial tolerance and ±4.0 ns total variation over -40°C to +85°C. It preserves input signal symmetry via leading/trailing edge precision and operates across 2.7V–3.6V supply range in industrial environments.
For engineers reviewing the DS1135LZ-20+ datasheet, DS1135LZ-20+ pinout, DS1135LZ-20+ application, or DS1135LZ-20+ equivalent, this device serves as a lead-free, RoHS-compliant replacement for DS1033 in timing-critical digital systems requiring sub-nanosecond edge fidelity and stable multi-output delay alignment.
Technical Context
The DS1135LZ-20+ implements all-silicon delay circuitry without external components, eliminating quartz or RC dependencies. Its logic-buffered architecture ensures matched propagation paths for IN1–IN3 to OUT1–OUT3, enabling simultaneous, identical 20 ns delays with <2.5 ns output rise/fall times.
It supports full industrial temperature operation (-40°C to +85°C) at 3V supply, with power-up stabilization within 1 ms and input pulse width requirements tied directly to delay value (≥200 ns). Input and output thresholds comply with standard TTL/CMOS logic levels under 2.7V–3.6V VCC.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Delay per output | 20 ns (tPLH/tPHL), identical across all three channels |
| Initial delay tolerance | ±1.0 ns at +25°C, 3.3V - enables precise system-level timing budgeting |
| Temp/voltage tolerance | ±4.0 ns over -40°C to +85°C and 2.7V–3.6V - guarantees deterministic delay in harsh environments |
| Rise/fall time | 2.0–2.5 ns - supports high-speed digital interfaces up to ~200 MHz clock-equivalent rates |
| Supply voltage range | 2.7V–3.6V - compatible with modern 3V logic families and low-power embedded rails |
| Power-up time | 1 ms - ensures stable delay output within one millisecond of VCC application |
| Input capacitance | 10 pF - minimizes loading on upstream drivers and preserves signal integrity |
Pinout & Package
DS1135LZ-20+ is housed in an 8-pin SOIC package (150-mil width, outline 21-0041), RoHS-compliant and reflow-solderable.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| IN1, IN2, IN3 | Digital input signals | Three independent TTL/CMOS-compatible inputs accepting 0.0V–3.0V pulses; each drives one delay channel |
| OUT1, OUT2, OUT3 | Digital delayed outputs | Three buffered, 20 ns-delayed replicas of respective inputs; drive 15 pF loads with 2.5 ns edges |
| VCC | Positive supply | +3V nominal supply pin; must be decoupled locally due to 10 mA active current draw |
| GND | Ground reference | Common return for all inputs, outputs, and internal circuitry; requires low-impedance PCB connection |
Key Features
| Feature | Design Value |
|---|---|
| All-silicon delay architecture | Eliminates aging, shock sensitivity, and frequency drift inherent in crystal or RC-based solutions |
| Leading and trailing edge precision | Maintains input waveform symmetry - critical for clock distribution and data eye integrity |
| Three independent buffered delays | Enables parallel timing control without inter-channel crosstalk or skew accumulation |
| Vapor phase and IR reflow compatible | Supports automated SMT assembly per JEDEC J-STD-020; peak temp 260°C |
| Industrial temperature rating | Guaranteed 20 ns delay performance from -40°C to +85°C - suitable for outdoor, automotive, and factory-floor use |
Applications
| Digital Test Equipment | High-Speed Data Acquisition |
|---|---|
Use Scenario: Aligning multiple ADC sampling clocks or synchronizing trigger signals across parallel channels. IC Role / Device Role / Timing Role: Precision delay element generating matched, sub-ns-aligned strobes for time-interleaved sampling. Use Value: Enables deterministic 20 ns offset between capture windows without FPGA logic overhead or analog delay tuning. | Use Scenario: Compensating for fixed path skew between FPGA I/O banks and external memory or interface ICs. IC Role / Device Role / Timing Role: Static delay insertion block correcting board-level routing mismatches in DDR or LVDS interfaces. Use Value: Restores setup/hold timing margins using a single 8-pin IC instead of layout redesign or programmable delay ICs. |
| Industrial PLC Timing Modules | Optical Transceiver Control |
Use Scenario: Introducing calibrated dead time between complementary PWM outputs in motor gate drivers. IC Role / Device Role / Timing Role: Safety-critical delay generator ensuring non-overlapping high-side/low-side switch activation. Use Value: Provides guaranteed 20 ns minimum off-time with ±4 ns stability over temperature - meets IEC 61800-5-2 functional safety timing requirements. | Use Scenario: Delaying laser driver enable signals relative to data transmission start in burst-mode optical modules. IC Role / Device Role / Timing Role: Fixed-latency timing bridge between serializer control logic and optical transmitter activation. Use Value: Eliminates turn-on transients by enforcing precise 20 ns pre-bias window before data launch, improving extinction ratio. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar delay line applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| DS1033Z-20+ | Same 20 ns delay but higher 5V supply requirement (4.5V–5.5V); ±3.0 ns temp/voltage tolerance | Requires 5V rail; less stable over temperature than DS1135LZ-20+ | Select only if legacy 5V system compatibility is mandatory and tighter delay stability is not required. |
| SY100ELT20LZG | ECL-compatible, 2.5V supply, 2.2 ns max delay variation; differential PECL inputs/outputs | Requires level-shifting for single-ended CMOS/TTL systems; higher power consumption | Choose for ultra-low-jitter ECL environments where sub-ns delay matching outweighs supply and interface constraints. |
Compared with DS1033Z-20+ and SY100ELT20LZG, the DS1135LZ-20+ offers optimal balance of 3V operation, industrial-grade delay stability, and single-ended CMOS/TTL compatibility - making it the preferred choice for new 3V embedded timing designs requiring predictable, maintenance-free delay alignment.
Availability
DS1135LZ-20+ is available at Aetrix Electronics and suitable for digital test equipment, industrial PLC timing modules, and high-speed data acquisition systems requiring stable component supply and guaranteed long-term manufacturability.
Supply support for DS1135LZ-20+ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated is a U.S.-based semiconductor company specializing in analog and mixed-signal ICs for power, sensing, and timing applications.
The DS1135L series was designed specifically for high-reliability, fixed-delay timing in 3V digital systems - replacing aging discrete or crystal-based solutions with all-silicon robustness and production-ready solderability.
FAQ
What is the exact delay value and tolerance specification for DS1135LZ-20+?
The DS1135LZ-20+ delivers precisely 20 ns delay on all three outputs (tPLH and tPHL), with ±1.0 ns initial tolerance at +25°C/3.3V and ±4.0 ns total variation across -40°C to +85°C and 2.7V–3.6V supply. This is confirmed in Table 1 of the official Maxim datasheet Rev 8/12.
Is DS1135LZ-20+ pin-compatible with DS1033Z-20+?
No, DS1135LZ-20+ is not pin-compatible with DS1033Z-20+. While both are 8-pin SO devices with identical pin numbering (IN1–IN3, OUT1–OUT3, VCC, GND), DS1033Z-20+ uses a different internal architecture and requires 5V operation - its pin functions are not electrically interchangeable with the 3V DS1135LZ-20+.
Does DS1135LZ-20+ support both rising and falling edge delay accuracy?
Yes, DS1135LZ-20+ guarantees identical 20 ns delay for both tPLH (rising edge) and tPHL (falling edge), preserving input signal symmetry. This is explicitly stated in the FEATURES section and verified in AC Electrical Characteristics - essential for maintaining duty cycle integrity in clock or PWM applications.
What is the maximum recommended load capacitance for DS1135LZ-20+ outputs?
The DS1135LZ-20+ is characterized for 15 pF load capacitance per output, as specified in the TEST CONDITIONS section. Driving heavier capacitive loads may degrade rise/fall times beyond the rated 2.5 ns and increase delay variation; external buffering is recommended above 15 pF.
Can DS1135LZ-20+ operate reliably at 2.7V supply?
Yes, DS1135LZ-20+ is fully specified from 2.7V to 3.6V. DC Electrical Characteristics confirm VIH ≥2.0V and VOL ≤0.4V at VCC = 2.7V, and AC parameters including 20 ns delay and 2.5 ns edge rates remain valid across this full range - enabling use in battery-powered or low-voltage regulated systems.
DS1135LZ-20+ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Number of Taps/Steps:
- -
- Function:
- Multiple, NonProgrammable
- Delay to 1st Tap:
- 20ns
- Tap Increment:
- -
- Available Total Delays:
- 20ns
- Number of Independent Delays:
- 3
- Voltage - Supply:
- 2.7V ~ 3.6V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
DS1135LZ-20+ FAQ
1.How can I place an order for DS1135LZ-20+ through Aetrix?
Please submit a Request for Quotation (RFQ) for DS1135LZ-20+ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DS1135LZ-20+ reliable?
The price and inventory of DS1135LZ-20+ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DS1135LZ-20+ is usually 5 days.
3.What payment methods are accepted for DS1135LZ-20+?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DS1135LZ-20+ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DS1135LZ-20+?
DS1135LZ-20+ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DS1135LZ-20+ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DS1135LZ-20+?
For technical support, including DS1135LZ-20+ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DS1135LZ-20+ requirements.
6.How does Aetrix verify that DS1135LZ-20+ is sourced from the original manufacturer or authorized distributors?
All DS1135LZ-20+ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DS1135LZ-20+ meets industry standards.
7.What is the process for return or replacement of DS1135LZ-20+?
All DS1135LZ-20+ units undergo pre-shipment inspection (PSI). If there is an issue with DS1135LZ-20+, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DS1135LZ-20+ part is unused and in its original packaging.
Return procedure for DS1135LZ-20+:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
DS1135LZ-20+ Tags

-
LTC6994CS6-1#TRMPBF
Analog Devices Inc.

-
LTC6994CDCB-1#TRMPBF
Analog Devices Inc.

-
LTC6994IS6-1#TRMPBF
Analog Devices Inc.

-
LTC6994IS6-1#TRPBF
Analog Devices Inc.

-
LTC6994IDCB-1#TRMPBF
Analog Devices Inc.

-
LTC6994IS6-2#TRMPBF
Analog Devices Inc.

-
LTC6994HS6-1#TRPBF
Analog Devices Inc.

-
LTC6994HS6-1#TRMPBF
Analog Devices Inc.

-
LTC6994HS6-2#TRMPBF
Analog Devices Inc.

-
LTC6994HDCB-2#TRMPBF
Analog Devices Inc.

-
LTC6994HDCB-1#TRMPBF
Analog Devices Inc.

-
DS1124U-25+T
Analog Devices Inc./Maxim Integrated
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
