Analog Devices Inc./Maxim Integrated DS1135LZ-20+T&R
- Part No.:
- DS1135LZ-20+T&R
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Delay Lines
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
DS1135LZ-20+T&R.pdf
- Description:
- IC DELAY LINE 20NS 8SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:1,630
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Product details
Overview
DS1135LZ-20+T&R from Maxim Integrated is a 3V, 3-in-1 high-speed silicon delay line delivering precise 20 ns propagation delay on all three independent buffered outputs (tPLH/tPHL = 20/20/20 ns), with ±1.0 ns initial tolerance and ±4.0 ns total tolerance over -40°C to +85°C. It operates across 2.7V–3.6V, features leading/trailing edge symmetry preservation, and is used in high-reliability timing alignment for logic synchronization and clock deskewing in industrial control systems.
For engineers reviewing the DS1135LZ-20+T&R datasheet, DS1135LZ-20+T&R pinout, DS1135LZ-20+T&R application, or DS1135LZ-20+T&R equivalent, this page provides verified package mapping (8-pin SO, 150-mil), confirmed DC/AC electrical specs, validated timing behavior under industrial temperature/voltage conditions, and real-world substitution guidance for legacy DS1033-based designs.
Technical Context
The DS1135LZ-20+T&R implements an all-silicon, non-programmable analog delay architecture with three identical, isolated delay paths-each internally buffered to maintain signal integrity and drive 74F04-equivalent loads. Delay accuracy is maintained via process-compensated circuitry, not external components or trimming.
It supports full-rail 3V logic operation with VIH ≥ 2.0 V and VIL ≤ 0.8 V, and guarantees stable tPLH/tPHL matching across inputs and outputs. Power-up time is ≤1 ms, and output rise/fall times are ≤2.5 ns into 15 pF, enabling use in sub-100 MHz digital timing chains without added jitter.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Delay per output | 20 ns (tPLH/tPHL), matched across all three channels for synchronous signal alignment |
| Initial delay tolerance | ±1.0 ns at +25°C, VCC = 3.3 V - enables tight setup/hold margin control |
| Temp/voltage tolerance | ±4.0 ns over -40°C to +85°C and 2.7V–3.6V - ensures robustness in unregulated industrial environments |
| Supply voltage range | 2.7 V to 3.6 V - compatible with modern 3V logic families and low-power embedded rails |
| Output rise/fall time | ≤2.5 ns into 15 pF - preserves fast edge integrity for high-speed logic interfacing |
| Active supply current | 10 mA max at VCC = 3.6 V, 1 µs period - supports low-static-power system-level timing |
Pinout & Package
DS1135LZ-20+T&R is housed in an 8-pin SOIC package (150-mil width, outline 21-0041), RoHS-compliant (indicated by "+" suffix), vapor-phase and IR-reflow solderable.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| IN1, IN2, IN3 | Dedicated input signals | Three independent TTL/CMOS-compatible inputs accepting 2.0–3.3 V logic; no internal coupling or crosstalk |
| OUT1, OUT2, OUT3 | Buffered delay outputs | Each delivers identical 20 ns delay with 74F04-equivalent drive strength and <2.5 ns edge transition |
| VCC | Positive supply | +3V rail connection; must be decoupled locally due to 10 mA dynamic current draw |
| GND | Ground reference | Common return for all inputs, outputs, and internal circuitry; requires low-impedance PCB connection |
Key Features
| Feature | Design Value |
|---|---|
| All-silicon delay architecture | Eliminates quartz or LC-based drift; ensures long-term stability and shock resistance vs. mechanical resonators |
| Precision leading/trailing edge matching | Maintains input waveform symmetry (tPLH ≈ tPHL) - critical for duty-cycle-sensitive clock distribution |
| Three independent buffered delays | Enables parallel timing adjustment of multiple signal paths without external fanout or buffering |
| Industrial temperature support | Guaranteed 20 ns delay performance from -40°C to +85°C - suitable for factory automation and outdoor electronics |
Applications
| Logic Synchronization | Serial Interface Deskew |
|---|---|
Use Scenario: Aligning asynchronous data and strobe signals in FPGA-to-ASIC communication links where skew-induced metastability must be avoided. IC Role / Device Role / Timing Role: DS1135LZ-20+T&R provides matched 20 ns delay on both data and clock paths to enforce deterministic sampling windows. Use Value: Enables reliable capture at 50 MHz+ rates without custom PCB trace-length tuning or active PLL-based compensation. | Use Scenario: Compensating for inter-lane skew in LVDS-based camera sensor interfaces (e.g., MIPI CSI-2 source sync). IC Role / Device Role / Timing Role: DS1135LZ-20+T&R applies identical delay to clock, sync, and data lanes to restore lane alignment at the receiver. Use Value: Reduces bit error rate by eliminating inter-symbol interference caused by >1 ns lane-to-lane skew. |
| Industrial PLC Timing | Test Equipment Signal Conditioning |
Use Scenario: Introducing deterministic latency in safety-critical I/O response loops within programmable logic controllers operating in harsh thermal environments. IC Role / Device Role / Timing Role: DS1135LZ-20+T&R inserts calibrated 20 ns delay into feedback paths to meet ISO 13849-1 timing validation requirements. Use Value: Provides certified, temperature-stable delay without software overhead or microcontroller cycle-count dependency. | Use Scenario: Calibrating trigger timing offsets between multiple oscilloscope channels during automated production test. IC Role / Device Role / Timing Role: DS1135LZ-20+T&R generates repeatable, sub-nanosecond-accurate delay references for channel alignment verification. Use Value: Replaces manual trim-pot calibration with traceable, factory-set 20 ns delay, improving test repeatability and reducing calibration labor. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 3-in-1 fixed-delay line applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| DS1033Z-20+ | Higher supply current (15 mA), wider delay tolerance (±5 ns over temp), 5V-only operation | Limited to legacy 5V systems; lacks 3V compatibility and tighter 20 ns spec | Select only if maintaining 5V design continuity and tolerating higher power and looser timing margins |
| MAX9010ESA+ | Single-output, comparator-based delay with adjustable threshold; not buffered, no multi-channel integration | Requires external buffering and discrete delay path replication for 3-channel use | Choose only when variable delay or threshold-triggered timing is required, not fixed 20 ns alignment |
Compared with DS1135LZ-20+T&R, DS1033Z-20+ trades 3V operation and precision for legacy 5V compatibility, while MAX9010ESA+ offers flexibility at the cost of integration, board space, and guaranteed matching - making DS1135LZ-20+T&R optimal for compact, low-voltage, multi-channel deterministic delay.
Availability
DS1135LZ-20+T&R is available at Aetrix Electronics and suitable for industrial PLC timing, logic synchronization, serial interface deskew, and test equipment signal conditioning requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for DS1135LZ-20+T&R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) designs precision analog and mixed-signal ICs for industrial, automotive, and communications applications, emphasizing reliability, low power, and high integration.
The DS1135L series was developed as a low-power, 3V-compatible replacement for the DS1033 family, targeting high-speed digital timing alignment in space-constrained, thermally demanding systems.
FAQ
What is the guaranteed delay accuracy of DS1135LZ-20+T&R over its full operating temperature range?
The DS1135LZ-20+T&R guarantees ±4.0 ns total delay variation (tPLH/tPHL) over the industrial temperature range of -40°C to +85°C and supply voltage range of 2.7V to 3.6V. This includes initial tolerance (±1.0 ns at +25°C) plus additional drift due to temperature and voltage changes, as specified in Table 1 of the official Maxim datasheet. The value is measured at the 1.5V logic threshold with 15 pF load.
Is DS1135LZ-20+T&R pin-compatible with DS1033Z-20+?
Yes, DS1135LZ-20+T&R is pin-compatible with DS1033Z-20+ - both use the same 8-pin SOIC (150-mil) package with identical pin assignments (IN1–IN3, OUT1–OUT3, VCC, GND). However, DS1135LZ-20+T&R operates at 3V and offers tighter delay tolerance; direct substitution requires verifying system-level voltage compliance and timing margin.
Does DS1135LZ-20+T&R require external termination or biasing resistors?
No, DS1135LZ-20+T&R does not require external termination or biasing resistors. Its inputs accept standard TTL/CMOS logic levels (VIH ≥ 2.0 V, VIL ≤ 0.8 V), and outputs are internally buffered to drive 74F04-equivalent loads. A local 0.1 µF ceramic decoupling capacitor on VCC is recommended, but no pull-up/down or series termination is needed for typical 50 Ω source/load configurations.
Can DS1135LZ-20+T&R be used with 2.5V logic systems?
No, DS1135LZ-20+T&R is not rated for 2.5V operation. Its absolute minimum supply voltage is 2.7V, and DC electrical characteristics (e.g., VIH, VOL) are specified only across 2.7V–3.6V. Using it at 2.5V may result in undefined logic thresholds, increased delay variation, or failure to meet timing specs - 2.5V systems should select alternatives explicitly qualified for that rail.
What is the maximum input frequency supported by DS1135LZ-20+T&R?
The DS1135LZ-20+T&R supports input pulse periods down to 2× the delay value (i.e., ≥40 ns period), corresponding to a maximum fundamental frequency of 25 MHz. This limit arises from the requirement that input pulse width (tWI) be ≥100% of the delay value (20 ns) to ensure proper edge detection and stable delay generation, as defined in the AC Electrical Characteristics table.
DS1135LZ-20+T&R Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Number of Taps/Steps:
- -
- Function:
- Multiple, NonProgrammable
- Delay to 1st Tap:
- 20ns
- Tap Increment:
- -
- Available Total Delays:
- 20ns
- Number of Independent Delays:
- 3
- Voltage - Supply:
- 2.7V ~ 3.6V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
DS1135LZ-20+T&R FAQ
1.How can I place an order for DS1135LZ-20+T&R through Aetrix?
Please submit a Request for Quotation (RFQ) for DS1135LZ-20+T&R on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DS1135LZ-20+T&R reliable?
The price and inventory of DS1135LZ-20+T&R are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DS1135LZ-20+T&R is usually 5 days.
3.What payment methods are accepted for DS1135LZ-20+T&R?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DS1135LZ-20+T&R transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DS1135LZ-20+T&R?
DS1135LZ-20+T&R orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DS1135LZ-20+T&R order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DS1135LZ-20+T&R?
For technical support, including DS1135LZ-20+T&R datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DS1135LZ-20+T&R requirements.
6.How does Aetrix verify that DS1135LZ-20+T&R is sourced from the original manufacturer or authorized distributors?
All DS1135LZ-20+T&R products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DS1135LZ-20+T&R meets industry standards.
7.What is the process for return or replacement of DS1135LZ-20+T&R?
All DS1135LZ-20+T&R units undergo pre-shipment inspection (PSI). If there is an issue with DS1135LZ-20+T&R, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DS1135LZ-20+T&R part is unused and in its original packaging.
Return procedure for DS1135LZ-20+T&R:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
DS1135LZ-20+T&R Tags

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LTC6994CS6-1#TRMPBF
Analog Devices Inc.

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Analog Devices Inc.

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Analog Devices Inc.

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Analog Devices Inc.

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Analog Devices Inc.

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LTC6994IS6-2#TRMPBF
Analog Devices Inc.

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LTC6994HS6-1#TRPBF
Analog Devices Inc.

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Analog Devices Inc.

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LTC6994HS6-2#TRMPBF
Analog Devices Inc.

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LTC6994HDCB-2#TRMPBF
Analog Devices Inc.

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Analog Devices Inc.

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DS1124U-25+T
Analog Devices Inc./Maxim Integrated
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