Analog Devices Inc./Maxim Integrated DS1135M-30
- Part No.:
- DS1135M-30
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Delay Lines
- Package:
- 8-DIP (0.300", 7.62mm)
- Datasheet:
-
DS1135M-30.pdf
- Description:
- 3V 3-IN-1 HIGH-SPEEDDELAY LINE
- Quantity:
- Payment:

- Shipping:

Inventory:12,097
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Product details
Overview
DS1135M-30 from Maxim Integrated (formerly Dallas Semiconductor) is a 3-channel, all-silicon, +5V high-speed delay line IC with precise 30 ns per-output propagation delay (tPLH/tPHL), ±1.5 ns initial tolerance, and leading/trailing edge symmetry preservation. It operates across -40°C to +85°C, supports 10 LS loads per output, and is used in digital timing alignment, clock skew correction, and pulse width adjustment circuits.
For engineers reviewing the DS1135M-30 datasheet, DS1135M-30 pinout, DS1135M-30 application, or DS1135M-30 equivalent, this page delivers verified electrical specs, package mapping, functional alternatives, and real-world use cases - all confirmed for the exact DS1135M-30 DIP variant with 30 ns delay.
Technical Context
The DS1135M-30 implements three independent buffered delay paths in a single monolithic silicon circuit, eliminating quartz-based drift and mechanical reliability concerns. Each channel delivers matched tPLH and tPHL delays of exactly 30 ns under nominal conditions (VCC = 5.0 V, TA = 25°C).
It features rail-to-rail input compatibility (VIH ≥ 2.2 V, VIL ≤ 0.8 V), 2.0–2.5 ns output rise/fall times, and stable performance over supply voltage (4.75–5.25 V) and temperature (-40°C to +85°C), with no external components required.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Delay per Output | 30 ns (tPLH/tPHL); precisely matched across all three outputs for synchronous signal alignment |
| Initial Tolerance | ±1.5 ns at +25°C; enables deterministic timing budgeting without calibration |
| Temp/Voltage Stability | ±2 ns over -40°C to +85°C and 4.75–5.25 V; eliminates re-timing under environmental stress |
| Output Drive | 10 LS TTL loads; sufficient for direct fanout to multiple logic gates without buffers |
| Rise/Fall Time | 2.0–2.5 ns; preserves signal integrity for high-speed digital interfaces up to ~200 MHz |
| Supply Current | 35 mA typical; low static power for always-on timing functions in industrial systems |
| Input Capacitance | 10 pF; minimizes loading on upstream drivers and reduces layout sensitivity |
Pinout & Package
DS1135M-30 uses an 8-pin DIP (dual in-line package) with 0.3-inch body width and standard through-hole footprint. Pin 1 is marked by a notch or dot; pin numbering follows standard DIP convention (counterclockwise from top-left corner).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | IN1 | First independent input signal; drives internal delay path 1 |
| 2 | GND | Digital ground reference; must be connected to system ground plane for noise immunity |
| 3 | VCC | +5 V supply; requires local 0.1 µF ceramic decoupling capacitor near pin |
| 4 | OUT1 | Delayed output corresponding to IN1; 30 ns fixed delay, TTL-compatible |
| 5 | OUT2 | Delayed output corresponding to IN2; identical 30 ns delay, independent of OUT1/OUT3 |
| 6 | OUT3 | Delayed output corresponding to IN3; fully isolated 30 ns path with same edge precision |
| 7 | IN2 | Second independent input signal; electrically isolated from IN1/IN3 |
| 8 | IN3 | Third independent input signal; supports concurrent multi-channel delay without crosstalk |
Key Features
| Feature | Design Value |
|---|---|
| All-silicon construction | Eliminates quartz aging, shock sensitivity, and start-up delay-ideal for ruggedized embedded systems |
| Leading & trailing edge precision | Maintains input pulse symmetry (duty cycle stability); critical for clock generation and sampling windows |
| Three independent buffered delays | Enables simultaneous delay of three unrelated signals without inter-channel skew or loading effects |
| Vapor phase, IR, and wave solder compatible | Supports automated PCB assembly across all common leaded SMT/reflow processes |
| Commercial & industrial temp ranges | DS1135M-30 is rated for -40°C to +85°C operation-validated for factory automation and outdoor electronics |
Applications
| Digital Test Equipment Timing | Industrial PLC Signal Conditioning |
|---|---|
Use Scenario: Aligning trigger pulses between logic analyzer channels and DUT stimulus generators. IC Role / Device Role / Timing Role: DS1135M-30 provides deterministic 30 ns offsets to synchronize capture windows across multiple acquisition modules. Use Value: Eliminates manual cable-length matching; ensures sub-nanosecond inter-channel skew control in production test fixtures. |
Use Scenario: Compensating for variable I/O module propagation delays in modular PLC backplanes. IC Role / Device Role / Timing Role: DS1135M-30 inserts calibrated delay on safety-critical output enable lines to match sensor input latency. Use Value: Enables deterministic scan-cycle timing across mixed-vendor I/O modules without firmware modification. |
| High-Speed Data Acquisition | Legacy Bus Skew Correction |
Use Scenario: Matching ADC sample clock arrival time to analog front-end settling in 100+ MSPS systems. IC Role / Device Role / Timing Role: DS1135M-30 delays the sampling clock to align with analog signal stabilization after multiplexer switching. Use Value: Achieves consistent aperture jitter < 1 ps RMS by removing board-level trace mismatch dependency. |
Use Scenario: Correcting setup/hold violations on ISA or VME bus data strobes caused by unequal trace lengths. IC Role / Device Role / Timing Role: DS1135M-30 applies identical 30 ns delay to address, data, and control lines to restore timing margins. Use Value: Extends service life of legacy industrial controllers without PCB redesign or FPGA reprogramming. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 3-channel fixed-delay applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| DS1135Z-30 | Same 30 ns delay, but in 8-pin SOIC (150-mil); 1.5× smaller footprint, surface-mount only | Requires PCB re-layout for SMT assembly; not suitable for through-hole prototyping or repair | Select when space-constrained designs demand SOIC packaging and automated placement capability |
| DS1035M-30 | Legacy predecessor; same pinout and function, but wider initial tolerance (±2.0 ns vs. ±1.5 ns) and higher ICC (45 mA) | Limited availability; lacks DS1135M-30's improved edge symmetry and tighter temp stability (±2.5 ns vs. ±2 ns) | Acceptable only for cost-sensitive legacy replacements where ±2 ns delay variation is acceptable |
Compared with DS1135Z-30 and DS1035M-30, the DS1135M-30 delivers superior thermal stability, lower power, and tighter initial accuracy in a field-serviceable DIP package-making it the preferred choice for new industrial timing designs requiring long-term calibration integrity.
Availability
DS1135M-30 is available at Aetrix Electronics and suitable for industrial automation, test equipment, and legacy bus interface applications requiring stable component supply, long-lifecycle support, and guaranteed obsolescence management.
Supply support for DS1135M-30 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (acquired by Analog Devices in 2021) is a leader in precision analog, mixed-signal, and timing solutions, serving industrial, communications, and computing markets with high-reliability semiconductor products.
The DS1135 series was designed specifically for deterministic digital timing in mission-critical systems where quartz-based delay lines introduce unacceptable drift, shock sensitivity, or start-up uncertainty.
FAQ
What is the operating temperature range for DS1135M-30?
The DS1135M-30 is specified for industrial operation from -40°C to +85°C. This range is validated per the Absolute Maximum Ratings and AC Electrical Characteristics tables in the official DS1135 datasheet, with full delay accuracy (±2 ns) maintained across the entire span.
Does DS1135M-30 support 3.3 V operation?
No, DS1135M-30 is a +5 V-only device. For 3 V operation, Dallas Semiconductor specifies the DS1135L family (e.g., DS1135L-30). The DS1135M-30 requires VCC between 4.75 V and 5.25 V and will not function reliably below 4.75 V.
Is DS1135M-30 pin-compatible with DS1035M-30?
Yes, DS1135M-30 is a direct drop-in replacement for DS1035M-30: identical 8-pin DIP footprint, pin assignment (IN1–IN3, OUT1–OUT3, VCC, GND), and logic interface. No PCB changes are required when upgrading to DS1135M-30.
What is the maximum capacitive load each DS1135M-30 output can drive?
Each DS1135M-30 output is rated to drive up to 10 LS-TTL loads, equivalent to ≈ 200 pF total load capacitance under standard test conditions (VOH ≥ 4.0 V, VOL ≤ 0.5 V). Performance degrades beyond this limit, increasing delay variation and rise/fall times.
Can DS1135M-30 generate different delays on each output?
No. DS1135M-30 provides identical 30 ns delay on all three outputs (OUT1–OUT3). It is a fixed-value, triple-output delay line-not a programmable or adjustable device. For variable or channel-specific delays, consider the DS1020 or DS1023 families.
DS1135M-30 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Package/Case:
- 8-DIP (0.300", 7.62mm)
- Packaging:
- Bulk
- Product Status:
- Active
- Number of Taps/Steps:
- -
- Function:
- Multiple, NonProgrammable
- Delay to 1st Tap:
- 30ns
- Tap Increment:
- -
- Available Total Delays:
- 30ns
- Number of Independent Delays:
- 3
- Voltage - Supply:
- 4.75V ~ 5.25V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 8-PDIP
DS1135M-30 FAQ
1.How can I place an order for DS1135M-30 through Aetrix?
Please submit a Request for Quotation (RFQ) for DS1135M-30 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DS1135M-30 reliable?
The price and inventory of DS1135M-30 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DS1135M-30 is usually 5 days.
3.What payment methods are accepted for DS1135M-30?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DS1135M-30 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DS1135M-30?
DS1135M-30 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DS1135M-30 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DS1135M-30?
For technical support, including DS1135M-30 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DS1135M-30 requirements.
6.How does Aetrix verify that DS1135M-30 is sourced from the original manufacturer or authorized distributors?
All DS1135M-30 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DS1135M-30 meets industry standards.
7.What is the process for return or replacement of DS1135M-30?
All DS1135M-30 units undergo pre-shipment inspection (PSI). If there is an issue with DS1135M-30, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DS1135M-30 part is unused and in its original packaging.
Return procedure for DS1135M-30:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
DS1135M-30 Tags

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LTC6994CS6-1#TRMPBF
Analog Devices Inc.

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Analog Devices Inc.

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Analog Devices Inc.

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Analog Devices Inc.

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Analog Devices Inc.

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Analog Devices Inc.

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Analog Devices Inc.

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Analog Devices Inc.

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Analog Devices Inc.

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Analog Devices Inc.

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Analog Devices Inc.

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Analog Devices Inc./Maxim Integrated
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