Analog Devices Inc./Maxim Integrated DS1135U-20
- Part No.:
- DS1135U-20
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Delay Lines
- Package:
- 8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
- Datasheet:
-
DS1135U-20.pdf
- Description:
- IC DELAY LINE 20NS 8UMAX
- Quantity:
- Payment:

- Shipping:

Inventory:1,975
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
DS1135U-20 from Maxim Integrated is a +5V, 3-channel all-silicon delay line with precise 20 ns per-output propagation delay (tPLH/tPHL), ±1.5 ns tolerance over -40°C to +85°C, and leading/trailing edge symmetry preservation for high-speed digital timing alignment in FPGA clock distribution and test instrumentation.
For engineers reviewing the DS1135U-20 datasheet, DS1135U-20 pinout, DS1135U-20 application, or DS1135U-20 equivalent, this device delivers deterministic nanosecond-level delay stability across voltage (4.75–5.25 V) and temperature, supports LS-TTL load driving (10 loads per output), and replaces legacy DS1013/DS1035 with improved edge fidelity and solder compatibility.
Technical Context
The DS1135U-20 implements three independent buffered delay paths in a single 8-pin SOIC package, each with matched tPLH and tPHL values of 20 ns under nominal conditions (25°C, 5.0 V). Its all-silicon architecture eliminates quartz aging and thermal hysteresis, enabling stable delay performance without external components.
Each output features 2.0–2.5 ns rise/fall times and drives up to 10 LS-TTL loads while maintaining input pulse width integrity (tWI ≥ 100% of tap delay). Power-up stabilization completes within 100 ms, and operation is specified across industrial temperature range (-40°C to +85°C) at 4.75–5.25 V supply.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Delay per output | 20 ns (tPLH/tPHL), matched leading/trailing edge timing for symmetric waveform preservation |
| Delay tolerance | ±1.5 ns over -40°C to +85°C, ensuring consistent timing margin in industrial environments |
| Supply voltage | 4.75 V to 5.25 V - compatible with standard 5 V logic rails and decoupling practices |
| Rise/fall time | 2.0–2.5 ns - enables clean signal transitions into 15 pF loads without overshoot or ringing |
| Output drive | Drives 10 LS-TTL loads - sufficient for fanout to multiple logic gates or clock buffers |
| Power-up time | 100 ms - defines minimum system reset hold time before valid delay outputs are guaranteed |
| Input capacitance | 10 pF - minimizes loading on upstream drivers and preserves signal integrity in high-speed traces |
Pinout & Package
DS1135U-20 is housed in an 8-pin SOIC (150-mil) package, RoHS-compliant, vapor-phase, IR, and wave solderable.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | IN2 | Second independent delay input - accepts TTL-compatible signals (VIH ≥ 2.2 V, VIL ≤ 0.8 V) |
| 2 | GND | Digital ground reference - must be low-impedance connection to minimize delay jitter |
| 3 | IN3 | Third independent delay input - electrically isolated from IN1/IN2 for multi-channel timing control |
| 4 | IN1 | Primary delay input - routed to first internal delay path with identical tPLH/tPHL = 20 ns |
| 5 | VCC | +5 V supply - requires local 0.1 µF ceramic decoupling adjacent to pin for stable delay accuracy |
| 6 | OUT1 | First delayed output - provides 20 ns delayed replica of IN1 with preserved edge symmetry |
| 7 | OUT2 | Second delayed output - provides 20 ns delayed replica of IN2, independent of OUT1/OUT3 timing |
| 8 | OUT3 | Third delayed output - provides 20 ns delayed replica of IN3, fully buffered to isolate channel crosstalk |
Key Features
| Feature | Design Value |
|---|---|
| All-silicon delay architecture | Eliminates quartz aging, thermal hysteresis, and mechanical shock sensitivity inherent in crystal-based solutions |
| Precise leading/trailing edge matching | Maintains input signal duty cycle integrity - critical for clock forwarding and sampling window alignment |
| Three independent buffered delays | Enables simultaneous delay of three asynchronous signals without inter-channel skew or loading interaction |
| Industrial temperature operation | Guaranteed 20 ns delay accuracy from -40°C to +85°C - suitable for automotive ECUs and outdoor base stations |
| LS-TTL load compatibility | Each output drives 10 LS loads directly - reduces need for external buffer stages in legacy logic systems |
Applications
| Test Equipment Signal Alignment | FPGA Clock Skew Compensation |
|---|---|
Use Scenario: Aligning trigger and capture signals in automated test equipment (ATE) to synchronize stimulus and response measurement windows. IC Role / Device Role / Timing Role: DS1135U-20 provides deterministic, matched 20 ns delays to equalize path lengths between logic analyzer channels and pattern generator outputs. Use Value: Enables sub-nanosecond timing correlation across multiple instrument channels without custom PCB trace tuning. | Use Scenario: Compensating for routing-induced clock skew between FPGA I/O banks and external memory interfaces (e.g., DDR2/3). IC Role / Device Role / Timing Role: DS1135U-20 inserts calibrated delay on clock or strobe lines to realign setup/hold timing margins at memory controller inputs. Use Value: Eliminates need for FPGA logic resource allocation to delay chains, preserving LUTs and reducing static timing analysis complexity. |
| Industrial PLC Timing Modules | Digital Logic Glue Timing |
Use Scenario: Synchronizing sensor sampling and actuator enable pulses in programmable logic controllers operating in harsh factory environments. IC Role / Device Role / Timing Role: DS1135U-20 delivers stable 20 ns delays across -40°C to +85°C to coordinate analog-to-digital conversion triggers with isolation driver activation. Use Value: Ensures deterministic I/O response latency despite ambient temperature swings, meeting IEC 61131-2 timing certification requirements. | Use Scenario: Matching propagation delays across parallel data paths in legacy TTL/CMOS bus interfaces (e.g., ISA, GPIB, or custom backplanes). IC Role / Device Role / Timing Role: DS1135U-20 equalizes signal arrival times across address/data/control lines to meet setup/hold windows of older microcontrollers. Use Value: Restores timing compliance in retrofitted systems where original board layout cannot be modified. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar delay line applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| DS1135Z-20+ | Same 20 ns delay, identical SOIC-8 package, but Z suffix denotes RoHS-compliant lead-free finish vs. U's legacy finish | No functional difference; Z-20+ is current production version with updated environmental compliance | Select DS1135Z-20+ for new designs requiring RoHS/REACH conformance and long-term supply continuity |
| DS1013-20 | Legacy 20 ns delay line with wider tolerance (±5 ns over temp), higher ICC (50 mA), and no guaranteed edge symmetry | Limited to commercial temperature range (0°C to +70°C); unsuitable for industrial or automotive use | DS1135U-20 offers superior precision, broader temperature support, and lower power - upgrade recommended where timing margin is critical |
Compared with DS1135Z-20+ and DS1013-20, the DS1135U-20 provides identical delay accuracy and industrial temperature support as the Z variant but with legacy finish, while offering significantly tighter tolerance and edge fidelity than DS1013-20 - making it optimal for timing-critical upgrades where RoHS is not mandated.
Availability
DS1135U-20 is available at Aetrix Electronics and suitable for FPGA clock alignment, industrial PLC timing modules, and test equipment signal synchronization requiring stable component supply with guaranteed industrial temperature performance and nanosecond-level delay repeatability.
Supply support for DS1135U-20 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) designs precision analog and mixed-signal ICs for industrial, communications, and computing applications, emphasizing reliability, integration, and performance under stress.
The DS1135U-20 belongs to Maxim's silicon delay line product line, engineered to replace quartz and RC-based timing elements with robust, temperature-stable, and solder-reflow-compatible alternatives for high-speed digital systems.
FAQ
What is the guaranteed delay accuracy of DS1135U-20 over its full operating temperature range?
The DS1135U-20 guarantees ±1.5 ns delay tolerance over -40°C to +85°C, with nominal 20 ns tPLH/tPHL at 25°C and 5.0 V. This specification ensures predictable timing behavior in industrial environments without recalibration. The DS1135U-20 achieves this via all-silicon design and matched internal circuitry, eliminating drift mechanisms found in passive delay solutions.
Can DS1135U-20 drive standard TTL loads directly?
Yes, DS1135U-20 can drive up to 10 LS-TTL loads per output, verified across -40°C to +85°C and 4.75–5.25 V supply. Each output maintains 2.0–2.5 ns rise/fall times into 15 pF loads, supporting direct interfacing with legacy logic families without external buffers. The DS1135U-20's output stage is designed specifically for this load capability.
Is DS1135U-20 pin-compatible with DS1013-20?
Yes, DS1135U-20 uses the same 8-pin SOIC (150-mil) footprint and pin assignment as DS1013-20, enabling drop-in replacement in existing layouts. However, DS1135U-20 improves delay tolerance (±1.5 ns vs. ±5 ns), extends temperature range (-40°C to +85°C), and adds leading/trailing edge symmetry - all without changing PCB design. The DS1135U-20 retains full backward compatibility while enhancing performance.
Does DS1135U-20 require external components for stable operation?
No, DS1135U-20 operates as a standalone delay element with no external resistors, capacitors, or crystals required. A single 0.1 µF ceramic capacitor placed near the VCC pin is recommended for supply decoupling, but no timing-setting components are needed. The DS1135U-20's all-silicon architecture integrates all necessary circuitry internally, simplifying BOM and layout.
What is the maximum input pulse width supported by DS1135U-20?
The DS1135U-20 supports input pulse widths (tWI) down to 100% of the tap delay (i.e., ≥20 ns), with full AC specifications guaranteed under that condition. Shorter pulses may function but are not characterized; for reliable operation, maintain tWI ≥20 ns and ensure rise/fall times ≤3.0 ns (20%–80%). The DS1135U-20's timing diagram and test conditions confirm this minimum width requirement.
DS1135U-20 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Package/Case:
- 8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Number of Taps/Steps:
- -
- Function:
- Multiple, NonProgrammable
- Delay to 1st Tap:
- 20ns
- Tap Increment:
- -
- Available Total Delays:
- 20ns
- Number of Independent Delays:
- 3
- Voltage - Supply:
- 4.75V ~ 5.25V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-uMAX/uSOP
DS1135U-20 FAQ
1.How can I place an order for DS1135U-20 through Aetrix?
Please submit a Request for Quotation (RFQ) for DS1135U-20 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DS1135U-20 reliable?
The price and inventory of DS1135U-20 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DS1135U-20 is usually 5 days.
3.What payment methods are accepted for DS1135U-20?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DS1135U-20 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DS1135U-20?
DS1135U-20 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DS1135U-20 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DS1135U-20?
For technical support, including DS1135U-20 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DS1135U-20 requirements.
6.How does Aetrix verify that DS1135U-20 is sourced from the original manufacturer or authorized distributors?
All DS1135U-20 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DS1135U-20 meets industry standards.
7.What is the process for return or replacement of DS1135U-20?
All DS1135U-20 units undergo pre-shipment inspection (PSI). If there is an issue with DS1135U-20, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DS1135U-20 part is unused and in its original packaging.
Return procedure for DS1135U-20:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
DS1135U-20 Tags

-
LTC6994CS6-1#TRMPBF
Analog Devices Inc.

-
LTC6994CDCB-1#TRMPBF
Analog Devices Inc.

-
LTC6994IS6-1#TRMPBF
Analog Devices Inc.

-
LTC6994IS6-1#TRPBF
Analog Devices Inc.

-
LTC6994IDCB-1#TRMPBF
Analog Devices Inc.

-
LTC6994IS6-2#TRMPBF
Analog Devices Inc.

-
LTC6994HS6-1#TRPBF
Analog Devices Inc.

-
LTC6994HS6-1#TRMPBF
Analog Devices Inc.

-
LTC6994HS6-2#TRMPBF
Analog Devices Inc.

-
LTC6994HDCB-2#TRMPBF
Analog Devices Inc.

-
LTC6994HDCB-1#TRMPBF
Analog Devices Inc.

-
DS1124U-25+T
Analog Devices Inc./Maxim Integrated
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

