Analog Devices Inc./Maxim Integrated DS1135Z-10
- Part No.:
- DS1135Z-10
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Delay Lines
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
DS1135Z-10.pdf
- Description:
- IC DELAY LINE 10NS 8SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:108
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Product details
Overview
DS1135Z-10 from Maxim Integrated is a high-speed, all-silicon 3-channel digital delay line operating at +5V, delivering precise 10ns propagation delay per output (tPLH/tPHL) with ±1.0ns initial tolerance and ±1.5ns variation over -40°C to +85°C. It preserves input signal symmetry via leading/trailing edge accuracy and drives up to 10 LS TTL loads-used in clock skew correction, pulse width adjustment, and timing alignment in industrial control and test instrumentation.
For engineers reviewing the DS1135Z-10 datasheet, DS1135Z-10 pinout, DS1135Z-10 application, or DS1135Z-10 equivalent, this page provides verified timing specifications, SOIC-8 package mapping, functional alternatives, and real-world use context for deterministic delay implementation without analog drift or temperature-induced jitter.
Technical Context
The DS1135Z-10 implements three independent buffered delay paths within a single monolithic silicon IC, each with identical 10ns nominal delay and matched tPLH/tPHL characteristics. Its logic-level input/output architecture ensures compatibility with standard TTL/LS families and eliminates external passive components required by RC-based solutions.
Designed for stable operation across 4.75V–5.25V supply and full industrial temperature range (-40°C to +85°C), it achieves sub-nanosecond edge precision using internal high-speed CMOS delay cells-not quartz, MEMS, or PLL-based synthesis-making it suitable for fixed-delay applications where phase noise or lock time are irrelevant.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Delay per output | 10ns (tPLH/tPHL), matched across all three channels for synchronous timing alignment |
| Initial delay tolerance | ±1.0ns at +25°C/5.0V-enables deterministic setup/hold margin calculation |
| Temp/voltage tolerance | ±1.5ns over -40°C to +85°C and 4.75V–5.25V-guarantees consistent delay in harsh environments |
| Output drive strength | 12mA sink / -1.0mA source-supports direct interface to 74F04 or 10 LS-TTL loads without buffers |
| Rise/fall time | 2.0–2.5ns-preserves fast edge integrity for <100MHz digital timing applications |
| Supply voltage | +5V ±5% (4.75V–5.25V)-compatible with legacy 5V logic rails and industrial power supplies |
Pinout & Package
DS1135Z-10 is housed in an 8-pin SOIC (150-mil) package with gull-wing leads, RoHS-compliant, and qualified for vapor phase, IR, and wave soldering processes.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| IN1, IN2, IN3 | Digital input signals | Three independent TTL-compatible inputs accepting 0.0V–3.0V pulses; each routed to its dedicated delay path |
| OUT1, OUT2, OUT3 | Digital delayed outputs | Three buffered outputs delivering identical 10ns delay with LS-TTL drive capability and 15pF load tolerance |
| VCC | Positive supply | +5V power rail connection; requires local 0.1µF ceramic decoupling per device |
| GND | Ground reference | Common return path for all inputs, outputs, and internal circuitry; must be low-impedance |
Key Features
| Feature | Design Value |
|---|---|
| All-silicon delay architecture | Eliminates aging, shock sensitivity, and temperature hysteresis inherent in analog RC or crystal-based delay methods |
| Precision leading & trailing edge matching | Maintains input duty cycle integrity-critical for clock distribution and pulse shaping where symmetry affects downstream sampling |
| Three independent buffered delays | Enables parallel timing adjustments on separate signal paths without crosstalk or shared loading effects |
| Industrial temperature range support | Validated operation from -40°C to +85°C-suitable for factory automation, motor drives, and outdoor instrumentation |
Applications
| Industrial PLC Timing Calibration | Digital Test Equipment Pulse Alignment |
|---|---|
Use Scenario: Synchronizing I/O scan cycles across multiple modules in a programmable logic controller rack. IC Role / Device Role / Timing Role: DS1135Z-10 provides deterministic 10ns delay to align sensor input capture windows with actuator output strobes. Use Value: Eliminates variable propagation skew between backplane traces, enabling sub-microsecond deterministic control loop timing. | Use Scenario: Aligning stimulus and response edges in automated test equipment (ATE) for high-speed digital IC validation. IC Role / Device Role / Timing Role: DS1135Z-10 introduces calibrated delay on reference clock or trigger lines to match DUT input setup/hold requirements. Use Value: Replaces manual coaxial cable length tuning with repeatable, board-level silicon delay-reducing calibration time and fixture variability. |
| Motor Drive Gate Signal Skew Correction | Legacy System Clock Domain Interface |
Use Scenario: Compensating for unequal trace lengths between microcontroller PWM outputs and gate driver inputs in 3-phase inverter designs. IC Role / Device Role / Timing Role: DS1135Z-10 applies identical 10ns delay to all three PWM channels to equalize effective dead-time insertion. Use Value: Prevents shoot-through current by ensuring simultaneous MOSFET turn-off across phases, independent of PCB layout asymmetry. | Use Scenario: Bridging timing mismatch between legacy 5V microcontrollers and newer peripherals requiring precise strobe alignment. IC Role / Device Role / Timing Role: DS1135Z-10 inserts fixed 10ns delay on address latch enable (ALE) or chip select (CS) signals to meet setup window of memory-mapped devices. Use Value: Avoids costly FPGA re-spin or custom ASIC development by resolving timing closure with off-the-shelf silicon delay. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar fixed-delay line applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| DS1135Z-8+ | 8ns nominal delay, ±1.0ns initial tolerance-identical architecture and package | Suitable where shorter delay is acceptable; may require timing recalculation in critical paths | Select when system margin allows 2ns reduction and existing layout supports same SOIC-8 footprint |
| DS1135Z-12+ | 12ns nominal delay, ±1.0ns initial tolerance-same electrical specs and thermal behavior | Used where longer delay improves noise immunity or accommodates slower logic families | Choose when 2ns additional delay resolves marginal setup times without altering board design |
Compared with DS1135Z-8+ and DS1135Z-12+, the DS1135Z-10 offers the optimal balance of delay resolution and timing margin for mid-range 5V digital systems-neither over-constraining nor under-compensating critical path delays in industrial control and instrumentation.
Availability
DS1135Z-10 is available at Aetrix Electronics and suitable for industrial PLC timing calibration, digital test equipment pulse alignment, and motor drive gate signal skew correction requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for DS1135Z-10 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) designs precision analog, mixed-signal, and timing ICs for industrial, automotive, and communications applications-with emphasis on reliability, integration, and performance under stress.
The DS1135 series belongs to Maxim's high-speed timing portfolio, engineered specifically for deterministic, low-jitter digital delay in 5V logic systems where quartz oscillators or programmable delay ICs introduce unnecessary complexity or cost.
FAQ
What is the guaranteed delay accuracy of DS1135Z-10 over its full operating temperature range?
The DS1135Z-10 guarantees ±1.5ns delay variation over -40°C to +85°C and 4.75V–5.25V supply, measured as tPLH and tPHL. This specification ensures predictable timing behavior in industrial environments without recalibration or compensation firmware-unlike RC-based solutions whose drift exceeds ±5ns across the same range.
Can DS1135Z-10 replace DS1013 or DS1035 in existing designs?
Yes-DS1135Z-10 is explicitly recommended as a replacement for DS1013 and DS1035. It shares the same SOIC-8 package, pinout, and 5V operation, while offering improved speed, tighter delay tolerance (±1.0ns vs. ±2.5ns), and enhanced temperature stability. No PCB changes are required for drop-in substitution.
Does DS1135Z-10 support 3.3V logic interfaces?
No-DS1135Z-10 is specified only for +5V operation (4.75V–5.25V). For 3V systems, Maxim recommends the DS1135L family. Attempting to operate DS1135Z-10 below 4.75V risks undefined delay behavior and output drive degradation, as confirmed by DC electrical characteristics tables.
How many LS-TTL loads can each DS1135Z-10 output drive reliably?
Each DS1135Z-10 output can drive up to 10 LS-TTL loads, as stated in the datasheet description and validated by the -1.0mA high-level and 12mA low-level output current specs. This matches the fanout capability of standard 74LS00-series gates and eliminates need for external buffer stages in most industrial logic designs.
Is DS1135Z-10 compatible with automated PCB assembly processes?
Yes-DS1135Z-10 is qualified for vapor phase, infrared (IR), and wave soldering per manufacturer documentation. Its SOIC-8 package meets JEDEC MS-012 standards, and the device withstands peak reflow temperatures up to +260°C for 10 seconds-fully compatible with modern SMT production lines.
DS1135Z-10 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Discontinued at Digi-Key
- Number of Taps/Steps:
- -
- Function:
- Multiple, NonProgrammable
- Delay to 1st Tap:
- 10ns
- Tap Increment:
- -
- Available Total Delays:
- 10ns
- Number of Independent Delays:
- 3
- Voltage - Supply:
- 4.75V ~ 5.25V
- Operating Temperature:
- -
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
DS1135Z-10 FAQ
1.How can I place an order for DS1135Z-10 through Aetrix?
Please submit a Request for Quotation (RFQ) for DS1135Z-10 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DS1135Z-10 reliable?
The price and inventory of DS1135Z-10 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DS1135Z-10 is usually 5 days.
3.What payment methods are accepted for DS1135Z-10?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DS1135Z-10 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DS1135Z-10?
DS1135Z-10 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DS1135Z-10 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DS1135Z-10?
For technical support, including DS1135Z-10 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DS1135Z-10 requirements.
6.How does Aetrix verify that DS1135Z-10 is sourced from the original manufacturer or authorized distributors?
All DS1135Z-10 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DS1135Z-10 meets industry standards.
7.What is the process for return or replacement of DS1135Z-10?
All DS1135Z-10 units undergo pre-shipment inspection (PSI). If there is an issue with DS1135Z-10, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DS1135Z-10 part is unused and in its original packaging.
Return procedure for DS1135Z-10:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
DS1135Z-10 Tags

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