Analog Devices Inc./Maxim Integrated DS1135Z-10/TR
- Part No.:
- DS1135Z-10/TR
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Delay Lines
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
DS1135Z-10/TR.pdf
- Description:
- 3V 3-IN-1 HIGH-SPEEDDELAY LINE
- Quantity:
- Payment:

- Shipping:

Inventory:7,500
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Product details
Overview
DS1135Z-10/TR from Maxim Integrated (formerly Dallas Semiconductor) is a 3-channel, all-silicon, high-speed delay line IC operating at +5V with precise 10 ns per-output propagation delay (tPLH/tPHL), ±1.0 ns initial tolerance and ±1.5 ns tolerance over -40°C to +85°C. It provides independent buffered delays for timing alignment in digital signal paths, used in clock deskewing, pulse width adjustment, and setup/hold time compensation in industrial control and test equipment.
For engineers reviewing the DS1135Z-10/TR datasheet, DS1135Z-10/TR pinout, DS1135Z-10/TR application, or DS1135Z-10/TR equivalent, key selection considerations include its triple-output delay accuracy, leading/trailing edge symmetry preservation, SOIC-8 (150-mil) package compatibility, and direct replacement path for legacy DS1013/DS1035 designs requiring stable 10 ns delays.
Technical Context
The DS1135Z-10/TR implements three independent logic-buffered delay paths in a single monolithic silicon circuit, each delivering identical 10 ns nominal delay on both rising (tPLH) and falling (tPHL) edges. Its all-silicon architecture eliminates quartz-based drift and enables stable operation across voltage (4.75 V–5.25 V) and temperature (-40°C to +85°C).
Each output drives up to 10 LS-TTL loads with 2.0–2.5 ns rise/fall times (tOR/tOF), and the device features fast power-up time (<100 ms) and low active current (35 mA typical). Input-to-output delay is measured at the 1.5 V threshold under 15 pF load, with input pulse width constrained to ≥100% of tap delay for specified accuracy.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Delay per output | 10 ns (tPLH/tPHL), matched across all three channels for synchronous signal alignment |
| Initial delay tolerance | ±1.0 ns at +25°C / 5.0 V - ensures tight binning without calibration |
| Temp/voltage tolerance | ±1.5 ns over -40°C to +85°C and 4.75–5.25 V - guarantees stability in harsh environments |
| Supply voltage | +5 V ±5% (4.75–5.25 V) - compatible with standard TTL/CMOS logic rails |
| Output drive capability | 10 LS-TTL loads per output - sufficient for fanout into multiple downstream gates |
| Rise/fall time | 2.0–2.5 ns (tOR/tOF) - supports high-speed digital timing without excessive jitter |
| Power-up time | <100 ms - enables reliable initialization in power-cycled systems |
Pinout & Package
DS1135Z-10/TR is housed in an 8-pin SOIC (150-mil) surface-mount package, RoHS-compliant and compatible with vapor phase, IR, and wave soldering processes.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2, 3 (IN1–IN3) | Independent digital input signals | Accept CMOS/TTL-level inputs; each drives one dedicated delay path |
| 4 (GND) | Ground reference | Primary return path for supply and signal currents; requires low-impedance PCB connection |
| 5 (VCC) | +5 V power supply | Must be decoupled locally with 0.1 µF ceramic capacitor to suppress switching noise |
| 6–8 (OUT1–OUT3) | Buffered delay outputs | Provide 10 ns delayed copies of IN1–IN3 respectively; each capable of driving 10 LS loads |
Key Features
| Feature | Design Value |
|---|---|
| All-silicon construction | Eliminates quartz aging, shock sensitivity, and frequency drift-ideal for long-life embedded systems |
| Leading and trailing edge precision | Maintains input waveform symmetry (duty cycle integrity) across all three delays-critical for clock/data recovery |
| Three independent buffered delays | Enables parallel timing correction without inter-channel crosstalk or skew accumulation |
| Voltage- and temperature-stable delay | ±1.5 ns variation over full industrial range ensures consistent timing in variable environmental conditions |
| Standard SOIC-8 footprint | Direct drop-in replacement for DS1013/DS1035 in existing 150-mil SOIC layouts-no PCB redesign required |
Applications
| Industrial PLC Timing | Digital Test Equipment |
|---|---|
Use Scenario: Synchronizing I/O scan cycles and interrupt response windows in programmable logic controllers. IC Role / Device Role / Timing Role: DS1135Z-10/TR provides matched 10 ns delays to align sensor sampling clocks with actuator enable signals. Use Value: Eliminates setup/hold violations between field I/O and CPU bus interfaces, improving deterministic real-time performance. |
Use Scenario: Calibrating signal path skew in automated test equipment (ATE) channel cards. IC Role / Device Role / Timing Role: DS1135Z-10/TR delivers three identical delays to equalize propagation through parallel DUT interface lines. Use Value: Enables sub-nanosecond channel-to-channel timing alignment for high-accuracy parametric measurements. |
| High-Speed Data Acquisition | Communication Interface Deskewing |
Use Scenario: Compensating for trace-length mismatch in multi-channel ADC front-ends. IC Role / Device Role / Timing Role: DS1135Z-10/TR applies uniform 10 ns delay to clock or sample-enable lines feeding parallel ADCs. Use Value: Ensures simultaneous sampling across channels, preserving phase coherence in wideband digitization. |
Use Scenario: Aligning parallel data lanes (e.g., LVDS or CMOS) in FPGA-to-FPGA or processor-to-peripheral links. IC Role / Device Role / Timing Role: DS1135Z-10/TR introduces controlled delay on faster lanes to match slower ones. Use Value: Restores byte-wide data eye alignment at receiver, increasing timing margin without reducing data rate. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 3-channel fixed-delay applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| DS1135M-10 | DIP-8 package; same 10 ns delay, ±1.0 ns initial tolerance, and -40°C to +85°C rating | Through-hole mounting only; unsuitable for high-density SMT production | Select when manual assembly, prototyping, or socket-based testing is required |
| DS1135U-10 | µSOP-8 (118-mil) package; identical electrical specs but smaller footprint and tighter thermal resistance | Higher board density and improved thermal performance; requires fine-pitch reflow process | Select for space-constrained designs where miniaturization and thermal efficiency outweigh assembly complexity |
Compared with DS1135M-10 and DS1135U-10, the DS1135Z-10/TR offers the optimal balance of SMT manufacturability, thermal performance, and layout compatibility-retaining the industry-standard 150-mil SOIC footprint while delivering the same precision delay and industrial temperature support.
Availability
DS1135Z-10/TR is available at Aetrix Electronics and suitable for industrial automation, test instrumentation, and high-reliability data acquisition systems requiring stable component supply, long-term lifecycle support, and guaranteed traceability.
Supply support for DS1135Z-10/TR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (acquired by Analog Devices in 2021) is a global semiconductor company specializing in analog, mixed-signal, and high-performance timing solutions for industrial, automotive, and communications markets.
The DS1135 series belongs to Maxim's precision timing portfolio, designed specifically to replace aging discrete or crystal-based delay solutions with robust, temperature-stable, all-silicon alternatives for deterministic digital signal conditioning.
FAQ
What is the operating temperature range for DS1135Z-10/TR?
The DS1135Z-10/TR is rated for industrial operation from -40°C to +85°C. This range is confirmed in the Absolute Maximum Ratings and AC Electrical Characteristics tables, and applies to all delay accuracy specifications including the ±1.5 ns tolerance over temperature and voltage. The device maintains full functionality and parameter compliance across this entire range without derating.
Does DS1135Z-10/TR support 3.3 V operation?
No, DS1135Z-10/TR is specified exclusively for +5 V operation (4.75 V–5.25 V). For 3 V-compatible alternatives, Dallas Semiconductor explicitly references the DS1135L family in the datasheet - DS1135Z-10/TR lacks design validation, characterization, or guarantee for 3.3 V supply conditions.
Is DS1135Z-10/TR pin-compatible with DS1013 or DS1035?
Yes - DS1135Z-10/TR shares identical pinout, package dimensions (SOIC-8, 150-mil), and functional interface with DS1013Z and DS1035Z variants. The datasheet states it is a "recommended replacement" and confirms matching IN1–IN3, OUT1–OUT3, VCC, and GND assignments across all three devices.
What load capacitance is used to specify DS1135Z-10/TR timing parameters?
All AC timing parameters for DS1135Z-10/TR - including tPLH, tPHL, tOR, and tOF - are characterized at 15 pF output load capacitance, per the official Test Conditions section. Performance may vary with heavier or lighter loads, and layout-dependent parasitics must be minimized to maintain specified delay accuracy.
Can DS1135Z-10/TR drive standard TTL or CMOS logic directly?
Yes - each output of DS1135Z-10/TR is specified to drive up to 10 LS-TTL loads, and its VOH/VOL levels meet standard TTL and CMOS interface requirements at VCC = 5 V. The device uses buffered CMOS outputs, ensuring compatibility with 74LS, 74HC, and most 5 V microcontroller GPIO inputs without level-shifting.
DS1135Z-10/TR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Bulk
- Product Status:
- Active
- Number of Taps/Steps:
- -
- Function:
- Multiple, NonProgrammable
- Delay to 1st Tap:
- 10ns
- Tap Increment:
- -
- Available Total Delays:
- 10ns
- Number of Independent Delays:
- 3
- Voltage - Supply:
- 4.75V ~ 5.25V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
DS1135Z-10/TR FAQ
1.How can I place an order for DS1135Z-10/TR through Aetrix?
Please submit a Request for Quotation (RFQ) for DS1135Z-10/TR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DS1135Z-10/TR reliable?
The price and inventory of DS1135Z-10/TR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DS1135Z-10/TR is usually 5 days.
3.What payment methods are accepted for DS1135Z-10/TR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DS1135Z-10/TR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DS1135Z-10/TR?
DS1135Z-10/TR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DS1135Z-10/TR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DS1135Z-10/TR?
For technical support, including DS1135Z-10/TR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DS1135Z-10/TR requirements.
6.How does Aetrix verify that DS1135Z-10/TR is sourced from the original manufacturer or authorized distributors?
All DS1135Z-10/TR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DS1135Z-10/TR meets industry standards.
7.What is the process for return or replacement of DS1135Z-10/TR?
All DS1135Z-10/TR units undergo pre-shipment inspection (PSI). If there is an issue with DS1135Z-10/TR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DS1135Z-10/TR part is unused and in its original packaging.
Return procedure for DS1135Z-10/TR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
DS1135Z-10/TR Tags

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Analog Devices Inc.

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Analog Devices Inc.

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Analog Devices Inc.

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Analog Devices Inc.

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Analog Devices Inc.

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Analog Devices Inc.

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Analog Devices Inc.

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Analog Devices Inc.

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Analog Devices Inc.

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