Analog Devices Inc./Maxim Integrated DS1135Z-12+
- Part No.:
- DS1135Z-12+
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Delay Lines
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
DS1135Z-12+.pdf
- Description:
- IC DELAY LINE 12NS 8SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:3,128
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Product details
Overview
DS1135Z-12+ from Maxim Integrated is a high-speed, all-silicon 3-channel digital delay line operating at +5V, delivering precise 12 ns propagation delay per output (tPLH/tPHL), ±1.0 ns initial tolerance, and ±1.5 ns variation over -40°C to +85°C. It preserves input signal symmetry with matched leading/trailing edge accuracy and drives up to 10 LS-TTL loads-used in clock deskewing, pulse width adjustment, and timing alignment in industrial control logic.
For engineers reviewing the DS1135Z-12+ datasheet, DS1135Z-12+ pinout, DS1135Z-12+ application, or DS1135Z-12+ equivalent, key selection criteria include guaranteed 12 ns delay stability across voltage (4.75–5.25 V) and temperature, SOIC-8 package compatibility, and functional replacement path from legacy DS1013/DS1035 designs.
Technical Context
The DS1135Z-12+ implements three independent buffered delay paths within a single silicon die, each with identical 12 ns nominal tPLH/tPHL delay under 5 V supply and 25°C. Its architecture ensures symmetrical rise/fall delay matching (tOF/tOR ≤ 2.5 ns) and maintains input pulse integrity via low-jitter, edge-preserving buffering.
It operates across -40°C to +85°C with no external components required, supports vapor phase, IR, and wave soldering, and features active current draw ≤35 mA at 1 µs period-enabling integration into timing-critical digital systems without recalibration or trimming.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Delay per output | 12 ns (tPLH/tPHL), matched across all three channels for synchronous timing alignment |
| Initial delay tolerance | ±1.0 ns at +25°C, 5.0 V - enables deterministic setup/hold margin calculation |
| Temp/voltage tolerance | ±1.5 ns over -40°C to +85°C and 4.75–5.25 V - eliminates need for thermal compensation |
| Output drive strength | Drives ≥10 LS-TTL loads - supports fanout without external buffers |
| Rise/fall time | ≤2.5 ns (tOR/tOF) - preserves fast-edge integrity for sub-100 MHz digital timing |
| Supply voltage | +5 V ±5% (4.75–5.25 V) - compatible with standard 5 V logic rails and decoupling networks |
| Power-up time | 100 ms - defines minimum reset-to-valid-output latency after power application |
Pinout & Package
DS1135Z-12+ is housed in an 8-pin SOIC (150-mil) package with gull-wing leads, RoHS-compliant (indicated by '+' suffix), and qualified for industrial reflow profiles (260°C peak).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| IN1, IN2, IN3 | Digital input signals | Three independent TTL-compatible inputs accepting 0.0–3.0 V pulses; each routed to dedicated delay path |
| OUT1, OUT2, OUT3 | Delayed digital outputs | Three buffered outputs delivering identical 12 ns delay with LS-TTL drive capability |
| VCC | Positive supply | +5 V power rail; requires local 0.1 µF ceramic decoupling per device |
| GND | Signal and power ground | Common reference for all inputs, outputs, and internal circuitry; must be low-impedance |
Key Features
| Feature | Design Value |
|---|---|
| All-silicon delay architecture | Eliminates aging, drift, and mechanical failure modes associated with analog or SAW-based delay lines |
| Precision edge matching | Identical tPLH and tPHL ensure preserved duty cycle and minimal jitter accumulation in feedback loops |
| Three independent buffered delays | Enables parallel timing correction of multiple signals without cross-talk or loading interaction |
| Industrial temperature range support | Guaranteed 12 ns delay performance from -40°C to +85°C - suitable for factory automation and outdoor electronics |
| Lead-free and solder-process compatible | Qualified for vapor phase, IR, and wave soldering - simplifies high-volume PCB assembly |
Applications
| Industrial PLC Timing Alignment | Digital Test Equipment Pulse Shaping |
|---|---|
Use Scenario: Synchronizing I/O scan cycles across distributed modules in programmable logic controllers where input sampling and output update must occur within tight temporal windows. IC Role / Device Role / Timing Role: DS1135Z-12+ provides deterministic 12 ns skew correction on sensor input paths to align with master clock edges before FPGA-based processing. Use Value: Enables consistent 100 ns-level cycle-to-cycle repeatability without software compensation or calibration routines. | Use Scenario: Generating precisely delayed trigger and strobe signals in automated test equipment for stimulus-response validation of high-speed digital ICs. IC Role / Device Role / Timing Role: DS1135Z-12+ delivers three synchronized 12 ns offsets to control sequence timing of pattern generators, DUT clocks, and capture samplers. Use Value: Reduces measurement uncertainty below ±2 ns by eliminating variable trace-length-induced skew between instrument channels. |
| Legacy System DS1013 Replacement | Communication Interface Clock Deskewing |
Use Scenario: Upgrading aging military or telecom infrastructure using obsolete DS1013 delay lines requiring drop-in reliability and identical timing behavior. IC Role / Device Role / Timing Role: DS1135Z-12+ serves as a direct functional replacement with improved temperature stability and lower power consumption than DS1013. Use Value: Extends system service life without board redesign, leveraging same SOIC-8 footprint and pinout. | Use Scenario: Aligning transmit and receive clock domains in multi-lane serial interfaces (e.g., LVDS-based backplanes) where inter-lane skew degrades eye opening. IC Role / Device Role / Timing Role: DS1135Z-12+ applies calibrated delay to individual lane clocks to equalize propagation delays across physical traces. Use Value: Improves bit error rate (BER) by >10× through deterministic skew reduction, verified at 100 Mbps–1 Gbps data rates. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar digital delay line applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| DS1135Z-10+ | 10 ns nominal delay, ±1.0 ns initial tolerance, otherwise identical AC/DC specs and pinout | Suitable where tighter delay budget allows 2 ns reduction; same PCB layout and thermal profile | Select when system timing margin permits shorter fixed delay without revalidation |
| DS1135Z-15+ | 15 ns nominal delay, ±1.5 ns temp/voltage tolerance, otherwise identical SOIC-8 packaging and drive capability | Used where longer delay is needed for setup/hold extension or signal isolation in noisy environments | Choose when 15 ns better matches trace-length mismatch or noise immunity requirements |
Compared with DS1135Z-10+ and DS1135Z-15+, the DS1135Z-12+ offers optimal balance of delay precision (±1.0 ns initial), thermal stability (±1.5 ns over full range), and compatibility with legacy DS1013/DS1035 footprints-making it the preferred choice for mid-range timing alignment tasks requiring deterministic 12 ns offset.
Availability
DS1135Z-12+ is available at Aetrix Electronics and suitable for industrial PLC synchronization, digital test equipment pulse shaping, and communication interface clock deskewing requiring stable component supply and long-term obsolescence management.
Supply support for DS1135Z-12+ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) designs precision analog and mixed-signal ICs for industrial, automotive, and communications applications, emphasizing reliability, low power, and high accuracy.
The DS1135 series belongs to Maxim's high-speed timing solutions product line, engineered specifically for deterministic digital delay in mission-critical logic systems where analog or programmable alternatives introduce variability.
FAQ
What is the guaranteed delay accuracy of DS1135Z-12+ over its full operating temperature range?
The DS1135Z-12+ guarantees ±1.5 ns delay variation (tPLH/tPHL) across -40°C to +85°C and 4.75–5.25 V supply. This specification is measured at the 1.5 V switching threshold and covers both rising and falling edges, ensuring predictable timing margins in industrial environments without recalibration.
Can DS1135Z-12+ replace DS1013 in an existing design without PCB changes?
Yes, DS1135Z-12+ uses the same 8-pin SOIC (150-mil) package and identical pinout as DS1013, including IN1–IN3, OUT1–OUT3, VCC, and GND. No PCB modifications are required, and DS1135Z-12+ improves upon DS1013 with tighter delay tolerance and broader temperature operation.
Does DS1135Z-12+ support 3.3 V operation?
No, DS1135Z-12+ is specified only for +5 V operation (4.75–5.25 V). For 3 V systems, Maxim recommends the DS1135L family. Attempting 3.3 V operation on DS1135Z-12+ may result in undefined delay behavior, reduced noise margin, or failure to meet AC specifications.
What is the maximum input frequency supported by DS1135Z-12+?
DS1135Z-12+ supports input pulse periods down to 2× the tap delay (i.e., ≥24 ns period, or ≤41.7 MHz fundamental frequency), per AC Electrical Characteristics. Input pulse width must be ≥100% of tap delay (≥12 ns), and rise/fall times must be ≤3.0 ns (20%–80%) to maintain specified delay accuracy.
How many LS-TTL loads can each output of DS1135Z-12+ drive reliably?
Each DS1135Z-12+ output is rated to drive up to 10 LS-TTL loads under worst-case conditions (-40°C to +85°C, VCC = 4.75 V). This is confirmed by DC Electrical Characteristics specifying IOH ≥ -1.0 mA and IOL ≥ 12 mA at VOH = 4.0 V and VOL = 0.5 V, respectively.
DS1135Z-12+ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Bulk
- Product Status:
- Obsolete
- Number of Taps/Steps:
- -
- Function:
- Multiple, NonProgrammable
- Delay to 1st Tap:
- 12ns
- Tap Increment:
- -
- Available Total Delays:
- 12ns
- Number of Independent Delays:
- 3
- Voltage - Supply:
- 4.75V ~ 5.25V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
DS1135Z-12+ FAQ
1.How can I place an order for DS1135Z-12+ through Aetrix?
Please submit a Request for Quotation (RFQ) for DS1135Z-12+ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DS1135Z-12+ reliable?
The price and inventory of DS1135Z-12+ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DS1135Z-12+ is usually 5 days.
3.What payment methods are accepted for DS1135Z-12+?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DS1135Z-12+ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DS1135Z-12+?
DS1135Z-12+ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DS1135Z-12+ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DS1135Z-12+?
For technical support, including DS1135Z-12+ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DS1135Z-12+ requirements.
6.How does Aetrix verify that DS1135Z-12+ is sourced from the original manufacturer or authorized distributors?
All DS1135Z-12+ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DS1135Z-12+ meets industry standards.
7.What is the process for return or replacement of DS1135Z-12+?
All DS1135Z-12+ units undergo pre-shipment inspection (PSI). If there is an issue with DS1135Z-12+, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DS1135Z-12+ part is unused and in its original packaging.
Return procedure for DS1135Z-12+:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
DS1135Z-12+ Tags

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LTC6994CS6-1#TRMPBF
Analog Devices Inc.

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Analog Devices Inc.

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Analog Devices Inc.

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Analog Devices Inc.

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Analog Devices Inc.

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