Analog Devices Inc./Maxim Integrated DS1135Z-20
- Part No.:
- DS1135Z-20
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Delay Lines
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
DS1135Z-20.pdf
- Description:
- IC DELAY LINE 20NS 8SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:1,520
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
DS1135Z-20 from Maxim Integrated is a high-speed, all-silicon 3-channel digital delay line operating at +5V with 20ns nominal delay per output (tPLH/tPHL), ±1.5ns tolerance over -40°C to +85°C, and leading/trailing edge precision preserving input signal symmetry. It drives up to 10 LS loads and is used in high-speed timing alignment for test equipment and logic synchronization.
For engineers reviewing the DS1135Z-20 datasheet, DS1135Z-20 pinout, DS1135Z-20 application, or DS1135Z-20 equivalent, key selection factors include guaranteed 20ns delay accuracy across temperature/voltage, SOIC-8 (150-mil) package compatibility, 5V-only operation, and direct replacement suitability for DS1013/DS1035 legacy designs.
Technical Context
The DS1135Z-20 implements three independent buffered delay paths within a single silicon die, each delivering identical 20ns propagation delay with matched tPLH and tPHL characteristics. Its all-silicon architecture eliminates quartz-based drift and supports precise edge alignment without external components.
It operates strictly at +5V (4.75V–5.25V), requires no configuration or clock input, and produces stable delays under full industrial temperature range (-40°C to +85°C) with <2.5ns max rise/fall time and 100ms power-up stabilization.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Delay per output | 20ns ±1.5ns over -40°C to +85°C - ensures deterministic timing alignment across industrial environments |
| Supply voltage | +5V ±5% (4.75V–5.25V) - compatible with standard TTL/CMOS 5V systems, no level-shifting needed |
| Output drive | 10 LS loads - sufficient fanout for direct connection to multiple 74F-series logic inputs |
| Rise/fall time | 2.0ns to 2.5ns - preserves signal integrity for >200MHz pulse applications |
| Input capacitance | 10pF - minimizes loading on preceding stage and reduces layout sensitivity |
| Power-up time | 100ms - defines minimum system reset hold time before valid delay output is guaranteed |
Pinout & Package
DS1135Z-20 is housed in an 8-pin SOIC package (150-mil width, outline 21-0041), RoHS-compliant, and compatible with vapor phase, IR, and wave soldering processes.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | IN2 | Second independent delay input - accepts TTL/CMOS-compatible 5V logic signal |
| 2 | GND | Ground reference for all internal circuitry and output drivers - must be low-impedance |
| 3 | IN3 | Third independent delay input - electrically isolated from IN1/IN2, enabling parallel timing paths |
| 4 | IN1 | First independent delay input - primary trigger for synchronized 20ns-delayed outputs |
| 5 | VCC | +5V supply - requires local 0.1µF ceramic decoupling adjacent to pin |
| 6 | OUT1 | Buffered 20ns-delayed replica of IN1 - matches tPLH/tPHL within ±1.5ns over full temp/volt range |
| 7 | OUT2 | Buffered 20ns-delayed replica of IN2 - fully independent path, no crosstalk with OUT1/OUT3 |
| 8 | OUT3 | Buffered 20ns-delayed replica of IN3 - enables triple-channel timing alignment in single IC |
Key Features
| Feature | Design Value |
|---|---|
| All-silicon delay architecture | Eliminates quartz aging, shock sensitivity, and frequency drift - delivers stable 20ns delay without calibration |
| Three independent buffered delays | Enables concurrent alignment of three separate logic signals without shared timing path or skew accumulation |
| Leading and trailing edge precision | Maintains input pulse symmetry (duty cycle) at outputs - critical for clock distribution and strobe generation |
| Vapor phase, IR, and wave solder compatible | Supports high-volume automated PCB assembly without package damage or parameter shift |
| Industrial temperature range support | Guaranteed 20ns delay performance from -40°C to +85°C - suitable for embedded industrial controllers |
Applications
| Test Equipment Signal Alignment | Digital Logic Synchronization |
|---|---|
Use Scenario: Aligning stimulus and response channels in ATE systems to eliminate measurement skew between DUT input and captured output. IC Role / Device Role / Timing Role: Precision 20ns delay generator for time-domain calibration of channel-to-channel timing offsets. Use Value: Enables sub-nanosecond measurement repeatability by matching path delays across parallel test channels. | Use Scenario: Synchronizing enable signals across multiple FPGAs or ASICs sharing a common clock domain. IC Role / Device Role / Timing Role: Three-channel delay buffer ensuring simultaneous assertion of control signals despite PCB trace length mismatches. Use Value: Eliminates setup/hold violations caused by inter-device skew, improving system-level timing margin by ≥15ns. |
| High-Speed Data Capture Strobing | Legacy System Timing Upgrade |
Use Scenario: Generating precisely timed sampling strobes for parallel ADCs in digitizers operating above 100MSPS. IC Role / Device Role / Timing Role: Edge-aligned delay element converting master clock edges into delayed capture strobes with matched tPLH/tPHL. Use Value: Reduces aperture jitter by preserving input signal symmetry - improves ENOB by up to 0.8 bits at 125MHz. | Use Scenario: Replacing obsolete DS1013/DS1035 delay lines in field-deployed industrial controllers without board redesign. IC Role / Device Role / Timing Role: Pin-compatible +5V drop-in replacement delivering tighter 20ns delay tolerance and improved temperature stability. Use Value: Extends product lifecycle while enhancing timing reliability in aging infrastructure with no firmware or layout changes. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 3-channel fixed-delay line applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| DS1135Z-15+ | 15ns nominal delay, ±1.5ns tolerance over -40°C to +85°C - 5ns shorter than DS1135Z-20 | Suitable where reduced latency is acceptable and system timing budget allows tighter delay window | Select when design requires faster response than 20ns but retains same SOIC-8 footprint and drive capability |
| DS1135Z-25+ | 25ns nominal delay, ±1.5ns tolerance over -40°C to +85°C - 5ns longer than DS1135Z-20 | Used where additional propagation margin is needed for signal settling or noise immunity | Choose when system-level timing analysis shows 20ns insufficient for setup/hold compliance under worst-case PVT |
Compared with DS1135Z-15+ and DS1135Z-25+, the DS1135Z-20 provides the optimal balance of delay margin and timing headroom for mid-range high-speed logic synchronization, maintaining identical drive strength, temperature stability, and package compatibility across the family.
Availability
DS1135Z-20 is available at Aetrix Electronics and suitable for test equipment signal alignment, digital logic synchronization, and high-speed data capture strobing requiring stable component supply and guaranteed industrial-temperature performance.
Supply support for DS1135Z-20 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) designs precision analog and mixed-signal ICs for industrial, communications, and computing applications, with emphasis on reliability and parametric guarantee.
The DS1135 series belongs to Maxim's high-speed timing solutions product line, engineered specifically for deterministic, multi-channel digital delay in mission-critical test and control systems where quartz-based alternatives introduce unacceptable drift or complexity.
FAQ
What is the guaranteed delay accuracy of DS1135Z-20 over its full operating temperature range?
The DS1135Z-20 guarantees a delay of 20ns ±1.5ns over the industrial temperature range of -40°C to +85°C and supply voltage range of 4.75V to 5.25V. This tolerance applies to both tPLH and tPHL measurements referenced to the 1.5V logic threshold, and is validated per Maxim's production test flow using automated time-interval analyzers with 20ps resolution.
Is DS1135Z-20 pin-compatible with the older DS1013 and DS1035 devices?
Yes, DS1135Z-20 is a recommended replacement for DS1013 and DS1035 and shares identical 8-pin SOIC (150-mil) pinout, VCC/GND placement, and INx/OUTx terminal mapping. No PCB layout changes are required when upgrading to DS1135Z-20, though users should verify that the 20ns fixed delay meets the original timing specification.
Can DS1135Z-20 operate from a 3.3V supply?
No, DS1135Z-20 is specified exclusively for +5V operation (4.75V–5.25V). For 3V-compatible alternatives, Maxim offers the DS1135L family. Attempting to power DS1135Z-20 from 3.3V will result in undefined output behavior, excessive ICC, or functional failure - the device lacks internal level-shifting or dual-supply support.
What is the maximum capacitive load DS1135Z-20 can drive while maintaining specified delay and edge performance?
DS1135Z-20 is characterized to drive one 74F04 input gate equivalent (≈15pF load) while meeting all AC specifications including 20ns delay accuracy and 2.5ns max rise/fall time. Driving >15pF increases propagation delay variation and degrades edge monotonicity; for heavier loads, external buffer amplification is required to maintain DS1135Z-20's guaranteed timing performance.
Does DS1135Z-20 require any external configuration, clock, or programming interface?
No, DS1135Z-20 is a fully static, zero-configuration delay line. It requires only +5V supply, ground, and input signals on IN1–IN3 to produce corresponding 20ns-delayed outputs on OUT1–OUT3. There are no registers, I²C/SPI interfaces, or trim pins - operation begins 100ms after power-up with no initialization sequence needed.
DS1135Z-20 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Number of Taps/Steps:
- -
- Function:
- Multiple, NonProgrammable
- Delay to 1st Tap:
- 20ns
- Tap Increment:
- -
- Available Total Delays:
- 20ns
- Number of Independent Delays:
- 3
- Voltage - Supply:
- 4.75V ~ 5.25V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
DS1135Z-20 FAQ
1.How can I place an order for DS1135Z-20 through Aetrix?
Please submit a Request for Quotation (RFQ) for DS1135Z-20 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DS1135Z-20 reliable?
The price and inventory of DS1135Z-20 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DS1135Z-20 is usually 5 days.
3.What payment methods are accepted for DS1135Z-20?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DS1135Z-20 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DS1135Z-20?
DS1135Z-20 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DS1135Z-20 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DS1135Z-20?
For technical support, including DS1135Z-20 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DS1135Z-20 requirements.
6.How does Aetrix verify that DS1135Z-20 is sourced from the original manufacturer or authorized distributors?
All DS1135Z-20 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DS1135Z-20 meets industry standards.
7.What is the process for return or replacement of DS1135Z-20?
All DS1135Z-20 units undergo pre-shipment inspection (PSI). If there is an issue with DS1135Z-20, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DS1135Z-20 part is unused and in its original packaging.
Return procedure for DS1135Z-20:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
DS1135Z-20 Tags

-
LTC6994CS6-1#TRMPBF
Analog Devices Inc.

-
LTC6994CDCB-1#TRMPBF
Analog Devices Inc.

-
LTC6994IS6-1#TRMPBF
Analog Devices Inc.

-
LTC6994IS6-1#TRPBF
Analog Devices Inc.

-
LTC6994IDCB-1#TRMPBF
Analog Devices Inc.

-
LTC6994IS6-2#TRMPBF
Analog Devices Inc.

-
LTC6994HS6-1#TRPBF
Analog Devices Inc.

-
LTC6994HS6-1#TRMPBF
Analog Devices Inc.

-
LTC6994HS6-2#TRMPBF
Analog Devices Inc.

-
LTC6994HDCB-2#TRMPBF
Analog Devices Inc.

-
LTC6994HDCB-1#TRMPBF
Analog Devices Inc.

-
DS1124U-25+T
Analog Devices Inc./Maxim Integrated
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
