Analog Devices Inc./Maxim Integrated DS1135Z-25
- Part No.:
- DS1135Z-25
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Delay Lines
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
DS1135Z-25.pdf
- Description:
- IC DELAY LINE 25NS 8SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:5,045
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Product details
Overview
DS1135Z-25 from Maxim Integrated is a high-speed, all-silicon 3-channel logic delay line operating at +5V, delivering precise 25ns propagation delay per output (tPLH/tPHL) with ±1.5ns initial tolerance and ±2ns tolerance over -40°C to +85°C. It preserves input signal symmetry via leading/trailing edge accuracy and drives up to 10 LS TTL loads. Used in high-reliability timing alignment for digital test equipment.
For engineers reviewing the DS1135Z-25 datasheet, DS1135Z-25 pinout, DS1135Z-25 application, or DS1135Z-25 equivalent, key selection criteria include guaranteed 25ns delay stability across voltage (4.75–5.25V) and temperature, SOIC-8 package compatibility, and direct replacement capability for legacy DS1013/DS1035 designs requiring sub-ns edge precision.
Technical Context
The DS1135Z-25 implements three independent buffered delay paths in a single monolithic silicon circuit, each with matched tPLH and tPHL characteristics. Its architecture eliminates analog drift and mechanical aging inherent in LC or SAW-based delay solutions.
It operates with 50Ω source impedance, 15pF load capacitance, and 1.5V switching threshold-fully specified under IEEE 488-controlled automated test conditions using 20ps-resolution time interval analysis. Power-up stabilization completes within 100ms.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Delay per output | 25ns ±1.5ns (initial), ±2ns (-40°C to +85°C) - ensures deterministic timing alignment across industrial temperature range |
| Supply voltage | +5V ±5% (4.75–5.25V) - compatible with standard 5V logic rails without regulation overhead |
| Input/output edge accuracy | Matched tPLH/tPHL - preserves input duty cycle and signal symmetry for clock/data recovery |
| Output drive strength | 12mA sink / -1mA source at VOH=4V/VOL=0.5V - supports direct interfacing to 74F04-level TTL loads |
| Input capacitance | 10pF max - minimizes loading on upstream drivers and maintains signal integrity at high frequencies |
| Power-up time | 100ms - defines minimum reset-to-stable-delay interval after VCC application |
Pinout & Package
DS1135Z-25 is housed in an 8-pin SOIC (150-mil) package, RoHS-compliant, vapor-phase, IR, and wave solderable.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| IN1, IN2, IN3 | Digital input signals | Three independent TTL-compatible inputs accepting 0.0–3.0V pulses; each routed to dedicated delay path |
| OUT1, OUT2, OUT3 | Delayed logic outputs | Buffered outputs delivering identical 25ns delay with matched rise/fall times (2.0–2.5ns) |
| VCC | Positive supply | +5V power rail connection; requires local 0.1µF decoupling per device |
| GND | Ground reference | Common return for all inputs, outputs, and internal circuitry; must be low-impedance |
Key Features
| Feature | Design Value |
|---|---|
| All-silicon construction | Eliminates aging, humidity sensitivity, and thermal hysteresis found in analog delay elements |
| Precision edge matching | tPLH = tPHL within specification - enables zero-jitter data retiming in synchronous systems |
| Three independent delays | Single-package integration reduces board area and interconnect skew vs. discrete delay ICs |
| LS-TTL load drive | Each output drives 10 LS-TTL inputs directly - avoids need for external fanout buffers |
Applications
| Automated Test Equipment (ATE) | Digital Signal Integrity Validation |
|---|---|
Use Scenario: Aligning stimulus and response channels in high-speed boundary-scan testers. IC Role / Device Role / Timing Role: Provides deterministic 25ns skew correction between parallel digital I/O lines. Use Value: Enables synchronized sampling of multi-bit bus signals with <±2ns channel-to-channel variation. | Use Scenario: Compensating PCB trace length mismatches in FPGA-to-ADC interfaces. IC Role / Device Role / Timing Role: Introduces calibrated delay to match clock and data path propagation times. Use Value: Restores setup/hold timing margins without modifying layout or adding complex PLL-based deskew. |
| High-Speed Logic Prototyping | Industrial Control Timing Calibration |
Use Scenario: Emulating fixed gate delays during FPGA prototype validation before ASIC tape-out. IC Role / Device Role / Timing Role: Delivers repeatable, temperature-stable 25ns delay for logic path modeling. Use Value: Allows accurate timing closure verification of critical paths under real-world voltage/temperature stress. | Use Scenario: Synchronizing distributed sensor sampling clocks in PLC backplane modules. IC Role / Device Role / Timing Role: Adjusts trigger timing across multiple I/O cards to eliminate jitter-induced measurement scatter. Use Value: Improves repeatability of analog acquisition by aligning sample-and-hold edges to within 2ns. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 3-channel fixed-delay applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| DS1135Z-20+ | 20ns nominal delay, ±1.5ns temp/voltage tolerance | 5ns shorter delay; suitable where tighter timing budget allows reduced skew | Select when system timing margin permits 5ns less delay and identical package/pinout is required |
| DS1135Z-30+ | 30ns nominal delay, ±1.5ns temp/voltage tolerance | 5ns longer delay; used where additional propagation margin is needed for signal settling | Choose when downstream logic requires extended setup time or longer pulse width compliance |
Compared with DS1135Z-20+ and DS1135Z-30+, the DS1135Z-25 offers the median delay value in the family with identical SOIC-8 footprint and electrical interface-enabling drop-in replacement where 25ns precisely matches system-level timing requirements.
Availability
DS1135Z-25 is available at Aetrix Electronics and suitable for automated test equipment, digital signal integrity validation, and industrial control timing calibration requiring stable component supply and guaranteed long-term availability.
Supply support for DS1135Z-25 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) designs precision analog and mixed-signal ICs for industrial, communications, and computing applications.
The DS1135 series was developed as a high-reliability, all-silicon replacement for aging discrete and hybrid delay solutions in mission-critical timing alignment systems.
FAQ
What is the guaranteed delay accuracy of DS1135Z-25 over its full operating temperature range?
The DS1135Z-25 guarantees ±2ns delay tolerance over -40°C to +85°C, measured as tPLH and tPHL deviation from nominal 25ns. This includes combined effects of temperature, supply voltage (4.75–5.25V), and process variation. The specification is validated per Maxim's automated test setup using 20ps-resolution time interval analysis.
Can DS1135Z-25 replace DS1013 or DS1035 in existing designs without layout changes?
Yes, DS1135Z-25 is a recommended pin-compatible replacement for DS1013 and DS1035, sharing the same 8-pin SOIC (150-mil) package and identical pin assignment (IN1–IN3, OUT1–OUT3, VCC, GND). No PCB modifications are required, though users should verify 5V supply compatibility since DS1013/DS1035 may have different voltage ranges.
What load capacitance is assumed for DS1135Z-25 AC timing specifications?
DS1135Z-25 AC timing parameters-including tPLH, tPHL, tOR, and tOF-are specified with a 15pF capacitive load at each output, consistent with the equivalent of one 74F04 input gate. Driving heavier loads will increase propagation delay and degrade edge rates beyond datasheet limits.
Does DS1135Z-25 support both rising and falling edge delay matching?
Yes, DS1135Z-25 provides matched tPLH (rising-edge delay) and tPHL (falling-edge delay) within its ±1.5ns initial tolerance and ±2ns full-range tolerance. This edge symmetry preservation ensures minimal duty cycle distortion and is explicitly verified in the device's characterization methodology.
Is DS1135Z-25 compatible with lead-free reflow soldering processes?
Yes, DS1135Z-25 is rated for lead-free reflow soldering at +260°C (per JEDEC J-STD-020), and also supports vapor phase and wave soldering. The "Z" suffix denotes SOIC-150-mil packaging with RoHS-compliant terminations, confirmed in Maxim's package documentation.
DS1135Z-25 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Discontinued at Digi-Key
- Number of Taps/Steps:
- -
- Function:
- Multiple, NonProgrammable
- Delay to 1st Tap:
- 25ns
- Tap Increment:
- -
- Available Total Delays:
- 25ns
- Number of Independent Delays:
- 3
- Voltage - Supply:
- 4.75V ~ 5.25V
- Operating Temperature:
- -
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
DS1135Z-25 FAQ
1.How can I place an order for DS1135Z-25 through Aetrix?
Please submit a Request for Quotation (RFQ) for DS1135Z-25 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DS1135Z-25 reliable?
The price and inventory of DS1135Z-25 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DS1135Z-25 is usually 5 days.
3.What payment methods are accepted for DS1135Z-25?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DS1135Z-25 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DS1135Z-25?
DS1135Z-25 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DS1135Z-25 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DS1135Z-25?
For technical support, including DS1135Z-25 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DS1135Z-25 requirements.
6.How does Aetrix verify that DS1135Z-25 is sourced from the original manufacturer or authorized distributors?
All DS1135Z-25 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DS1135Z-25 meets industry standards.
7.What is the process for return or replacement of DS1135Z-25?
All DS1135Z-25 units undergo pre-shipment inspection (PSI). If there is an issue with DS1135Z-25, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DS1135Z-25 part is unused and in its original packaging.
Return procedure for DS1135Z-25:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
DS1135Z-25 Tags

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Analog Devices Inc.

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Analog Devices Inc.

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Analog Devices Inc.

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Analog Devices Inc.

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Analog Devices Inc.

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Analog Devices Inc.

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Analog Devices Inc.

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