Analog Devices Inc./Maxim Integrated DS1231-35/G
- Part No.:
- DS1231-35/G
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Supervisors
- Package:
- 8-DIP (0.300", 7.62mm)
- Datasheet:
-
DS1231-35/G.pdf
- Description:
- IC SUPERVISOR 1 CHANNEL 8DIP
- Quantity:
- Payment:

- Shipping:

Inventory:2,498
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
DS1231-35/G from Maxim Integrated (now Analog Devices) is a precision power monitor IC designed to detect impending power failure and initiate orderly processor shutdown before VCC drops below 4.25V (–35% tolerance), provide non-maskable interrupt signaling via high-impedance or current-source input modes, and deliver dual active-high/active-low reset outputs with 150ms power-up delay. It operates at +5V supply, supports linear or switching power supplies, and requires no external capacitors.
For engineers reviewing the DS1231-35/G datasheet, DS1231-35/G pinout, DS1231-35/G application, or DS1231-35/G equivalent, key selection considerations include its dual VCC trip thresholds (4.25V/4.50V selectable via TOL pin), NMI generation timing (≤200µs after input threshold breach), RST/RST output drive capability (2.0mA sink, open-drain RST), and compatibility with opto-isolated or resistor-divider high-voltage sensing interfaces.
Technical Context
The DS1231-35/G integrates two independent comparators: one monitors VCC against a temperature-compensated reference to generate RST and RST signals at precise thresholds (4.25V ±0.12V when TOL=VCC), while the second monitors the IN pin using MODE-selectable input characteristics-high-impedance (≤0.1µA leakage) for resistor-divider AC-line sensing or 30µA current-source mode for opto-isolator interfacing with VTP+ = 2.5V.
Its internal digital sampler and delay logic ensure noise-immune operation with 60mV hysteresis on both comparators, and power-up reset timing guarantees ≥150ms RST assertion regardless of VCC slew rate. The device delivers simultaneous NMI and reset signals with defined propagation delays: tIPD ≤1.1µs (IN→NMI), tRPD ≤100ns (VCC detect→RST), and tRPU = 150–1000ms (VCC stable→RST release).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Trip Threshold | 4.25V (±0.12V) when TOL tied to VCC - enables early warning before 5V rail collapse in systems requiring –35% margin. |
| IN Pin Mode | MODE=VCC: high-impedance input (≤0.1µA); MODE=GND: 30µA current source - selects interface method for AC-line or isolated sensing. |
| NMI Propagation Delay | tIPU ≤200µs - ensures timely processor alert before hold-up time exhaustion. |
| RST Output Type | Push-pull active-high; RST open-drain active-low - supports direct µP reset and flexible pull-up design. |
| Power-Up Reset Duration | tRPU = 150–1000ms - holds processor in reset until VCC stabilizes post-power-on. |
| Operating Current | ICC = 0.5–2.0mA - low quiescent draw suitable for always-on monitoring in embedded systems. |
| Input Hysteresis | 60mV on both VCC and IN comparators - prevents false triggering during noisy or slowly decaying supply conditions. |
Pinout & Package
DS1231-35/G is supplied in an 8-pin DIP package (300 mil width) with through-hole mounting. Pin 1 is IN (voltage sense input), Pin 2 is MODE (input configuration select), Pin 3 is TOL (VCC threshold select), Pin 4 is GND, Pin 5 is RST (active-high reset), Pin 6 is RST (active-low open-drain reset), Pin 7 is NMI (non-maskable interrupt), and Pin 8 is VCC (+5V supply). Pins labeled NC are unconnected.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| IN (Pin 1) | Voltage sense input | Accepts high-voltage derived signal (≤5V) for early power-loss detection; MODE pin configures as high-Z or 30µA current source. |
| MODE (Pin 2) | Input mode selector | Tied to VCC for high-impedance sensing (e.g., resistor divider from AC line); tied to GND for current-source mode (e.g., opto-isolator interface). |
| TOL (Pin 3) | VCC threshold select | Tied to GND for 4.50V trip (–10%); tied to VCC for 4.25V trip (–35%) - sets reset activation point relative to nominal 5V. |
| GND (Pin 4) | Ground reference | Common return for all analog and digital circuitry; must be low-impedance connection to system ground plane. |
| RST (Pin 5) | Active-high reset output | Push-pull CMOS output; asserts high during power-up and power-down events to halt processor execution. |
| RST (Pin 6) | Active-low open-drain reset | Requires external pull-up; provides compatible reset signal for legacy µPs needing active-low assertion. |
| NMI (Pin 7) | Non-maskable interrupt | Open-drain output; signals imminent power loss to processor for immediate software-initiated shutdown sequence. |
| VCC (Pin 8) | +5V supply input | Operates from 4.5–5.5V; powers internal reference, comparators, and output drivers; includes built-in power-up reset timer. |
Key Features
| Feature | Design Value |
|---|---|
| Dual VCC trip thresholds | Selectable 4.25V (–35%) or 4.50V (–10%) via TOL pin - matches system hold-up time requirements without external components. |
| Configurable IN pin interface | High-Z or 30µA current-source input - enables direct AC-line monitoring or UL-approved opto-isolation without added bias circuitry. |
| No external capacitors required | Integrated timing and reference - eliminates BOM cost and layout area for reset timing caps, improving reliability and reducing footprint. |
| Simultaneous NMI and reset outputs | Guaranteed tIPU ≤200µs and tRPD ≤100ns - gives processor maximum time to save state before forced reset. |
| Temperature-compensated reference | Stable 5% or 10% VCC monitoring across 0°C to 70°C - ensures consistent trip points despite ambient thermal variation. |
Applications
| Industrial PLC Power Supervision | Medical Device UPS Handoff |
|---|---|
Use Scenario: Monitors main AC-derived 5V rail in programmable logic controllers during brownout or grid instability. IC Role / Device Role / Timing Role: Generates NMI at first sign of AC sag (via resistor-divider on rectified line), then asserts RST when VCC falls to 4.25V to force controlled firmware shutdown. Use Value: Prevents corrupted I/O state writes during partial power loss, ensuring deterministic restart and compliance with IEC 61131-2 safety timing requirements. | Use Scenario: Embedded in battery-backed medical imaging equipment to coordinate seamless transition from mains to backup battery. IC Role / Device Role / Timing Role: Detects mains failure via opto-isolated input (MODE=GND), triggers NMI to save volatile acquisition buffers, then halts CPU with RST before battery voltage drops below safe operating level. Use Value: Guarantees zero data loss during 10–50ms hold-up window by aligning NMI timing with actual battery switchover latency. |
| Telecom Line Card Power Monitoring | Automotive Infotainment Head Unit |
Use Scenario: Installed on telecom central office line cards powered by distributed -48V DC supplies converted to +5V. IC Role / Device Role / Timing Role: Uses high-impedance IN pin (MODE=VCC) to monitor intermediate DC bus pre-regulation; asserts NMI when bus sags, then RST at final 4.25V threshold. Use Value: Enables graceful de-registration from network before power collapse, avoiding false alarm floods and service interruption. | Use Scenario: Integrated into automotive infotainment head units with switched-mode 5V supplies subject to load dump transients. IC Role / Device Role / Timing Role: Monitors VCC directly; TOL tied to VCC to trigger RST at 4.25V during transient overvoltage recovery phase. Use Value: Prevents flash memory corruption during ISO 7637-2 pulse 5a/b events by halting MCU before VCC undershoot violates memory write timing. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar power monitor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX690CPA+ | Single 4.65V reset threshold; no NMI output; no MODE-configurable input; requires external capacitor for reset timeout. | Lacks early-warning interrupt capability and high-voltage sensing flexibility - suitable only for basic reset-only use cases. | Select when only VCC supervision is needed and NMI functionality is unnecessary. |
| TPS3823-33DBVR | Fixed 3.08V threshold; no input sense pin; no MODE/TOL pins; push-pull RST only; 200ms min reset timeout. | Designed for low-voltage microcontroller reset only - cannot interface to AC line or isolated inputs; incompatible with 5V systems requiring –35% margin. | Choose for 3.3V systems where simple reset generation suffices and high-voltage monitoring is absent. |
Compared with MAX690CPA+ and TPS3823-33DBVR, the DS1231-35/G uniquely combines dual-threshold VCC monitoring, configurable high-voltage input sensing, and simultaneous NMI/reset signaling - enabling full power-failure response sequences rather than passive reset-only behavior.
Availability
DS1231-35/G is available at Aetrix Electronics and suitable for industrial PLC power supervision, medical device UPS handoff, and telecom line card power monitoring requiring stable component supply and long-term obsolescence management.
Supply support for DS1231-35/G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices (formerly Maxim Integrated) designs high-performance analog, mixed-signal, and power management ICs for precision measurement, industrial control, and reliable system supervision.
The DS1231-35/G belongs to Maxim's legacy power monitoring product line, engineered specifically for systems demanding deterministic power-failure response with early warning, automatic restart, and nonvolatile memory protection in 5V embedded environments.
FAQ
What is the exact VCC trip voltage for DS1231-35/G and how is it selected?
The DS1231-35/G has a nominal VCC trip voltage of 4.25V (–35% of 5V), specified as 4.25V ±0.12V. This threshold is selected by tying the TOL pin to VCC. If TOL is grounded, the trip point shifts to 4.50V (–10%). Both thresholds are internally generated using a temperature-compensated reference, and the DS1231-35/G datasheet confirms this behavior across 0°C to 70°C operating range.
How does the MODE pin affect the IN pin behavior in DS1231-35/G?
When MODE is tied to VCC, the IN pin (Pin 1) becomes a high-impedance input (≤0.1µA leakage), suitable for resistor-divider networks from AC lines or DC rails. When MODE is grounded, IN acts as a 30µA current source with VTP+ = 2.5V, enabling direct connection to opto-isolators. This dual-mode capability is explicitly documented in the DS1231-35/G functional description and timing diagrams.
Does DS1231-35/G require external pull-up resistors, and if so, on which pins?
Yes, DS1231-35/G requires an external pull-up resistor on the RST pin (Pin 6), which is an open-drain output. The RST pin (Pin 5) is push-pull and does not require a pull-up. The NMI pin (Pin 7) is also open-drain and requires its own pull-up. These requirements are stated in the "AC ELECTRICAL CHARACTERISTICS" table and application schematics in the DS1231-35/G datasheet.
What is the guaranteed minimum power-up reset duration for DS1231-35/G?
The DS1231-35/G guarantees a minimum power-up reset duration of 150ms, measured from the time VCC reaches 4.5V until RST is released. This value is specified in the "AC ELECTRICAL CHARACTERISTICS" table under parameter tRPU (min = 150ms, max = 1000ms), and applies across the full 0°C to 70°C temperature range per the DS1231-35/G datasheet.
Can DS1231-35/G monitor voltages higher than 5V, and how is that achieved?
Yes, DS1231-35/G can monitor voltages higher than 5V using external conditioning. When MODE = VCC, the IN pin accepts ≤5V, so a resistor divider scales high-voltage sense points (e.g., rectified AC) to ≤5V while maintaining VTP– = 2.15V for DS1231-35/G. When MODE = GND, a zener diode and opto-isolator interface handles >100V inputs. Both methods are validated in DS1231-35/G application figures 4–7.
DS1231-35/G Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Package/Case:
- 8-DIP (0.300", 7.62mm)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Type:
- Simple Reset/Power-On Reset
- Number of Voltages Monitored:
- 1
- Voltage - Threshold:
- 4.37V, 4.62V
- Output:
- Open Drain or Open Collector
- Reset:
- Active High/Active Low
- Reset Timeout:
- 150ms Minimum
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 8-PDIP
DS1231-35/G FAQ
1.How can I place an order for DS1231-35/G through Aetrix?
Please submit a Request for Quotation (RFQ) for DS1231-35/G on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DS1231-35/G reliable?
The price and inventory of DS1231-35/G are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DS1231-35/G is usually 5 days.
3.What payment methods are accepted for DS1231-35/G?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DS1231-35/G transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DS1231-35/G?
DS1231-35/G orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DS1231-35/G order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DS1231-35/G?
For technical support, including DS1231-35/G datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DS1231-35/G requirements.
6.How does Aetrix verify that DS1231-35/G is sourced from the original manufacturer or authorized distributors?
All DS1231-35/G products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DS1231-35/G meets industry standards.
7.What is the process for return or replacement of DS1231-35/G?
All DS1231-35/G units undergo pre-shipment inspection (PSI). If there is an issue with DS1231-35/G, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DS1231-35/G part is unused and in its original packaging.
Return procedure for DS1231-35/G:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
DS1231-35/G Tags

-
MIC826SYMT-TR
Microchip Technology

-
APX803S-31SA-7
Diodes Incorporated

-
APX803L20-29SA-7
Diodes Incorporated
-
TPS3828-33DBVR
Texas Instruments

-
V6340RSP3B+
EM Microelectronic

-
EM6325CXSP5B-2.9+
EM Microelectronic

-
MCP120T-300I/TT
Microchip Technology

-
MCP130T-315I/TT
Microchip Technology

-
MCP120T-475I/TT
Microchip Technology

-
MCP111T-300E/TT
Microchip Technology

-
MCP120T-315I/TT
Microchip Technology

-
MCP809T-315I/TT
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

