Analog Devices Inc./Maxim Integrated DS1231-50/G

Overview

DS1231-50/G from Maxim Integrated (now Analog Devices) is a precision power monitor IC designed to detect impending power failure and initiate orderly microprocessor shutdown before VCC drops below 4.25 V (–10% threshold with TOL = VCC). It provides dual reset outputs (RST active-high, RST active-low open-drain), NMI interrupt, and configurable input sensing via MODE and TOL pins. Used in industrial control systems with linear or switching supplies requiring nonvolatile memory protection.

For engineers reviewing the DS1231-50/G datasheet, DS1231-50/G pinout, DS1231-50/G application, or DS1231-50/G equivalent, this page delivers verified functional specifications, validated 8-pin DIP package mapping, confirmed ±5% VCC trip accuracy, and real-world interface guidance for AC line monitoring, hold-up time coordination, and non-maskable interrupt generation.

Technical Context

The DS1231-50/G integrates two independent comparators: one monitors VCC against a temperature-compensated reference to generate RST/RST at selectable 5% (4.75 V) or 10% (4.25 V) thresholds, and another monitors high-voltage input (IN) with hysteresis to trigger NMI. The MODE pin selects between high-impedance (2.3 V VTP−) or current-source (30 µA, 2.5 V VTP+) input operation.

Its digital sampler and delay logic ensure deterministic timing: tRPU = 150–1000 ms on power-up, tRPD = 100 ns on VCC drop detection, and tIPD = 1.1 µs from IN threshold crossing to NMI assertion. All outputs are rail-referenced with defined VOL/VOH and drive capability (IOL = 2–3 mA, IOH = 1–2 mA).

Key Specifications

Pinout & Package

DS1231-50/G is supplied in an 8-pin plastic DIP package (300 mil width), RoHS-compliant, with lead finish SnPb (G suffix denotes Pb-free per JEDEC J-STD-609, but datasheet confirms Pb-free plating on this variant).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar power monitor applications.

Compared with MAX690TSA+ and TPS3823-50DBVR, the DS1231-50/G uniquely delivers coordinated NMI-and-reset sequencing, MODE-selectable input interface for transformer or opto-isolated sensing, and adjustable VCC trip - making it irreplaceable for applications demanding deterministic power-fail response with hardware-level memory protection.

Availability

DS1231-50/G is available at Aetrix Electronics and suitable for industrial PLCs, medical UPS interfaces, telecom line cards, and embedded data loggers requiring stable component supply with long-term lifecycle assurance.

Supply support for DS1231-50/G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices (acquired Maxim Integrated in 2021) designs high-performance analog, mixed-signal, and power management ICs for precision industrial, automotive, and communications systems.

The DS1231-50/G belongs to Maxim's legacy Power Monitor family, engineered specifically for fail-safe microprocessor systems where nonvolatile memory integrity depends on deterministic power-fail detection and shutdown sequencing.

FAQ

What is the function of the MODE pin on the DS1231-50/G?

The MODE pin on the DS1231-50/G selects the electrical behavior of the IN pin: when tied to VCC, IN becomes a high-impedance (≤0.1 µA) 2.3 V comparator input ideal for resistor-divider AC sensing; when grounded, IN sources 30 µA at 2.5 V, enabling direct opto-isolator LED drive. This dual-mode capability makes DS1231-50/G adaptable to both transformer-coupled and opto-isolated power-fail detection topologies without external components.

How does the TOL pin affect the reset threshold of the DS1231-50/G?

The TOL pin on the DS1231-50/G determines the VCC trip point: connecting TOL to GND sets a –5% threshold (4.75 V nominal), while connecting TOL to VCC selects a –10% threshold (4.25 V nominal). These values are guaranteed across 0°C to 70°C and reflect actual measured VCCTP min/max ranges (e.g., 4.25–4.49 V for –10%). This selection directly defines the voltage margin at which DS1231-50/G asserts RST and RST to halt processor operation.

Can the DS1231-50/G be used with a 3.3 V microcontroller system?

Yes - the DS1231-50/G operates from 4.5–5.5 V VCC and provides RST as a push-pull 5 V output compatible with 3.3 V logic if interfaced through a level-shifter or voltage divider; RST is open-drain and can be pulled to 3.3 V, making it directly compatible. NMI is also 5 V push-pull but may require clamping or translation depending on the MCU's input tolerance. The DS1231-50/G itself must be powered from a clean 5 V rail, not 3.3 V.

Does the DS1231-50/G require external capacitors for reset timing?

No - the DS1231-50/G contains fully integrated timing, reference, and comparator circuitry. Its power-up reset duration (150–1000 ms) and power-down response (100 ns RST assertion) are internally generated with no external capacitors needed. This eliminates timing drift due to capacitor aging or temperature variation and reduces PCB footprint - a key design advantage confirmed in the DS1231-50/G datasheet's "No external capacitors required" feature statement.

What is the purpose of having both RST and RST outputs on the DS1231-50/G?

The DS1231-50/G provides RST (active-high push-pull) and RST (active-low open-drain) to support diverse reset architectures: RST directly drives standard microprocessor reset inputs requiring active-high assertion, while RST enables wired-OR reset busing, level translation (e.g., pull-up to 3.3 V), or integration into existing open-drain reset networks. Both outputs assert synchronously when VCC crosses the selected threshold, giving designers flexibility without adding discrete logic - a capability explicitly documented in the DS1231-50/G pin description and timing diagrams.