Analog Devices Inc./Maxim Integrated DS1233M-55/T&R
- Part No.:
- DS1233M-55/T&R
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Supervisors
- Package:
- TO-226-3, TO-92-3 (TO-226AA) Formed Leads
- Datasheet:
-
DS1233M-55/T&R.pdf
- Description:
- IC SUPERVISOR 1 CHANNEL TO92-3
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
DS1233M-55/T&R from Maxim Integrated (now Analog Devices) is a precision voltage-monitoring microprocessor supervisory circuit in TO-92 package, providing active-low reset assertion when VCC falls below 4.5 V (min), holding reset for 350 ms (typ) after power recovery, with internal 5 kΩ pullup and -40°C to +85°C operation - used in embedded microcontroller power-up sequencing.
For engineers reviewing the DS1233M-55/T&R datasheet, DS1233M-55/T&R pinout, DS1233M-55/T&R application, or DS1233M-55/T&R equivalent, key selection criteria include trip point accuracy (4.625 V typ), reset timeout stability, TO-92 thermal profile, compatibility with 68XXX/HC16 families, and absence of external timing components.
Technical Context
The DS1233M-55/T&R integrates a temperature-compensated bandgap reference and comparator to detect VCC deviations against a fixed 4.5–4.75 V trip window. Its internal power-fail detection logic asserts RST low within 10 µs of undervoltage onset and sustains it for 200–500 ms after VCC returns to tolerance.
No external capacitor or resistor is required for reset timing; the 350 ms delay is factory-trimmed and stable over temperature. The device supports both power-up and power-down reset generation, with separate slew-rate specifications for rising and falling VCC transitions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Trip Point | 4.5 V (min), 4.625 V (typ), 4.75 V (max) - ensures reliable reset activation before microprocessor brownout |
| Reset Active Time | 200–500 ms - guarantees sufficient stabilization time for CPU and peripheral power rails |
| Operating Temp | -40°C to +85°C - validated for industrial-grade embedded control environments |
| Supply Voltage Range | 1.2 V to 5.5 V - supports wide-input legacy and low-voltage systems without external regulation |
| Output Drive | 8 mA sink capability at 0.4 V - directly interfaces standard TTL/CMOS reset inputs without buffer |
| Internal Pullup | 3.75–6.5 kΩ - eliminates need for external pullup resistor on RST line |
| Power Consumption | 50 µA typical - enables use in battery-backed or ultra-low-power monitoring circuits |
Pinout & Package
DS1233M-55/T&R is supplied in TO-92 package (3-pin, through-hole), with lead finish Pb-free per JEDEC J-STD-020, RoHS-compliant, and moisture sensitivity level MSL1.
| Pin | Circuit Role | Design Meaning |
|---|---|---|
| 1 | RST | Active-low open-drain reset output; requires external pullup if not using internal 5 kΩ resistor |
| 2 | VCC | Primary power supply input; monitored for undervoltage and overvoltage conditions |
| 3 | GND | Reference ground for internal comparator and voltage reference circuitry |
Key Features
| Feature | Design Value |
|---|---|
| Precision voltage trip point | Factory-trimmed 4.625 V typical threshold with ±125 mV tolerance - eliminates manual calibration |
| Fixed reset timeout | 350 ms guaranteed hold time - removes dependency on external RC networks |
| Integrated pullup resistor | 5 kΩ internal pullup - reduces BOM count and PCB footprint by one passive component |
| Microprocessor compatibility | Pin- and function-compatible with MC33064/MC34064 series - enables drop-in replacement in legacy 68XXX designs |
| Temperature compensation | Built-in bandgap reference with ±0.5 % drift over -40°C to +85°C - maintains trip accuracy across operating range |
Applications
| Industrial PLC Control | Legacy Automotive ECU |
|---|---|
Use Scenario: Power sequencing in programmable logic controllers during mains fluctuation or backup battery switchover. IC Role / Device Role / Timing Role: Supervisory circuit asserting reset to halt CPU execution until 5 V rail stabilizes post-recovery. Use Value: Prevents corrupted firmware writes and state machine lockup via deterministic 350 ms reset hold. | Use Scenario: Reset coordination in 16-bit Motorola 68HC11-based engine control units during cold cranking. IC Role / Device Role / Timing Role: Voltage monitor interfacing directly with HC11 RES pin, leveraging pin compatibility with MC34064. Use Value: Eliminates external RC network while maintaining same timing behavior as original design. |
| Medical Diagnostic Instrument | Point-of-Sale Terminal |
Use Scenario: Ensuring safe boot initialization in portable ultrasound devices powered by Li-ion batteries with aging voltage profiles. IC Role / Device Role / Timing Role: Monitors 5 V DC-DC output for brownout events; asserts RST before analog front-end ICs lose regulation. Use Value: Trip point of 4.625 V prevents false resets during transient load dips while catching true undervoltage faults. | Use Scenario: Reliable power-on reset in retail terminals exposed to unregulated AC adapters and frequent plug/unplug cycles. IC Role / Device Role / Timing Role: Standalone reset generator tied to main 5 V rail, driving reset input of ARM Cortex-M0 host MCU. Use Value: Internal 5 kΩ pullup simplifies layout and avoids solder-joint reliability issues from discrete resistors. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microprocessor supervisory applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX691CPA+ | Wider supply range (3 V to 5.5 V); includes watchdog timer and manual reset input | Requires additional PCB space and configuration pins; suited for systems needing fault recovery beyond power monitoring | Select when watchdog functionality or user-initiated reset is required alongside voltage supervision |
| TPS3808G33DBVR | Adjustable trip point (via external resistor); 200 ms min reset timeout; SOT-23-5 package | Not pin-compatible; demands redesign of reset net routing and decoupling layout | Choose for custom trip thresholds or space-constrained designs where TO-92 is unacceptable |
Compared with MAX691CPA+ and TPS3808G33DBVR, DS1233M-55/T&R offers lowest BOM cost and minimal layout impact for fixed 4.625 V reset in legacy 68XXX/HC16 systems, with no added features or footprint overhead.
Availability
DS1233M-55/T&R is available at Aetrix Electronics and suitable for industrial PLC control, legacy automotive ECU, and medical diagnostic instrument applications requiring stable component supply and long-term obsolescence management.
Supply support for DS1233M-55/T&R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated, now part of Analog Devices, designs precision analog and mixed-signal ICs for industrial, communications, and computing markets.
The DS1233M-55/T&R belongs to the EconoReset™ family - engineered for cost-sensitive, high-volume microprocessor reset applications where simplicity, reliability, and pin compatibility with legacy Motorola supervisory ICs are critical.
FAQ
What is the exact voltage trip point specification for DS1233M-55/T&R?
The DS1233M-55/T&R has a guaranteed VCC trip point of 4.5 V (minimum), 4.625 V (typical), and 4.75 V (maximum) under -40°C to +85°C operating conditions. This 4.625 V nominal threshold is factory-trimmed using temperature-compensated bandgap reference circuitry and is distinct from the DS1233M-5 (4.375 V typ) and DS1233M-3 (2.72 V typ) variants.
Does DS1233M-55/T&R require an external pullup resistor on the RST pin?
No, DS1233M-55/T&R includes an internal pullup resistor of 3.75–6.5 kΩ on the RST pin, eliminating the need for an external component. This feature reduces BOM count and PCB area, and is confirmed in the DC Electrical Characteristics table of the official datasheet. External pullups may still be used if stronger drive or different logic levels are required.
Is DS1233M-55/T&R pin-compatible with the Motorola MC34064?
Yes, DS1233M-55/T&R is explicitly stated in its datasheet to be pin-function compatible with the MC33064, MC34064, MC33164, and MC34164. All share identical TO-92 pinout: Pin 1 = RST (active-low), Pin 2 = VCC, Pin 3 = GND - enabling direct replacement in existing 68XXX-based designs without layout changes.
What is the reset timeout duration of DS1233M-55/T&R after VCC recovery?
The DS1233M-55/T&R holds the RST pin low for 200–500 ms after VCC returns to tolerance, with 350 ms being the typical value. This fixed delay is internally generated and does not rely on external capacitors, ensuring consistent reset timing across temperature and unit-to-unit variation - critical for reliable microprocessor initialization.
Can DS1233M-55/T&R operate from a 3.3 V supply rail?
Yes, DS1233M-55/T&R supports supply voltages from 1.2 V to 5.5 V per Recommended DC Operating Conditions. However, its 4.625 V trip point means it will assert reset continuously when powered from 3.3 V - it is intended to monitor a higher-voltage rail (e.g., 5 V) while being powered from that same rail. It is not designed as a 3.3 V system supervisor.
DS1233M-55/T&R Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- EconoReset
- Package/Case:
- TO-226-3, TO-92-3 (TO-226AA) Formed Leads
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Type:
- Simple Reset/Power-On Reset
- Number of Voltages Monitored:
- 1
- Voltage - Threshold:
- 4.625V
- Output:
- Open Drain or Open Collector
- Reset:
- Active Low
- Reset Timeout:
- 200ms Minimum
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- TO-92-3
DS1233M-55/T&R FAQ
1.How can I place an order for DS1233M-55/T&R through Aetrix?
Please submit a Request for Quotation (RFQ) for DS1233M-55/T&R on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DS1233M-55/T&R reliable?
The price and inventory of DS1233M-55/T&R are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DS1233M-55/T&R is usually 5 days.
3.What payment methods are accepted for DS1233M-55/T&R?
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DS1233M-55/T&R orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DS1233M-55/T&R order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DS1233M-55/T&R?
For technical support, including DS1233M-55/T&R datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DS1233M-55/T&R requirements.
6.How does Aetrix verify that DS1233M-55/T&R is sourced from the original manufacturer or authorized distributors?
All DS1233M-55/T&R products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DS1233M-55/T&R meets industry standards.
7.What is the process for return or replacement of DS1233M-55/T&R?
All DS1233M-55/T&R units undergo pre-shipment inspection (PSI). If there is an issue with DS1233M-55/T&R, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DS1233M-55/T&R part is unused and in its original packaging.
Return procedure for DS1233M-55/T&R:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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