Analog Devices Inc./Maxim Integrated DS1236-10

Overview

DS1236-10 from Maxim Integrated is a microprocessor supervisory IC providing power-fail detection, reset control, watchdog timing, nonvolatile SRAM backup, and early-warning NMI generation. It features 10% VCC trip point (4.25–4.50 V), <100 nA battery current at 25°C, dual active-high/low RST outputs, and supports both NMOS and CMOS processor modes via RC pin configuration. Used in battery-backed embedded systems requiring orderly shutdown and data retention.

For engineers reviewing the DS1236-10 datasheet, DS1236-10 pinout, DS1236-10 application, or DS1236-10 equivalent, key selection criteria include its 10% power supply monitoring accuracy, dual-reset output polarity support, VCCO switched SRAM supply capability, integrated watchdog timeout (100–600 ms), and industrial temperature option (-40°C to +85°C).

Technical Context

The DS1236-10 integrates a bandgap voltage reference and precision comparator for accurate 5 V supply monitoring with 10% tolerance (VCCTP = 4.25–4.50 V). Its dual RST outputs (active high and low) and programmable RC pin enable mode-selectable behavior for NMOS (RC = GND) or CMOS (RC = VCCO) processors.

It implements a 400 ms typical watchdog timer triggered by ST input strobing, generates a 200–500 μs NMI pulse upon IN-pin voltage decay below 2.54 V, and provides VCCO switching between VCC and VBAT to sustain SRAM during power loss - all while consuming <100 nA battery current in backup mode.

Key Specifications

Pinout & Package

DS1236-10 is available in 16-pin DIP (300-mil) and 16-pin SOIC (300-mil) packages. Both share identical pin mapping and function assignment.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar microprocessor supervisory applications.

Compared with MAX691ACPE+ and DS1233M-10+, the DS1236-10 uniquely integrates NMI-based early warning, VCCO-controlled SRAM backup, and configurable NMOS/CMOS reset timing - making it the only option supporting full nonvolatile system shutdown with deterministic data retention.

Availability

DS1236-10 is available at Aetrix Electronics and suitable for industrial data loggers, medical patient monitors, point-of-sale terminals, and smart utility meters requiring stable component supply, long-term lifecycle support, and guaranteed battery-backed memory retention.

Supply support for DS1236-10 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Maxim Integrated (now part of Analog Devices) is a semiconductor company specializing in precision analog, mixed-signal, and power management ICs for industrial, medical, and communications applications.

The DS1236-10 belongs to Maxim's MicroManager family of supervisory ICs, designed specifically to replace discrete power-monitoring circuits in battery-backed microprocessor systems requiring reliable reset, watchdog, and nonvolatile memory support.

FAQ

What is the exact VCC trip point specification for DS1236-10?

The DS1236-10 has a guaranteed VCC trip point (VCCTP) of 4.25 V minimum to 4.50 V maximum at 0°C to 70°C, corresponding to 10% tolerance around nominal 5 V. This is distinct from the DS1236-5 variant, which specifies 4.50–4.75 V. The DS1236-10 datasheet confirms this range under DC Electrical Characteristics, Table "Power Sup. Trip Point".

Does DS1236-10 support both active-high and active-low reset outputs simultaneously?

Yes, DS1236-10 provides two dedicated RST pins: one active-low and one active-high. Both are driven synchronously during power-fail or watchdog timeout events. This eliminates the need for external inverters and supports direct interfacing with both NMOS (requiring active-low) and CMOS (requiring active-high) microprocessors - a capability confirmed in the Pin Description and Power Monitor sections of the DS1236-10 datasheet.

How does DS1236-10 achieve nonvolatile SRAM operation?

The DS1236-10 achieves nonvolatile SRAM operation through two integrated functions: (1) VCCO pin supplies the higher of VCC or VBAT to SRAM, ensuring continuous power; and (2) CEO pin is unconditionally driven high during VCC failure to disable SRAM writes, preventing data corruption. These mechanisms are explicitly detailed in the "Memory Backup" section and Figure 7 of the DS1236-10 datasheet.

Can DS1236-10 generate an early-warning interrupt before power failure?

Yes, DS1236-10 generates a non-maskable interrupt (NMI) when the voltage at its IN pin falls below 2.50–2.60 V (typical 2.54 V). This allows users to configure an early-warning threshold - e.g., 4.80 V on a 5 V rail or 9.00 V on a 12 V rail - using an external resistor divider. The NMI pulse width is 200–500 μs, providing deterministic time for firmware-initiated shutdown, as verified in the "Non-Maskable Interrupt" section of the DS1236-10 datasheet.

What is the battery current consumption of DS1236-10 in backup mode?

The DS1236-10 consumes less than 100 nA of battery current at 25°C, as specified in the "Features" list and confirmed in the DC Electrical Characteristics table under "Battery Current (IBAT)". This ultra-low drain enables multi-year data retention on standard CR2032 coin cells and is critical for applications like utility meters and portable medical devices where battery replacement is impractical.