Analog Devices Inc./Maxim Integrated DS1236A-10N+

Overview

DS1236A-10N+ from Maxim Integrated is a microprocessor supervisory IC that provides power-fail detection, reset control, nonvolatile SRAM backup, watchdog timer, and early-warning NMI generation for 5V systems. It features 10% VCC trip point (4.25–4.50 V), <100 nA battery current at 25°C, 25 ms minimum reset pulse width, and dual active-high/active-low RST outputs. Used in battery-backed embedded controllers requiring orderly shutdown and memory retention.

For engineers reviewing the DS1236A-10N+ datasheet, DS1236A-10N+ pinout, DS1236A-10N+ application, or DS1236A-10N+ equivalent, key selection criteria include VCC monitoring accuracy (10%), NMOS/CMOS mode configuration via RC pin, VCCO switched SRAM supply capability, pushbutton reset debouncing, and watchdog timeout (100–600 ms).

Technical Context

The DS1236A-10N+ integrates a bandgap voltage reference and precision comparator to monitor VCC against a fixed 10% threshold (VCCTP = 4.25–4.50 V). Its dual-mode reset control (RC pin selects NMOS or CMOS operation) determines RST/NMI timing behavior, CEO write-protection activation, and battery isolation strategy during power loss.

It implements a 400 ms typical watchdog timer with ST input strobing, supports early-warning power-fail detection via user-configurable IN pin (VTP = 2.50–2.60 V), and delivers VCCO output switching between VCC and VBAT (0–4.0 V) with ≤0.7 V dropout in battery-backup mode.

Key Specifications

Pinout & Package

DS1236A-10N+ is available in 16-pin SOIC (300-mil) package. Pin functions are validated per Maxim's official datasheet and mechanical drawings.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar microprocessor supervisory applications.

Compared with MAX690AESA+ and DS1233M-10+, the DS1236A-10N+ uniquely combines 10% VCC monitoring, programmable NMI, VCCO-controlled SRAM backup, and watchdog timer in one 16-pin SOIC - enabling full power-management autonomy without external support circuitry.

Availability

DS1236A-10N+ is available at Aetrix Electronics and suitable for industrial data loggers, medical patient monitors, point-of-sale terminals, smart energy meters, and battery-backed embedded controllers requiring stable component supply and long-term lifecycle support.

Supply support for DS1236A-10N+ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Maxim Integrated (now part of Analog Devices) designs precision analog, mixed-signal, and power management ICs for demanding industrial, medical, and communications applications.

The DS1236A-10N+ belongs to Maxim's MicroManager family of supervisory ICs, engineered specifically for microprocessor-based systems needing coordinated power monitoring, reset control, memory backup, and orderly shutdown in battery-backed environments.

FAQ

What is the VCC trip point specification for DS1236A-10N+?

The DS1236A-10N+ has a guaranteed VCC trip point (VCCTP) of 4.25 V minimum to 4.50 V maximum, corresponding to a 10% tolerance on a nominal 5 V supply. This threshold is set internally using a bandgap reference and precision comparator. The DS1236A-10N+ asserts RST and NMI outputs when VCC falls below this range, ensuring microprocessor reset occurs before unstable operation begins. Typical VCCTP is 4.37 V at 25°C.

How does the RC pin configure DS1236A-10N+ for NMOS versus CMOS processor modes?

The RC pin on DS1236A-10N+ selects operational mode: grounding RC enables NMOS mode (RST active during VCC brownout, NMI pulses then tri-states), while tying RC to VCCO enables CMOS mode (no RST assertion on VCC collapse, pulsed NMI only, VCCO maintains SRAM power). DS1236A-10N+ behavior differs fundamentally in reset timing, CEO write-protection activation, and battery isolation - all determined solely by RC voltage level per the datasheet's Processor Mode section.

Can DS1236A-10N+ operate without a battery connected to VBAT?

Yes, DS1236A-10N+ can operate without a battery: VBAT must be grounded, and RC should also be grounded to select NMOS mode. In this configuration, DS1236A-10N+ retains full power-monitoring, reset generation, and pushbutton functionality but disables VCCO switching and memory backup. The DS1236A-10N+ datasheet explicitly states this "battery-less" operation method on page 6 under "MEMORY BACKUP", confirming it is a supported use case.

What is the purpose and timing behavior of the ST (strobe) input on DS1236A-10N+?

The ST input on DS1236A-10N+ resets the internal watchdog timer on each high-to-low transition. Its timeout is 100–600 ms; if ST is not strobed within that window, DS1236A-10N+ forces RST active. Minimum ST pulse width is 20 ns, and tWC (ST-to-WC/SC delay) is 0.1–50 μs. This ensures DS1236A-10N+ detects software hangs while allowing flexible signal sourcing from address/data/control lines - no external timer circuitry is needed.

Does DS1236A-10N+ provide both active-high and active-low reset outputs?

Yes, DS1236A-10N+ provides dual-format reset outputs: one active-low RST and one active-high RST, both asserted simultaneously during power-fail or watchdog timeout. This eliminates level-shifting requirements for mixed-logic systems. The DS1236A-10N+ datasheet confirms identical timing (tRST = 25–150 ms) and electrical specs (VOL ≤ 0.4 V, VOH ≥ VCC−0.5 V) for both outputs, making it compatible with NMOS (active-low) and CMOS (active-high) microprocessors without redesign.