Analog Devices Inc./Maxim Integrated DS1236A-5N+

Overview

DS1236A-5N+ from Maxim Integrated is a microprocessor supervisory IC that provides power-fail detection, reset control, nonvolatile SRAM backup, watchdog timer, and early-warning NMI generation for 5V systems. It features 10% VCC trip point (4.5V min), 25ms minimum reset pulse width, <100nA battery current at 25°C, and dual active-high/active-low RST outputs. Used in industrial embedded controllers requiring orderly shutdown during brownout.

For engineers reviewing the DS1236A-5N+ datasheet, DS1236A-5N+ pinout, DS1236A-5N+ application, or DS1236A-5N+ equivalent, key selection criteria include VCC trip accuracy (±0.13V), NMI response time (100μs typ), VCCO output capability (100mA @ VCC−0.3V), and support for both NMOS and CMOS processor modes via RC pin configuration.

Technical Context

The DS1236A-5N+ integrates a bandgap voltage reference and precision comparator to monitor VCC against a 4.37V typical trip threshold (10% tolerance), forcing RST/RST active within 175μs of out-of-tolerance detection. Its dual-mode reset control (RC pin) configures timing behavior for NMOS (RC=GND) or CMOS (RC=VCCO) processors, altering NMI assertion, RST hold duration, and VCCO sourcing logic.

It implements a 400ms typical watchdog timer with ST input strobing, generates a 200–500μs NMI pulse upon IN pin voltage decay below 2.54V, and unconditionally write-protects external SRAM by driving CEO high when VCC falls below VCCTP - all while consuming <100nA from VBAT in data-retention mode.

Key Specifications

Pinout & Package

DS1236A-5N+ is supplied in a 16-pin SOIC (300-mil) package, RoHS-compliant and rated for 0°C to +70°C operation. Pin functions are electrically identical to the 16-pin DIP variant but optimized for surface-mount assembly.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar microprocessor supervisory applications.

Compared with MAX690TSA+ and TPS3823MPW, DS1236A-5N+ uniquely combines VCCO-based SRAM backup, programmable NMI threshold, and dual-mode reset control - making it irreplaceable in systems requiring coordinated memory protection and graceful shutdown under brownout conditions.

Availability

DS1236A-5N+ is available at Aetrix Electronics and suitable for industrial automation, medical handhelds, smart metering, and POS terminal designs requiring stable component supply with long-term lifecycle assurance.

Supply support for DS1236A-5N+ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Maxim Integrated (now part of Analog Devices) is a semiconductor company specializing in high-performance analog, mixed-signal, and power management ICs for industrial, automotive, and computing applications.

The DS1236A-5N+ belongs to Maxim's MicroManager family of supervisory ICs, engineered specifically for robust power sequencing, nonvolatile memory backup, and fail-safe microprocessor control in mission-critical embedded systems.

FAQ

What is the exact VCC trip voltage specification for DS1236A-5N+?

The DS1236A-5N+ has a guaranteed VCC trip point of 4.25V minimum to 4.50V maximum (10% tolerance at 5V nominal), with 4.37V typical. This threshold is set internally and applies across the full 0°C to +70°C operating range. The DS1236A-5N+ variant is specifically calibrated for this 10% trip; the DS1236A-5 version offers a tighter 5% option (4.75V max). No external components affect this value.

How does DS1236A-5N+ support both NMOS and CMOS microprocessors?

DS1236A-5N+ supports both processor types via the RC pin: grounding RC selects NMOS mode (RST held active during VCC loss, NMI pulses once), while tying RC to VCCO enables CMOS mode (NMI triggers sleep entry, RST remains inactive until VCC drops below VBAT). This single-pin configuration changes timing behavior, output drive levels, and VCCO sourcing logic - no PCB redesign is needed to switch modes.

Can DS1236A-5N+ operate without a battery connected to VBAT?

Yes, DS1236A-5N+ can operate without a battery: tie VBAT to GND. In this configuration, the chip functions as a standard supervisory IC with reset, watchdog, and NMI - but loses SRAM backup capability and VCCO switching. The RC pin should also be grounded (NMOS mode) since battery-backed operation is disabled. All other features, including power-fail detection and pushbutton reset, remain fully functional.

What is the purpose of the WC/SC pin on DS1236A-5N+?

The WC/SC (Wake-up/Sleep Control) pin on DS1236A-5N+ disables internal comparators and reduces supply current to 20μA when asserted, enabling ultra-low-power stop mode for battery-operated systems. When active, it halts NMI generation, watchdog timing, and VCC monitoring - but preserves RST state and retains ability to wake on PBRST or VCC rise above VBAT. This extends battery life in handheld devices during idle periods.

Does DS1236A-5N+ provide true nonvolatile SRAM write protection during power loss?

Yes, DS1236A-5N+ provides unconditional SRAM write protection during VCC decay via its CEO output. When VCC falls below VCCTP, CEO is driven high within 44μs (max) to disable SRAM writes - even if CEI is low. If CEI is active during power loss, CEO holds its state for up to 5 seconds (tCE) to complete the current memory cycle, preventing data corruption. This behavior is hardware-enforced and requires no firmware intervention.