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Analog Devices Inc./Maxim Integrated DS1236S-10+T&R

Part No.:
DS1236S-10+T&R
Manufacturer:
Analog Devices Inc./Maxim Integrated
Category:
Supervisors
Package:
16-SOIC (0.295", 7.50mm Width)
Datasheet:
AetrixDS1236S-10+T&R.pdf
Description:
IC SUPERVISOR 1 CHANNEL 16SOIC
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:1,784

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Product details

Overview

DS1236S-10+T&R from Maxim Integrated is a microprocessor supervisory IC providing power-fail detection, reset control, nonvolatile SRAM backup, watchdog timer, and early-warning NMI generation. It features 10% VCC trip point (4.37 V typical), <100 nA battery current at 25°C, and dual active-high/active-low RST outputs. Used in battery-backed embedded systems requiring orderly shutdown and memory retention during power loss.

For engineers reviewing the DS1236S-10+T&R datasheet, DS1236S-10+T&R pinout, DS1236S-10+T&R application, or DS1236S-10+T&R equivalent, key selection criteria include VCC monitoring accuracy (±0.13 V), watchdog timeout (400 ms typ), IN pin voltage threshold (2.54 V), SRAM write-protection timing (tCF = 7–44 μs), and support for both NMOS and CMOS processor modes via RC pin configuration.

Technical Context

The DS1236S-10+T&R integrates a bandgap voltage reference and precision comparator to monitor +5 V supply (VCC) with 10% tolerance (VCCTP = 4.25–4.50 V). It delivers dual reset outputs (RST active low, RST active high), non-maskable interrupt (NMI) triggered by user-defined voltage sense at IN pin (VTP = 2.5–2.6 V), and strobe-driven watchdog timer (tTD = 100–600 ms).

It implements memory backup via VCCO switching between VCC and VBAT (2.7–4.0 V), CEO-controlled SRAM write protection, and pushbutton reset debouncing (25 ms min pulse). Mode selection (NMOS vs. CMOS) is determined by RC pin level, directly affecting NMI behavior, RST assertion timing, and battery isolation strategy during power collapse.

Key Specifications

Parameter Value and Actual Design Meaning
VCC Trip Point4.25–4.50 V (10% tolerance); ensures reset activation before microprocessor instability
IN Pin Threshold (VTP)2.5–2.6 V; enables customizable early-warning voltage sensing via resistor divider
Watchdog Timeout100–600 ms; prevents runaway code by forcing reset if ST not strobed
Battery Current (IBAT)0.1 μA max at 25°C; preserves multi-year backup battery life
RST Active Duration25–150 ms; guarantees stable microprocessor initialization after power recovery
VCCO Output Capability100 mA @ VCC−0.3 V; powers SRAM during main supply operation
CEO Propagation Delay20 ns max; ensures rapid SRAM write-protection upon VCC failure

Pinout & Package

DS1236S-10+T&R is supplied in 16-pin SOIC (300-mil) package - surface-mount, RoHS-compliant, tape-and-reel format (T&R). Dimensions: 9.9 mm × 3.9 mm × 1.45 mm (L × W × H).

Pin/Terminal Circuit Role Design Meaning
VBAT+3 V Battery InputProvides nonvolatile power to control logic and VCCO switching during VCC loss
VCCOSwitched SRAM Supply OutputDelivers higher-of-VCC/VBAT to SRAM; enables seamless battery backup
VCC+5 V Primary Power InputMain system supply monitored for out-of-tolerance condition
GNDGround ReferenceCommon return path for all analog and digital circuitry
PF / PFPower-Fail Indicators (Active High/Low)Drive external MOSFETs for high-current power source switchover
WC/SCWake-Up/Sleep ControlDisables internal comparators to enter ultra-low-power sleep mode
RCReset Control InputSelects NMOS (RC = GND) or CMOS (RC = VCCO) processor interface mode
INEarly Warning InputUser-configurable voltage sense point for NMI generation prior to VCC failure
NMINon-Maskable Interrupt OutputPulses low ≥200 μs to signal impending power loss; enables safe data save
STStrobe InputResets watchdog timer; high-to-low transition required ≤100 ms to prevent timeout
CEO / CEIChip Enable Output/InputCEO asserts to disable SRAM writes when VCC fails; CEI passes through to CEO
PBRSTPushbutton Reset InputDebounced active-low input; triggers 25 ms min reset pulse on release
RST / RSTReset Outputs (Active Low/High)Simultaneously drive complementary reset signals to NMOS/CMOS processors

Key Features

Feature Design Value
Dual-mode processor supportRC pin configures NMOS (reset-hold) or CMOS (NMI-wake) behavior - no hardware change needed
Programmable early warningIN pin accepts user-defined voltage threshold (via resistor divider) to trigger NMI before VCC collapse
Ultra-low battery drain0.1 μA max IBAT at 25°C extends coin-cell life beyond 10 years in typical backup applications
Seamless SRAM backupVCCO automatically selects higher of VCC or VBAT; CEO disables SRAM writes within 7–44 μs of VCC failure
Configurable watchdogST input resets 400 ms timer; disabled by grounding IN (CMOS mode) or open ST (NMOS mode)
Freshness sealThree negative pulses on IN during shipment disconnect battery - activated only under controlled conditions

Applications

Industrial Data Logger Medical Portable Monitor

Use Scenario: Continuous sensor logging with battery backup during AC mains interruption.

IC Role / Device Role / Timing Role: DS1236S-10+T&R monitors VCC, issues NMI at 4.8 V to trigger flash save, then asserts RST at 4.37 V to halt CPU while preserving RAM via VCCO.

Use Value: Prevents data corruption during brownout; enables >5-year coin-cell operation with <100 nA quiescent draw.

Use Scenario: Handheld ECG device entering low-power stop mode when idle, waking on button press or alarm.

IC Role / Device Role / Timing Role: DS1236S-10+T&R uses WC/SC to disable comparators during sleep; PBRST debounces wake-up; RST reinitializes CPU on VCC recovery.

Use Value: Reduces system standby current to sub-μA range; eliminates need for external reset supervisor or discrete power switch.

POS Terminal with NV-SRAM Smart Meter with Tamper Detection

Use Scenario: Transaction data retention during brief power flicker or battery swap.

IC Role / Device Role / Timing Role: DS1236S-10+T&R asserts CEO within 12 μs of VCC drop to freeze SRAM writes, while VCCO sustains memory from VBAT.

Use Value: Guarantees atomic write completion; eliminates risk of partial record corruption during power transition.

Use Scenario: Utility meter detecting grid outage and initiating secure time-stamped event log before backup power depletes.

IC Role / Device Role / Timing Role: DS1236S-10+T&R drives PF to switch to supercapacitor, triggers NMI at 4.6 V to log tamper event, then holds RST until safe shutdown.

Use Value: Meets IEC 62053-21 secure logging requirements; provides deterministic 200–500 μs NMI pulse for firmware timestamping.

Equivalent & Alternatives

The following parts are listed as comparable options for similar microprocessor supervisory applications.

Alternative Part Technical Difference Application Difference Selection Advice
MAX691ACPE+Single active-low RST; no NMI output; 4.65 V fixed VCC threshold; no VCCO switchingLacks early-warning capability and SRAM backup control; suitable only for basic reset-only designsChoose only if NMI, memory write-protection, and dual-RST are unnecessary
DS1233M-10+No watchdog timer; no IN/NMI; no WC/SC; no CEO/CEI; only VCC monitoring and resetMinimalist reset generator - no memory backup, no early warning, no sleep controlSelect when cost-sensitive, space-constrained designs require only power-on/power-fail reset

Compared with MAX691ACPE+ and DS1233M-10+, the DS1236S-10+T&R uniquely integrates five critical functions-programmable early-warning NMI, dual-mode reset, SRAM write-protection, watchdog supervision, and battery-switched VCCO-in a single 16-pin SOIC, eliminating up to four discrete components in nonvolatile microcontroller systems.

Availability

DS1236S-10+T&R is available at Aetrix Electronics and suitable for industrial data loggers, portable medical monitors, POS terminals, smart meters, and battery-backed embedded controllers requiring stable component supply across extended product lifecycles.

Supply support for DS1236S-10+T&R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Maxim Integrated (now part of Analog Devices) is a semiconductor company specializing in high-performance analog, mixed-signal, and power management ICs for industrial, automotive, and communications applications.

The DS1236 family was designed specifically for microprocessor-based systems needing coordinated power monitoring, reset, memory backup, and orderly shutdown - targeting battery-operated and mission-critical embedded platforms.

FAQ

What is the exact VCC trip point tolerance for DS1236S-10+T&R?

The DS1236S-10+T&R has a guaranteed 10% VCC trip point tolerance: VCCTP = 4.25 V (min) to 4.50 V (max), with 4.37 V typical at 25°C. This ensures reliable reset assertion before microprocessor operational limits are exceeded, and is factory-trimmed - not adjustable. The DS1236S-10+T&R datasheet specifies this parameter under DC Electrical Characteristics, Table "Power Sup. Trip Point".

How does DS1236S-10+T&R support both NMOS and CMOS microprocessors?

DS1236S-10+T&R supports both architectures via the RC pin: tying RC to GND configures NMOS mode (continuous RST assertion during power loss), while connecting RC to VCCO enables CMOS mode (pulsed NMI for wake-from-stop, no forced RST during VCC decay). This dual-mode capability is intrinsic to DS1236S-10+T&R's architecture and requires no external components - only RC pin routing.

Can DS1236S-10+T&R be used without an external battery?

Yes - DS1236S-10+T&R operates fully without VBAT: it monitors VCC, generates RST/NMI, manages CEO, and runs watchdog timer using only VCC. However, VBAT is required for nonvolatile SRAM backup (VCCO switching) and extended battery-backed operation. The DS1236S-10+T&R datasheet confirms functional operation down to VCC = 4.5 V even with VBAT unconnected or at 0 V.

What is the maximum load DS1236S-10+T&R can drive on VCCO?

DS1236S-10+T&R delivers up to 100 mA on VCCO when powered from VCC (VCCO = VCC − 0.3 V typical), and up to 1 mA during battery-only operation (VCCO = VBAT − 0.7 V). These values are specified in the DS1236S-10+T&R DC Electrical Characteristics table under "Supply Output Current" and define absolute safe operating limits for SRAM and peripheral power.

Does DS1236S-10+T&R include a built-in watchdog timer?

Yes - DS1236S-10+T&R includes a programmable watchdog timer with 100–600 ms timeout (400 ms typical). It is reset by a high-to-low transition on the ST pin and forces RST/RST active if unstimulated. The timer is disabled in CMOS mode by grounding IN, or in NMOS mode by leaving ST open - both methods are documented in the DS1236S-10+T&R datasheet Section "WATCHDOG TIMER".

DS1236S-10+T&R Specifications

Product attributes
Attribute value
Manufacturer:
Analog Devices Inc./Maxim Integrated
Series:
MicroManager
Package/Case:
16-SOIC (0.295", 7.50mm Width)
Packaging:
Tape & Reel (TR)
Product Status:
Obsolete
Programmable:
Not Verified
Type:
Battery Backup Circuit
Number of Voltages Monitored:
1
Voltage - Threshold:
4.37V
Output:
Open Drain, Push-Pull
Reset:
Active High/Active Low
Reset Timeout:
25ms Minimum
Operating Temperature:
0°C ~ 70°C (TA)
Grade:
-
Qualification:
-
Mounting Type:
Surface Mount
Supplier Device Package:
16-SOIC

DS1236S-10+T&R FAQ

1.How can I place an order for DS1236S-10+T&R through Aetrix?

Please submit a Request for Quotation (RFQ) for DS1236S-10+T&R on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for DS1236S-10+T&R reliable?

The price and inventory of DS1236S-10+T&R are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DS1236S-10+T&R is usually 5 days.

3.What payment methods are accepted for DS1236S-10+T&R?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DS1236S-10+T&R transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for DS1236S-10+T&R?

DS1236S-10+T&R orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your DS1236S-10+T&R order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for DS1236S-10+T&R?

For technical support, including DS1236S-10+T&R datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DS1236S-10+T&R requirements.

6.How does Aetrix verify that DS1236S-10+T&R is sourced from the original manufacturer or authorized distributors?

All DS1236S-10+T&R products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DS1236S-10+T&R meets industry standards.

7.What is the process for return or replacement of DS1236S-10+T&R?

All DS1236S-10+T&R units undergo pre-shipment inspection (PSI). If there is an issue with DS1236S-10+T&R, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The DS1236S-10+T&R part is unused and in its original packaging.

Return procedure for DS1236S-10+T&R:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

DS1236S-10+T&R Tags

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