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Analog Devices Inc./Maxim Integrated DS1238-10
- Part No.:
- DS1238-10
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Supervisors
- Package:
- 16-DIP (0.300", 7.62mm)
- Datasheet:
-
DS1238-10.pdf
- Description:
- IC SUPERVISOR 1 CHANNEL 16DIP
- Quantity:
- Payment:
- Shipping:
Inventory:2,487
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Product details
Overview
DS1238-10 from Maxim Integrated (now Analog Devices) is a microprocessor supervisory IC providing power-fail detection, watchdog reset control, non-maskable interrupt generation, SRAM backup switching, and battery-backed memory write protection. It monitors +5 V supply with 10% threshold (4.5 V trip), delivers active-low/high reset outputs, and supports external power switching via PF pin. Used in embedded systems requiring orderly shutdown and data retention during brownout.
For engineers reviewing the DS1238-10 datasheet, DS1238-10 pinout, DS1238-10 application, or DS1238-10 equivalent, key selection considerations include its dual-reset output polarity, 10% VCC monitoring accuracy, 200 nA battery current draw, integrated freshness seal, and compatibility with nonvolatile SRAM backup architectures.
Technical Context
The DS1238-10 implements a bandgap-referenced voltage comparator for precise 4.5 V (±0.13 V) power supply monitoring, with RVT indicating threshold crossing and RST/RST asserting within 175 µs. Its watchdog timer supports internal (2.7 s typical) or external clock sources via OSCSEL/OSCIN, and resets on ST strobe timeout or undriven ST pin.
Early warning is delivered via NMI using user-configurable IN pin voltage sensing (1.27 V threshold), requiring three consecutive 33 µs samples below VTP to avoid noise-induced false triggers. Memory backup is enabled through VCCO switching between VCC and VBAT, with CEO write-protection delayed until CEI returns high or tCE (5 µs) expires - ensuring SRAM cycle completion before lockout.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Trip Point | 4.5 V nominal (10% tolerance); asserts RST/RST and RVT when supply falls below 4.25–4.50 V. |
| Battery Current (IBAT) | <200 nA at VBAT = 3.0 V; enables multi-year SRAM data retention on coin cell. |
| Reset Pulse Width (tRST) | 40–150 ms; guarantees microprocessor stabilization after power recovery. |
| Watchdog Timeout (Internal) | 1.7–2.7 s typical; prevents firmware lockup without software intervention. |
| CEO Propagation Delay | 20 ns max; ensures tight timing alignment between CEI and write-protect activation. |
| IN Pin Threshold (VTP) | 1.15–1.35 V; allows flexible early-warning voltage sensing via resistor divider. |
| Freshness Seal Activation | Three negative pulses on IN pin during +5 V operation; disables VCCO/RST/CEO to conserve battery pre-deployment. |
Pinout & Package
DS1238-10 is available in 16-pin DIP (300-mil) and 16-pin SOIC packages. Both share identical pin mapping and electrical behavior.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VBAT | +3 V battery input | Provides backup power path; powers internal logic and VCCO when VCC < VBAT. |
| VCCO | Switched SRAM supply output | Delivers VCC−0.3 V or VBAT−0.8 V to SRAM; enables seamless battery switchover. |
| VCC | +5 V primary supply input | Main system power rail; monitored for out-of-tolerance condition triggering reset and write protect. |
| GND | System ground reference | Common return for all analog/digital circuitry and voltage comparators. |
| PF | Power-fail indicator (active high) | Drives external MOSFET/switch to transfer load from VCC to VBAT during brownout. |
| RVT | Reset voltage threshold indicator | Open-drain output signaling VCC < VCCTP; used for status logging or secondary control. |
| OSCIN / OSCSEL | Oscillator timing interface | Selects internal ring oscillator (2.7 s) or external clock/capacitor for watchdog and reset timing. |
| IN | Early-warning voltage sense input | High-impedance node for resistor-divider-based VSENSE; triggers NMI before RST assertion. |
| NMI | Non-maskable interrupt output | Active-low signal notifying CPU of impending power loss; enables graceful save-to-SRAM sequence. |
| ST | Watchdog strobe input | Edge-triggered (H→L) reset of watchdog timer; failure to strobe causes automatic RST assertion. |
| CEO / CEI | Chip enable output/input | CEO follows CEI with 20 ns delay; held high during power fail to unconditionally write-protect SRAM. |
| WDS | Watchdog status output | Latched active-low flag indicating watchdog timeout occurred; cleared by ST strobe or VCC recovery. |
| RST / RST | Reset outputs (active low / active high) | Dual-polarity reset signals compatible with diverse microprocessor reset inputs. |
Key Features
| Feature | Design Value |
|---|---|
| Unconditional SRAM write protection | CEO forced high within 44 µs of VCC falling below 4.5 V, preventing data corruption during power loss. |
| Programmable watchdog timing | Configurable via OSCSEL/OSCIN for internal (2.7 s) or external clock source; supports long- or short-interval supervision. |
| Early-warning NMI with hysteresis | Triple-sampling (100 µs minimum hold) at IN pin eliminates noise-induced false interrupts during brownout. |
| Freshness seal mode | Electrically isolates battery during storage via three IN-pin negative pulses; extends shelf life and reduces self-discharge. |
| Pushbutton reset debouncing | Integrated RC network on RST pin eliminates mechanical switch bounce without external components. |
Applications
| Industrial Data Logger | Medical Diagnostic Device |
|---|---|
Use Scenario: Battery-powered field recorder capturing sensor data during intermittent AC power outages. IC Role / Device Role / Timing Role: DS1238-10 detects falling VCC, issues NMI to trigger immediate RAM save, then asserts RST after 4.5 V threshold breach to halt processor safely. Use Value: Prevents loss of critical waveform or calibration data during unexpected mains dropout by enabling deterministic shutdown within 100 µs of power decay. | Use Scenario: Portable ultrasound unit with volatile buffer memory storing real-time image frames prior to flash storage. IC Role / Device Role / Timing Role: DS1238-10 monitors 5 V rail; upon brownout, uses CEO to lock SRAM while VCCO sustains memory voltage from VBAT until full save completes. Use Value: Guarantees zero-data-loss operation during battery-switchover transients, meeting IEC 62304 Class C safety requirements for medical firmware integrity. |
| Point-of-Sale Terminal | Smart Energy Meter |
Use Scenario: Retail terminal performing transaction commit to EEPROM just before AC power interruption. IC Role / Device Role / Timing Role: DS1238-10's tCE = 5 µs delay ensures final write cycle finishes before CEO forces write-protect, avoiding partial writes. Use Value: Eliminates transaction rollback or corrupted ledger entries caused by mid-cycle power loss - essential for PCI-DSS compliance. | Use Scenario: Utility meter retaining time-of-use billing data across grid fluctuations and capacitor discharge periods. IC Role / Device Role / Timing Role: DS1238-10 leverages VBAT-powered VCCO and <200 nA IBAT to maintain SRAM state for >10 years on CR2032. Use Value: Enables 15+ year field lifetime without battery replacement while preserving tamper-proof energy consumption logs. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microprocessor supervisory applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX691CPD+ | Pin-compatible legacy part; same 10% VCC monitor, but no freshness seal or IN/NMI early-warning capability. | Lacks programmable watchdog timeout and dual-reset polarity; requires external circuitry for NMI-equivalent function. | Choose MAX691CPD+ only if legacy board reuse is mandatory and early-warning NMI is unnecessary. |
| TPS3823-50DBVR | Single-supply supervisor with 5% threshold (4.75 V), no VCCO switching, no NMI, no watchdog, no battery backup support. | Designed for basic reset-only applications; cannot replace DS1238-10 in SRAM backup or orderly shutdown systems. | Select TPS3823-50DBVR only for cost-sensitive designs needing only reset generation - not for memory backup or watchdog functions. |
Compared with MAX691CPD+ and TPS3823-50DBVR, DS1238-10 uniquely integrates power-fail warning (NMI), battery-backed SRAM control (VCCO/CEO), and configurable watchdog supervision in one 16-pin package - making it irreplaceable in applications demanding deterministic data retention during brownout.
Availability
DS1238-10 is available at Aetrix Electronics and suitable for industrial data loggers, medical diagnostic devices, point-of-sale terminals, and smart energy meters requiring stable component supply and long-term lifecycle support.
Supply support for DS1238-10 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices (via acquisition of Maxim Integrated) designs precision analog, mixed-signal, and power management ICs for high-reliability industrial, automotive, and medical applications.
The DS1238-10 belongs to Maxim's MicroManager family of supervisory ICs, engineered specifically for microprocessor-based systems needing coordinated power monitoring, reset control, and nonvolatile memory backup - especially where battery longevity and deterministic shutdown are critical.
FAQ
What is the exact power supply monitoring threshold for DS1238-10?
The DS1238-10 features a factory-trimmed 10% power supply monitor with a nominal VCC trip point of 4.5 V. Per datasheet specifications, the actual threshold ranges from 4.25 V to 4.50 V at 25°C, with a typical value of 4.37 V. This threshold triggers RST, RST, and RVT outputs simultaneously, ensuring consistent reset behavior across temperature and process variation. The DS1238-10 does not support field-adjustable thresholds - the 5% option (DS1238-5) is a separate part number.
How does DS1238-10 prevent data corruption during SRAM write cycles at power loss?
DS1238-10 avoids SRAM corruption by delaying CEO assertion until either CEI returns high or tCE (5 µs maximum) elapses - guaranteeing completion of the current memory access. This design ensures that even if VCC drops mid-write, the chip enable remains active long enough for the SRAM to latch valid data. The DS1238-10 also provides VCCO switching to sustain SRAM voltage from VBAT, maintaining data integrity throughout the entire backup window. This dual mechanism is intrinsic to DS1238-10's architecture and requires no external timing components.
Can DS1238-10 generate an early warning interrupt before system reset occurs?
Yes, DS1238-10 provides a dedicated non-maskable interrupt (NMI) output triggered by the IN pin voltage falling below 1.27 V (VTP). This occurs well before the 4.5 V reset threshold is reached, giving the microprocessor time to execute critical save routines. The NMI circuit includes built-in time-domain hysteresis - requiring three consecutive 33 µs samples below VTP - to reject noise. DS1238-10's NMI functionality is fully integrated and does not require external comparators or timers, distinguishing it from basic reset supervisors.
What is the purpose of the freshness seal feature in DS1238-10?
The freshness seal in DS1238-10 electrically disconnects the VBAT supply from internal circuitry during storage or shipment, reducing battery self-discharge to near-zero. Activation requires three precisely timed negative pulses on the IN pin while VCC is powered - a deliberate sequence preventing accidental triggering. Once sealed, VCCO, RST, RST, and CEO enter tri-state, while WDS goes low and PF remains functional. DS1238-10 exits freshness mode automatically upon VCC cycling above VBAT, restoring full operation without firmware intervention.
Does DS1238-10 support external power switching for high-current loads?
Yes, DS1238-10 includes a dedicated PF (power-fail) output pin designed to drive external MOSFETs or power switches. PF is active-high and sourced from VBAT, enabling clean handoff from VCC to battery for loads exceeding DS1238-10's internal VCCO current capability (100 mA typical). The PF transition threshold tracks VBAT, ensuring smooth switchover without voltage glitches. DS1238-10's PF pin is explicitly intended for this role - unlike generic reset supervisors, it provides controlled, battery-sourced gate drive without additional level-shifting circuitry.
DS1238-10 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- MicroManager
- Package/Case:
- 16-DIP (0.300", 7.62mm)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Type:
- Battery Backup Circuit
- Number of Voltages Monitored:
- 1
- Voltage - Threshold:
- 4.37V
- Output:
- Open Drain, Push-Pull
- Reset:
- Active High/Active Low
- Reset Timeout:
- 40ms Minimum
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 16-PDIP
DS1238-10 FAQ
1.How can I place an order for DS1238-10 through Aetrix?
Please submit a Request for Quotation (RFQ) for DS1238-10 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DS1238-10 reliable?
The price and inventory of DS1238-10 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DS1238-10 is usually 5 days.
3.What payment methods are accepted for DS1238-10?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DS1238-10 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DS1238-10?
DS1238-10 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DS1238-10 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DS1238-10?
For technical support, including DS1238-10 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DS1238-10 requirements.
6.How does Aetrix verify that DS1238-10 is sourced from the original manufacturer or authorized distributors?
All DS1238-10 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DS1238-10 meets industry standards.
7.What is the process for return or replacement of DS1238-10?
All DS1238-10 units undergo pre-shipment inspection (PSI). If there is an issue with DS1238-10, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DS1238-10 part is unused and in its original packaging.
Return procedure for DS1238-10:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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