Analog Devices Inc./Maxim Integrated DS1267-100

Overview

DS1267-100 from Maxim Integrated (formerly Dallas Semiconductor) is a dual 256-position digital potentiometer with 100 kΩ end-to-end resistance per channel, ±0.3 LSB relative linearity, and 100 kHz -3 dB cutoff frequency. It operates from a +5 V supply over -40°C to +85°C and implements a 3-wire serial interface (RST/CLK/DQ) for wiper position control in precision analog gain/attenuation circuits.

For engineers reviewing the DS1267-100 datasheet, DS1267-100 pinout, DS1267-100 application, or DS1267-100 equivalent, this page provides verified pin functions, stacked/cascaded configuration support, absolute/relative linearity specs, wiper resistance range (400–1000 Ω), and industrial temperature operation - all confirmed for the DS1267-100 variant.

Technical Context

The DS1267-100 integrates two independent 8-bit-controlled resistive arrays, each with 256 taps and temperature-compensated elements. Its 3-wire serial port uses RST as chip-select enable, CLK for synchronous bit transfer, and DQ for bidirectional data flow into a 17-bit shift register holding two wiper positions and a stack select bit.

Stacked mode connects both potentiometers in series via L1–H0, doubling total resistance to 200 kΩ and resolution to 512 steps; SOUT outputs W0 or W1 based on the stack select bit. Cascading uses COUT-to-DQ daisy-chaining with 50 ns propagation delay, enabling multi-device control without additional I/O lines.

Key Specifications

Pinout & Package

DS1267-100 is packaged in 16-pin SOIC (300-mil) with exposed pad not present; pinout matches the 16-pin SOIC variant shown in the mechanical drawings section of the datasheet.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual digital potentiometer applications.

Compared with AD5232BRUZ100 and MCP42100-I/P, the DS1267-100 uniquely supports hardware-stacked resistance doubling and RST-synchronized daisy-chaining - features absent in both alternatives - making it irreplaceable in applications requiring >100 kΩ analog range or single-bus control of multiple pots.

Availability

DS1267-100 is available at Aetrix Electronics and suitable for industrial sensor calibration, programmable gain amplifiers, and automotive body control modules requiring stable component supply, long-term lifecycle support, and guaranteed traceability.

Supply support for DS1267-100 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Maxim Integrated (now part of Analog Devices) designs precision analog and mixed-signal ICs for industrial, medical, and automotive applications, with emphasis on low-power, high-reliability performance.

The DS1267-100 belongs to Maxim's digital potentiometer product line, engineered specifically for replacing mechanical trimpots in automated calibration, gain control, and sensor biasing systems where digital configurability and temperature stability are essential.

FAQ

What is the -3 dB bandwidth of the DS1267-100 and how does it differ from other DS1267 variants?

The DS1267-100 has a confirmed -3 dB cutoff frequency of 100 kHz, as explicitly stated in Note 6 of the AC Electrical Characteristics table. This is lower than the DS1267-050 (200 kHz) and DS1267-010 (1 MHz) variants due to its higher 100 kΩ end-to-end resistance, which increases RC time constants in the resistive ladder. Bandwidth scales inversely with resistance value across the DS1267 family.

Does the DS1267-100 retain wiper settings after power cycling?

No, the DS1267-100 is a volatile digital potentiometer: wiper positions reset to 50% (binary 10000000) on power-up, as documented in the OPERATION section. To retain settings, an external microcontroller must reprogram the DS1267-100 via its 3-wire interface at startup - unlike nonvolatile alternatives such as the AD5232BRUZ100.

Can the DS1267-100 be used in stacked configuration, and what is the resulting resistance?

Yes, the DS1267-100 supports stacked configuration by connecting L1 to H0, yielding a combined end-to-end resistance of 200 kΩ (100 kΩ + 100 kΩ) and 512-step resolution. The SOUT pin delivers either W0 or W1 output based on the stack select bit in the 17-bit shift register, enabling single-point access to the composite wiper.

What is the role of the VB pin on the DS1267-100, and how should it be connected?

The VB (substrate bias) pin on the DS1267-100 must be connected to GND or -5.5 V to minimize leakage current and ensure specified linearity. Per the Recommended DC Operating Conditions table, VB = GND is the standard configuration for industrial temperature operation; leaving VB floating or misbiased degrades relative linearity beyond ±0.3 LSB and increases wiper leakage.

How many devices can be cascaded using the DS1267-100's COUT pin, and what timing constraint applies?

The DS1267-100 supports unlimited cascading in theory, but practical limits depend on CLK rise/fall time and cumulative propagation delay. Each device adds ≤50 ns delay on COUT, and the datasheet confirms COUT is always active regardless of RST state. Total bits transmitted equal 17 × number of devices; for N devices, the controlling MCU must clock exactly 17×N bits to fully load all registers.