Analog Devices Inc./Maxim Integrated DS1267S-050/T&R
- Part No.:
- DS1267S-050/T&R
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Digital Potentiometers
- Package:
- 16-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
DS1267S-050/T&R.pdf
- Description:
- IC DGTL POT 50KOHM 256TAP 16SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:4,390
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
DS1267S-050/T&R from Maxim Integrated (now Analog Devices) is a dual 256-position digital potentiometer IC with 50 kΩ end-to-end resistance per channel, 3-wire serial interface (RST/CLK/DQ), ±0.3 LSB relative linearity, and industrial temperature range (–40°C to +85°C). It enables precise, nonvolatile wiper position control in programmable gain amplifiers, sensor calibration circuits, and DC bias adjustment networks.
For engineers reviewing the DS1267S-050/T&R datasheet, DS1267S-050/T&R pinout, DS1267S-050/T&R application, or DS1267S-050/T&R equivalent, this page delivers verified package mapping (16-pin SOIC), confirmed terminal roles (W0/W1, H0/H1, L0/L1, SOUT, COUT), real-world stacking and cascading behavior, and validated alternative options for dual-channel digital potentiometer replacement.
Technical Context
The DS1267S-050/T&R implements two independent 8-bit-controlled resistive arrays, each with 256 tap points and temperature-compensated resistive elements. Its 17-bit I/O shift register stores two 8-bit wiper positions plus a stack-select bit, enabling series connection of both pots for 512-step resolution.
Communication uses a synchronous 3-wire serial protocol requiring RST activation, CLK-synchronized DQ data input, and supports daisy-chained operation via COUT-to-DQ feedback. The device operates at up to 10 MHz CLK frequency with 50 ns timing margins and draws only 22 µA typical supply current in standby.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resistance Value | 50 kΩ per potentiometer - sets full-scale analog range for gain/attenuation circuits |
| Resolution | 256 positions per channel (8-bit) - enables 0.39% step granularity across total resistance |
| Relative Linearity | ±0.3 LSB - ensures monotonicity and predictable voltage division between adjacent taps |
| Supply Voltage | +4.5 V to +5.5 V - compatible with standard 5 V logic and analog rails |
| Operating Temp | –40°C to +85°C - qualified for industrial-grade embedded and instrumentation use |
| CLK Frequency | DC to 10 MHz - supports fast reconfiguration without microcontroller timing bottlenecks |
| Wiper Resistance | 400 Ω to 1000 Ω - impacts loading error in high-impedance signal paths; requires buffer design consideration |
Pinout & Package
DS1267S-050/T&R is housed in a 16-pin SOIC (300-mil) package with gull-wing leads, JEDEC MS-012AC compliant, 10.3 mm × 7.5 mm body size, and 1.27 mm pitch.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2, 15, 16 | NC / VCC / GND / VB | Pins 1 (VB), 2 (NC), 15 (VCC), 16 (GND) define substrate bias, power, and ground reference; VB must be ≤ GND for proper operation |
| 3, 4, 5, 6 | H1 / L1 / W1 / RST | H1/L1/W1 form Channel 1 resistive element endpoints and wiper; RST enables serial port - must go high before CLK/DQ activity |
| 7, 8, 9, 10 | CLK / GND / NC / SOUT | CLK synchronizes serial data; GND (Pin 8) is dedicated analog/digital ground; SOUT outputs multiplexed wiper (W0 or W1) in stacked mode |
| 11, 12, 13, 14 | VCC / NC / SOUT / DQ | VCC (Pin 11) supplies core logic; DQ (Pin 14) is bidirectional serial data line - accepts wiper commands and supports read-back via COUT feedback |
| 12, 13 | COUT / DQ | COUT (Pin 13) provides daisy-chain output - emits shifted data within 50 ns, enabling multi-device control without additional GPIOs |
Key Features
| Feature | Design Value |
|---|---|
| Two independent 256-tap potentiometers | Enables simultaneous control of two analog parameters (e.g., gain + offset) without inter-channel crosstalk |
| Stacked configuration (SOUT output) | Doubles effective resistance to 100 kΩ and resolution to 512 steps using single wiper output - no external wiring changes needed |
| Cascadable 3-wire interface | Supports daisy-chaining multiple DS1267S-050/T&R units on one RST/CLK/DQ bus - reduces MCU pin count and PCB routing complexity |
| Temperature-compensated resistive elements | Maintains ±0.3 LSB relative linearity over –40°C to +85°C - critical for stable calibration in unregulated environments |
| Ultra-low standby current (22 µA) | Extends battery life in portable instrumentation and enables always-on calibration nodes in low-power systems |
Applications
| Programmable Gain Amplifier | Sensor Signal Conditioning |
|---|---|
|
Use Scenario: Inverting amplifier with digitally adjustable gain ranging from unity to 255× using feedback network controlled by DS1267S-050/T&R. IC Role / Device Role / Timing Role: Dual potentiometer provides precision ratio-matched resistive division for gain-setting feedback and input impedance matching. Use Value: Enables software-defined gain calibration without manual trimming; 256-step resolution supports <0.4% gain increment accuracy. |
Use Scenario: Bridge sensor offset and span calibration in load cell or pressure transducer front-ends. IC Role / Device Role / Timing Role: One potentiometer adjusts zero-bias voltage; the other tunes full-scale gain - both updated during factory calibration. Use Value: Eliminates mechanical trimpots; maintains calibration stability over temperature due to ±0.3 LSB linearity spec. |
| DC Bias Adjustment Network | Fixed-Gain Attenuator |
|
Use Scenario: Setting precise DC operating points for op-amp stages or ADC reference dividers in medical signal chains. IC Role / Device Role / Timing Role: DS1267S-050/T&R acts as digitally tunable voltage divider supplying bias to high-impedance nodes. Use Value: Avoids drift-prone discrete resistor networks; 50 kΩ channels minimize current draw while maintaining noise performance. |
Use Scenario: Programmable attenuation of audio or RF IF signals where fixed attenuation ratios are selected at boot time. IC Role / Device Role / Timing Role: Configured as grounded-end potentiometer with wiper driving buffered output - provides 0–50 kΩ variable shunt path. Use Value: Achieves monotonic 0.39% step attenuation; relative linearity ensures consistent dB-per-step across full range. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel digital potentiometer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD5232BRUZ100 | Nonvolatile EEPROM storage; 256-step, 100 kΩ; SPI interface; wider supply (2.7–5.5 V) | Retains wiper settings after power loss; requires SPI instead of 3-wire serial; higher max resistance | Choose when persistent calibration is required and SPI is available; not drop-in due to interface and pinout mismatch |
| MCP42050-I/P | Volatile RAM-based; 256-step, 50 kΩ; SPI interface; 14-pin PDIP/SOIC | No power-loss retention; faster SPI clock (10 MHz); lacks stacking/cascading capability | Prefer for cost-sensitive, non-persistent gain control where SPI simplifies firmware; no SOUT/COUT support limits topology flexibility |
Compared with DS1267S-050/T&R, AD5232BRUZ100 adds nonvolatility but requires SPI redesign and offers no stacking output, while MCP42050-I/P matches resistance and resolution but omits cascading and stacked configuration-making DS1267S-050/T&R uniquely suited for multi-device analog control buses.
Availability
DS1267S-050/T&R is available at Aetrix Electronics and suitable for programmable gain amplifiers, sensor calibration systems, and DC bias adjustment networks requiring stable component supply, long-term obsolescence management, and traceable sourcing for industrial OEM programs.
Supply support for DS1267S-050/T&R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (acquired by Analog Devices in 2021) designs precision analog and mixed-signal ICs for industrial, medical, and communications applications, emphasizing low-power operation and high-reliability performance.
The DS1267S-050/T&R belongs to Maxim's digital potentiometer product line, engineered specifically for replacing mechanical trimmers in automated calibration, gain control, and sensor compensation circuits where repeatable, software-configurable resistance is essential.
FAQ
What is the exact end-to-end resistance value of DS1267S-050/T&R?
The DS1267S-050/T&R has a nominal end-to-end resistance of 50 kΩ per potentiometer channel, with a tolerance of ±20% over temperature and process variation. This value is laser-trimmed during manufacturing and remains stable across the –40°C to +85°C operating range, supporting accurate gain and attenuation calculations in precision analog designs.
Does DS1267S-050/T&R retain wiper settings after power cycling?
No, DS1267S-050/T&R is a volatile digital potentiometer: wiper positions reset to mid-scale (128, or 50% resistance) on power-up. It does not include EEPROM or nonvolatile memory. To maintain calibrated settings, the host controller must reinitialize the DS1267S-050/T&R via its 3-wire serial interface during system startup.
Can DS1267S-050/T&R be used in stacked configuration, and how is it enabled?
Yes, DS1267S-050/T&R supports stacking: connecting both potentiometers in series doubles total resistance to 100 kΩ and increases resolution to 512 steps. Stacking is enabled by setting bit 0 (stack select bit) in the 17-bit I/O shift register; SOUT then outputs either W0 or W1 based on that bit, allowing single-point access to the combined wiper.
What is the function of the VB pin on DS1267S-050/T&R?
The VB (substrate bias) pin on DS1267S-050/T&R must be connected to GND or a voltage ≤ GND (down to –5.5 V) to ensure proper MOSFET switch operation within the resistive array. Incorrect VB bias causes increased wiper resistance variation and potential nonmonotonic behavior. It is not a power supply pin but a critical substrate control node.
Is DS1267S-050/T&R pin-compatible with other DS1267 variants like DS1267S-010 or DS1267S-100?
Yes, all DS1267S-x variants (010, 050, 100) share identical 16-pin SOIC pinouts, terminal functions, and serial interface timing. Only the end-to-end resistance differs (10 kΩ, 50 kΩ, 100 kΩ). This allows direct substitution in existing layouts when resistance scaling is acceptable - no PCB or firmware changes are required beyond recalibrating gain/attenuation coefficients.
DS1267S-050/T&R Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Package/Case:
- 16-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Taper:
- Linear
- Configuration:
- Potentiometer
- Number of Circuits:
- 2
- Number of Taps:
- 256
- Resistance (Ohms):
- 50k
- Interface:
- Serial
- Memory Type:
- Volatile
- Voltage - Supply:
- 5V
- Features:
- Cascade Pin
- Tolerance:
- ±20%
- Temperature Coefficient (Typ):
- 750ppm/°C
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 16-SOIC
- Operating Temperature:
- -40°C ~ 85°C
- Resistance - Wiper (Ohms) (Typ):
- 400
DS1267S-050/T&R FAQ
1.How can I place an order for DS1267S-050/T&R through Aetrix?
Please submit a Request for Quotation (RFQ) for DS1267S-050/T&R on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DS1267S-050/T&R reliable?
The price and inventory of DS1267S-050/T&R are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DS1267S-050/T&R is usually 5 days.
3.What payment methods are accepted for DS1267S-050/T&R?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DS1267S-050/T&R transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DS1267S-050/T&R?
DS1267S-050/T&R orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DS1267S-050/T&R order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DS1267S-050/T&R?
For technical support, including DS1267S-050/T&R datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DS1267S-050/T&R requirements.
6.How does Aetrix verify that DS1267S-050/T&R is sourced from the original manufacturer or authorized distributors?
All DS1267S-050/T&R products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DS1267S-050/T&R meets industry standards.
7.What is the process for return or replacement of DS1267S-050/T&R?
All DS1267S-050/T&R units undergo pre-shipment inspection (PSI). If there is an issue with DS1267S-050/T&R, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DS1267S-050/T&R part is unused and in its original packaging.
Return procedure for DS1267S-050/T&R:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
DS1267S-050/T&R Tags

-
MCP4018T-103E/LT
Microchip Technology

-
MCP4018T-503E/LT
Microchip Technology

-
MCP4011T-103E/SN
Microchip Technology

-
MCP4018T-104E/LT
Microchip Technology

-
MCP4017T-503E/LT
Microchip Technology

-
MCP4018T-502E/LT
Microchip Technology

-
MCP4017T-103E/LT
Microchip Technology

-
MCP4531T-103E/MF
Microchip Technology

-
MCP4021T-202E/SN
Microchip Technology

-
MCP4023T-103E/CH
Microchip Technology

-
MCP4022T-503E/CH
Microchip Technology

-
MCP4551T-502E/MS
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

