Analog Devices Inc./Maxim Integrated DS1706PEPA+
- Part No.:
- DS1706PEPA+
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Supervisors
- Package:
- 8-DIP (0.300", 7.62mm)
- Datasheet:
-
DS1706PEPA+.pdf
- Description:
- IC MICROMONITOR 3.3V 20% 8-DIP
- Quantity:
- Payment:

- Shipping:

Inventory:4,407
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
DS1706PEPA+ from Maxim Integrated is a 3.3V microprocessor supervisory circuit with active-high reset output, 20% VCC tolerance, watchdog timer, non-maskable interrupt, and pushbutton reset control. It monitors power supply integrity, software execution, and external override in embedded systems requiring reliable power-on reset and fail-safe recovery. Designed for industrial temperature range (-40°C to +85°C), it delivers 130 ms minimum reset pulse width and 1 s watchdog timeout.
For engineers reviewing the DS1706PEPA+ datasheet, DS1706PEPA+ pinout, DS1706PEPA+ application, or DS1706PEPA+ equivalent, key selection criteria include its RST (active-high) output configuration, 3.3V-20% trip point (VCCTP = 2.55–2.70 V), watchdog strobe timing, NMI early-warning capability, and compatibility with 8-pin DIP packaging.
Technical Context
The DS1706PEPA+ integrates three independent monitoring functions: precision VCC supervision using an internal bandgap reference and comparator, debounced pushbutton reset generation with guaranteed 130 ms active-high pulse, and a 1-second watchdog timer triggered by ST input transitions. Its IN pin enables user-defined voltage sensing at upstream points via resistor divider, supporting early power-fail detection before VCC collapse.
It features dual reset outputs - RST (active-high) and /WDS (active-low watchdog status) - with built-in hysteresis (100 µV on NMI), noise immunity (<2 µs pulses ignored), and power-up reset hold time of ≥130 ms. The device operates across 1.2 V to 5.5 V supply, draws ≤50 µA at VCC < 3.6 V, and supports industrial-grade reliability with -40°C to +85°C operation.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Trip Point | 2.55–2.70 V (3.3V-20% monitor; ensures reset activation before 3.3V rail falls below 2.63 V nominal) |
| Reset Output Type | RST active-high (enables direct connection to microcontroller reset inputs requiring high-level assertion) |
| Watchdog Timeout | 1.0–2.2 s (guarantees system recovery if firmware fails to strobe ST within 1 s) |
| NMI Response Time | 5–8 µs (provides early warning of power decay at IN pin before VCC collapse) |
| Reset Pulse Width | 130–285 ms (ensures full processor initialization and power stabilization after power-up or button press) |
| Supply Current | ≤50 µA at VCC < 3.6 V (minimizes quiescent load on battery- or energy-constrained 3.3V systems) |
| Operating Temp | -40°C to +85°C (supports deployment in industrial control, automotive body electronics, and outdoor equipment) |
Pinout & Package
DS1706PEPA+ is housed in an 8-pin plastic DIP (300-mil) package, compatible with through-hole PCB assembly and legacy socketing. Pin assignments are standardized across DS1705/DS1706 family variants.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PBRST | Pushbutton Reset Input | Active-low debounced input; initiates 130 ms RST pulse on release; internally pulled up to VCC (40 kΩ typical) |
| VCC | Power Supply | Primary supply input (1.2–5.5 V); powers all internal circuits including reference, comparator, and timer |
| GND | Ground | Reference node for all analog and digital functions; must be low-impedance connection |
| IN | Voltage Sense Input | High-impedance input for external voltage monitoring (e.g., upstream rail); trip point = 1.25 V ±50 mV |
| NMI | Non-Maskable Interrupt Output | Active-low pulse (≥200 µs) signaling early power decay at IN; includes 100 µV hysteresis |
| ST | Strobe Input | Watchdog trigger input; rising edge resets 1 s timer; internally pulled up to VCC (180 kΩ typical) |
| RST | Active-High Reset Output | Primary reset signal asserted high during power-up, brownout, or PBRST event; holds ≥130 ms |
| WDS | Watchdog Status Output | Active-low open-drain output indicating watchdog timeout; drives low for ≥130 ms on ST stall |
Key Features
| Feature | Design Value |
|---|---|
| 3.3V-20% VCC Monitor | Enables robust reset behavior in noisy or marginally regulated 3.3V systems, including those powering 3.0V logic |
| Active-High RST Output | Directly interfaces with MCUs requiring high-level reset assertion without external inverters or level shifters |
| Dual-Function Strobe Input (ST) | Serves both as watchdog timer trigger and optional NMI-to-reset feedback path when wired to PBRST |
| User-Configurable IN Sensing | Allows early detection of upstream power failure via resistor divider, extending system shutdown window before VCC collapse |
| Industrial Temperature Range | Validated operation from -40°C to +85°C ensures reliability in harsh environments without derating |
Applications
| Industrial PLC Controller | Medical Diagnostic Device |
|---|---|
Use Scenario: Microcontroller-based programmable logic controller operating in factory-floor environments with fluctuating 3.3V supply rails. IC Role / Device Role / Timing Role: Supervisory IC providing power-on reset, brownout detection, and watchdog recovery to prevent runaway code execution. Use Value: Prevents erroneous I/O state changes during power transients by asserting RST for ≥130 ms and enabling early NMI warning before VCC drops below 2.55 V. | Use Scenario: Portable ultrasound or patient monitor with battery-backed 3.3V subsystem requiring fail-safe boot and runtime integrity. IC Role / Device Role / Timing Role: System health monitor generating NMI for graceful data save and RST for controlled restart upon detected power anomaly. Use Value: Guarantees 130 ms reset hold time and 1 s watchdog timeout-critical for preserving volatile acquisition buffers and ensuring deterministic boot sequence. |
| Automotive Body Control Module | Networked Smart Sensor Node |
Use Scenario: CAN-connected BCM managing door locks, lighting, and HVAC in vehicles with wide-input DC-DC converters. IC Role / Device Role / Timing Role: Power supervisor detecting 3.3V rail degradation from aging or load-dump conditions; triggers NMI for preemptive shutdown. Use Value: Leverages IN pin to monitor upstream 12V-derived rail, extending warning time before VCC collapse and enabling safe EEPROM write before power loss. | Use Scenario: LoRaWAN or NB-IoT sensor node powered by coin cell or energy harvester with intermittent 3.3V regulation. IC Role / Device Role / Timing Role: Low-power supervisory circuit ensuring valid MCU initialization and detecting firmware hangs via ST strobing. Use Value: Draws only 50 µA at <3.6V, extends battery life while delivering precise 2.55–2.70 V trip point and 130 ms reset pulse for reliable cold-start behavior. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microprocessor supervisory applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX706CPA+ | Pin-compatible 5V-10% monitor with /RST (active-low); no IN sense pin or NMI output | Lacks early power-fail warning and user-configurable voltage monitoring; suitable only for basic 5V reset needs | Select when cost-sensitive 5V-only designs require minimal feature set and no upstream sensing |
| TPS3808G33DBVR | 3.3V-3% supervisor with /RESET, adjustable watchdog, but no NMI or PBRST support | Higher accuracy trip point (3.3V ±3%) but no pushbutton interface or non-maskable interrupt capability | Choose for precision 3.3V monitoring where early warning and manual reset are not required |
Compared with MAX706CPA+ and TPS3808G33DBVR, DS1706PEPA+ uniquely combines active-high reset, 3.3V-20% tolerance, NMI early warning, IN-based upstream sensing, and debounced pushbutton support-making it optimal for ruggedized 3.3V systems demanding comprehensive fault coverage.
Availability
DS1706PEPA+ is available at Aetrix Electronics and suitable for industrial automation, medical diagnostics, automotive body electronics, and networked sensor applications requiring stable component supply, long-term lifecycle assurance, and RoHS-compliant through-hole packaging.
Supply support for DS1706PEPA+ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) is a semiconductor company specializing in analog, mixed-signal, and high-reliability ICs for industrial, automotive, communications, and computing markets.
The DS1706PEPA+ belongs to the MicroMonitor™ family-designed specifically for microprocessor system supervision with integrated power monitoring, watchdog, and reset management in single-chip solutions.
FAQ
What is the exact VCC trip point range for DS1706PEPA+?
The DS1706PEPA+ has a specified VCC trip point (VCCTP) of 2.55 V (minimum), 2.63 V (typical), and 2.70 V (maximum), corresponding to its 3.3V-20% monitor specification. This range ensures reliable reset assertion before the 3.3V rail degrades beyond functional limits for most 3.3V logic families. The DS1706PEPA+ datasheet confirms this tolerance applies specifically to the 'P' variant, distinct from other DS1706 suffixes like 'T' or 'S'.
Does DS1706PEPA+ provide both active-high and active-low reset outputs?
No, DS1706PEPA+ provides only RST (active-high) and WDS (active-low watchdog status) outputs. Unlike DS1706EPA or DS1706LEPA, it does not include /RST (active-low reset). The 'P' suffix explicitly denotes active-high RST and active-low WDS configuration. This is confirmed in the Ordering Information table and Pin Description section of the DS1705/DS1706 datasheet.
Can DS1706PEPA+ monitor voltages higher than its VCC supply?
Yes, DS1706PEPA+ can monitor higher voltages using the IN pin with an external resistor divider. The IN pin has a fixed 1.25 V trip threshold (VTP), so a voltage divider scales the target rail to match this reference. The datasheet provides the formula VSENSE = [R2/(R1+R2)] × 1.25 V and specifies that the maximum allowable monitored voltage (VMAX) depends on VCC and R1/R2 values. This capability is explicitly documented for DS1706PEPA+ in the Non-Maskable Interrupt Circuit Example.
What is the watchdog timeout behavior of DS1706PEPA+?
The DS1706PEPA+ watchdog timer times out after 1.0–2.2 seconds if the ST input is not strobed with a high-to-low transition. Upon timeout, WDS asserts low for ≥130 ms. The timer starts counting only after RST becomes inactive (i.e., after power-up stabilization), preventing spurious timeouts during boot. This behavior is verified in the AC Electrical Characteristics table and Watchdog Timer section of the DS1705/DS1706 datasheet.
Is DS1706PEPA+ pin-compatible with MAX705/MAX706 devices?
Yes, DS1706PEPA+ is pin-compatible with MAX705/MAX706 in 8-pin DIP, SOIC, and µSOP packages, as stated in the Features section of the datasheet. However, functional differences exist: DS1706PEPA+ offers RST (active-high) instead of /RST, includes an IN pin for external sensing, and provides NMI output-features absent in standard MAX705/MAX706. Engineers must verify schematic connectivity for RST polarity and unused pins.
DS1706PEPA+ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- MicroMonitor™
- Package/Case:
- 8-DIP (0.300", 7.62mm)
- Packaging:
- Bulk
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Simple Reset/Power-On Reset
- Number of Voltages Monitored:
- 1
- Voltage - Threshold:
- 2.63V
- Output:
- Push-Pull, Totem Pole
- Reset:
- Active High
- Reset Timeout:
- 130ms Minimum
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 8-PDIP
DS1706PEPA+ FAQ
1.How can I place an order for DS1706PEPA+ through Aetrix?
Please submit a Request for Quotation (RFQ) for DS1706PEPA+ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DS1706PEPA+ reliable?
The price and inventory of DS1706PEPA+ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DS1706PEPA+ is usually 5 days.
3.What payment methods are accepted for DS1706PEPA+?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DS1706PEPA+ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DS1706PEPA+?
DS1706PEPA+ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DS1706PEPA+ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DS1706PEPA+?
For technical support, including DS1706PEPA+ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DS1706PEPA+ requirements.
6.How does Aetrix verify that DS1706PEPA+ is sourced from the original manufacturer or authorized distributors?
All DS1706PEPA+ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DS1706PEPA+ meets industry standards.
7.What is the process for return or replacement of DS1706PEPA+?
All DS1706PEPA+ units undergo pre-shipment inspection (PSI). If there is an issue with DS1706PEPA+, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DS1706PEPA+ part is unused and in its original packaging.
Return procedure for DS1706PEPA+:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
DS1706PEPA+ Tags

-
MIC826SYMT-TR
Microchip Technology

-
APX803S-31SA-7
Diodes Incorporated

-
APX803L20-29SA-7
Diodes Incorporated
-
TPS3828-33DBVR
Texas Instruments

-
V6340RSP3B+
EM Microelectronic

-
EM6325CXSP5B-2.9+
EM Microelectronic

-
MCP120T-300I/TT
Microchip Technology

-
MCP130T-315I/TT
Microchip Technology

-
MCP120T-475I/TT
Microchip Technology

-
MCP111T-300E/TT
Microchip Technology

-
MCP120T-315I/TT
Microchip Technology

-
MCP809T-315I/TT
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

