Analog Devices Inc./Maxim Integrated DS1706SEPA+
- Part No.:
- DS1706SEPA+
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Supervisors
- Package:
- 8-DIP (0.300", 7.62mm)
- Datasheet:
-
DS1706SEPA+.pdf
- Description:
- IC SUPERVISOR 1 CHANNEL 8DIP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
DS1706SEPA+ from Maxim Integrated is a 3.3V ±10% precision voltage supervisor IC with active-low reset output, non-maskable interrupt (NMI), watchdog timer, and pushbutton reset control - designed to halt and restart out-of-control microprocessors during power transients or software faults in industrial embedded systems.
For engineers reviewing the DS1706SEPA+ datasheet, DS1706SEPA+ pinout, DS1706SEPA+ application, or DS1706SEPA+ equivalent, this page delivers verified functional parameters, validated pin roles, confirmed industrial-temperature operation (-40°C to +85°C), exact package mapping (8-pin PDIP), and two rigorously cross-referenced alternative parts for 3.3V supervisor selection.
Technical Context
The DS1706SEPA+ integrates three independent monitoring functions: (1) VCC supervision with 3.3V ±10% trip point (VCCTP = 2.93V to 3.08V), (2) high-impedance IN pin sensing at 1.25V reference for early power-fail warning via NMI, and (3) 1.0–2.2s watchdog timeout triggered by ST strobe input absence. All functions operate within 1.2V–5.5V supply range.
Its internal architecture includes temperature-compensated bandgap reference, comparator-based reset generation with 130ms minimum active reset pulse, debounced PBRST input, and open-drain WDS output. The device asserts RST low on VCC dropout and holds it active ≥130ms after recovery - ensuring processor stabilization before execution resumes.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Trip Point | 2.93V to 3.08V (3.3V ±10% tolerance - ensures reliable reset assertion across full industrial temperature range) |
| Reset Pulse Width | 130ms minimum (guarantees sufficient time for power supply and microprocessor stabilization post-power-up or recovery) |
| Watchdog Timeout | 1.0–2.2s (configurable timing margin for software execution monitoring without false triggers) |
| NMI Response Delay | 5–8μs (enables early power-fail warning before VCC reaches critical dropout level) |
| Operating Current | 50μA at VCC < 3.6V (ultra-low quiescent current preserves system power budget in battery-backed or energy-sensitive designs) |
| IN Pin Reference | 1.25V ±0.05V (high-precision sense threshold enabling accurate upstream voltage monitoring via external resistor divider) |
| Temperature Range | -40°C to +85°C (fully specified industrial-grade operation without derating) |
Pinout & Package
DS1706SEPA+ is housed in an 8-pin plastic DIP (PDIP-8, 300-mil) package with through-hole mounting compatibility and RoHS-compliant lead-free finish (+ suffix).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PBRST | Pushbutton Reset Input | Active-low, internally pulled up (40kΩ); debounced to guarantee ≥130ms RST pulse on button release |
| VCC | Power Supply | Primary supply input (1.2V–5.5V); powers all internal circuits and defines trip thresholds |
| GND | Ground | Reference return for all analog and digital functions; must be low-impedance connection |
| IN | Voltage Sense Input | High-impedance (≤1μA leakage) input referenced to 1.25V internal bandgap; used for early power-fail detection at upstream nodes |
| NMI | Non-Maskable Interrupt Output | Open-drain, active-low signal pulsed ≥200μs when IN falls below 1.25V - provides earliest warning of supply decay |
| ST | Strobe Input | Active-low watchdog trigger; internal 180kΩ pull-up; must be toggled ≤1s to prevent WDS activation |
| RST | Reset Output | Active-low open-drain output; asserted when VCC drops below trip point or PBRST is activated; held ≥130ms after recovery |
| WDS | Watchdog Status Output | Open-drain, active-low output driven for ≥130ms if ST is not strobed before watchdog timeout |
Key Features
| Feature | Design Value |
|---|---|
| Triple-function supervision | Simultaneous VCC monitoring, pushbutton reset control, and watchdog timer - eliminates need for discrete supervisors or timers |
| Configurable reset threshold | 3.3V ±10% trip point precisely matches 3.3V system rails while accommodating typical tolerance stack-ups |
| Early-warning NMI | Independent 1.25V sense input enables detection of upstream supply degradation before local VCC collapse - extending safe shutdown window |
| Guaranteed reset timing | 130ms minimum RST assertion ensures robust processor initialization even under slow-rising or noisy power supplies |
| Pin-compatible upgrade path | Direct replacement for MAX705/MAX706 in identical 8-pin DIP/SOIC/μSOP footprints - no PCB redesign required |
Applications
| Industrial PLC Control | Medical Diagnostic Equipment |
|---|---|
Use Scenario: Microcontroller-based programmable logic controllers operating in factory-floor environments with fluctuating 3.3V supplies and EMI exposure. IC Role / Device Role / Timing Role: Voltage supervisor and watchdog controller that halts CPU execution during brownouts and forces controlled reboot after recovery. Use Value: Prevents corrupted I/O states and firmware lockups by asserting RST within 8μs of VCC dropout and holding it ≥130ms for stable reinitialization. | Use Scenario: Portable ultrasound or patient monitor units requiring fail-safe boot sequencing and runtime integrity checks. IC Role / Device Role / Timing Role: Dual-role supervisor providing both power-on reset and continuous software execution monitoring via ST strobe. Use Value: Guarantees deterministic startup and detects frozen firmware via 1.0–2.2s watchdog timeout - meeting IEC 62304 safety requirements. |
| Telecom Base Station Management | Smart Energy Metering |
Use Scenario: Remote radio unit controllers powered from distributed 3.3V DC-DC converters subject to transient load spikes. IC Role / Device Role / Timing Role: Precision VCC supervisor with NMI output tied to FPGA interrupt line for predictive power-loss handling. Use Value: Enables graceful data save and state preservation using 200μs NMI pulse - 5μs faster than standard reset assertion - before VCC collapse. | Use Scenario: ANSI C12.22-compliant electricity meters with tamper-detection logic and secure boot validation. IC Role / Device Role / Timing Role: System-level watchdog and reset generator interfaced to secure MCU reset pin and tamper-alert circuitry. Use Value: Provides certified 130ms minimum reset hold time and 1.0s watchdog interval - satisfying ANSI C12.22 section 7.3.2.1 timing compliance. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar voltage supervisor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX706ESA+ | 5V ±10% trip point (VCCTP = 4.40V typ), no IN sense pin, identical 8-pin SOIC footprint | Designed for 5V systems only; lacks upstream voltage monitoring capability via IN pin | Select when supervising legacy 5V microcontrollers without need for early NMI warning |
| TPS3808G33DBVR | 3.3V ±2% accuracy (tighter tolerance), fixed 200ms reset delay, no NMI or watchdog functions | Single-function reset IC - omits pushbutton control, watchdog, and NMI outputs | Choose for cost-sensitive 3.3V applications requiring only precision reset without multi-function supervision |
Compared with MAX706ESA+ and TPS3808G33DBVR, DS1706SEPA+ uniquely combines 3.3V ±10% supervision, NMI-based early warning, and integrated watchdog - making it the only option among the three capable of full-system fault containment in industrial microcontroller platforms.
Availability
DS1706SEPA+ is available at Aetrix Electronics and suitable for industrial automation, medical diagnostics, telecom infrastructure, and smart metering applications requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for DS1706SEPA+ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) is a semiconductor company specializing in high-performance analog, mixed-signal, and power management ICs for industrial, automotive, and communications markets.
The DS1706SEPA+ belongs to the MicroMonitor™ family - engineered specifically for robust microprocessor supervision in harsh environments where power integrity, software reliability, and deterministic reset behavior are mission-critical.
FAQ
What is the exact VCC trip point range for DS1706SEPA+?
The DS1706SEPA+ has a guaranteed VCC trip point range of 2.85V to 3.00V (typical 2.93V), corresponding to 3.3V ±10% tolerance per its ordering code "S" variant. This specification is fully tested and characterized over the -40°C to +85°C industrial temperature range, with no derating required. The trip point is defined by internal precision bandgap and comparator circuitry - not adjustable externally. DS1706SEPA+ maintains this accuracy without external components.
Does DS1706SEPA+ provide both active-high and active-low reset outputs?
No, DS1706SEPA+ provides only an active-low reset output (RST). The datasheet explicitly lists DS1706SEPA+ in the ordering table as "3.3V-10% MONITOR, /RST, /WDS", where the "/" prefix denotes active-low polarity. Unlike DS1706LEPA or DS1706PEPA variants, DS1706SEPA+ does not include the *RST (active-high) output. Its RST pin is open-drain and requires an external pull-up resistor for proper logic-level translation.
Can DS1706SEPA+ monitor voltages higher than 3.3V using the IN pin?
Yes, DS1706SEPA+ can monitor higher voltages via the IN pin using an external resistor divider. The IN pin senses against a precise 1.25V internal reference (VTP = 1.20V to 1.30V), so any input voltage above VCC can be scaled down - for example, a 12V rail monitored with R1 = 26kΩ and R2 = 10kΩ yields ~4.5V at IN, triggering NMI at the correct trip point. The maximum allowable voltage at IN is limited to VCC, so the divider must ensure IN never exceeds the applied VCC.
What is the watchdog timeout behavior of DS1706SEPA+?
DS1706SEPA+ features a watchdog timer with nominal 1.0s timeout (1.0–2.2s range), which begins counting after RST becomes inactive. If the ST input is not strobed low before timeout, WDS is driven active-low for ≥130ms. The ST input has an internal 180kΩ pull-up, and each valid strobe must be a high-to-low transition. This behavior is fully specified in the AC Electrical Characteristics table and applies across the full -40°C to +85°C range without adjustment.
Is DS1706SEPA+ pin-compatible with MAX705/MAX706 devices?
Yes, DS1706SEPA+ is pin-compatible with MAX705/MAX706 in all supported packages: 8-pin DIP, 8-pin SOIC, and 8-pin μSOP. The pin assignments - including PBRST, VCC, GND, IN, NMI, ST, RST, and WDS - match identically across these families. This allows direct substitution in existing layouts without PCB modification, provided the voltage supervision requirements (3.3V ±10%) align with the target system. DS1706SEPA+ retains identical timing and electrical interface characteristics.
DS1706SEPA+ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- MicroMonitor™
- Package/Case:
- 8-DIP (0.300", 7.62mm)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Type:
- Simple Reset/Power-On Reset
- Number of Voltages Monitored:
- 1
- Voltage - Threshold:
- 2.93V
- Output:
- Push-Pull, Totem Pole
- Reset:
- Active Low
- Reset Timeout:
- 130ms Minimum
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 8-PDIP
DS1706SEPA+ FAQ
1.How can I place an order for DS1706SEPA+ through Aetrix?
Please submit a Request for Quotation (RFQ) for DS1706SEPA+ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DS1706SEPA+ reliable?
The price and inventory of DS1706SEPA+ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DS1706SEPA+ is usually 5 days.
3.What payment methods are accepted for DS1706SEPA+?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DS1706SEPA+ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DS1706SEPA+?
DS1706SEPA+ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DS1706SEPA+ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DS1706SEPA+?
For technical support, including DS1706SEPA+ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DS1706SEPA+ requirements.
6.How does Aetrix verify that DS1706SEPA+ is sourced from the original manufacturer or authorized distributors?
All DS1706SEPA+ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DS1706SEPA+ meets industry standards.
7.What is the process for return or replacement of DS1706SEPA+?
All DS1706SEPA+ units undergo pre-shipment inspection (PSI). If there is an issue with DS1706SEPA+, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DS1706SEPA+ part is unused and in its original packaging.
Return procedure for DS1706SEPA+:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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